NumberOfPdpEntriesNeeded = (UINT32) LShiftU64 (1, (PhysicalAddressBits - 30));\r
\r
TotalPagesNum = NumberOfPdpEntriesNeeded + 1;\r
- PageAddress = (UINTN) AllocatePages (TotalPagesNum);\r
+ PageAddress = (UINTN) AllocatePageTableMemory (TotalPagesNum);\r
ASSERT (PageAddress != 0);\r
\r
PageMap = (VOID *) PageAddress;\r
);\r
}\r
\r
+ //\r
+ // Protect the page table by marking the memory used for page table to be\r
+ // read-only.\r
+ //\r
+ EnablePageTableProtection ((UINTN)PageMap, FALSE);\r
+\r
return (UINTN) PageMap;\r
}\r
\r
return Available;\r
}\r
\r
+/**\r
+ The function will check if page table should be setup or not.\r
+\r
+ @retval TRUE Page table should be created.\r
+ @retval FALSE Page table should not be created.\r
+\r
+**/\r
+BOOLEAN\r
+ToBuildPageTable (\r
+ VOID\r
+ )\r
+{\r
+ if (!IsIa32PaeSupport ()) {\r
+ return FALSE;\r
+ }\r
+\r
+ if (IsNullDetectionEnabled ()) {\r
+ return TRUE;\r
+ }\r
+\r
+ if (PcdGet8 (PcdHeapGuardPropertyMask) != 0) {\r
+ return TRUE;\r
+ }\r
+\r
+ if (PcdGetBool (PcdCpuStackGuard)) {\r
+ return TRUE;\r
+ }\r
+\r
+ if (PcdGetBool (PcdSetNxForStack) && IsExecuteDisableBitAvailable ()) {\r
+ return TRUE;\r
+ }\r
+\r
+ return FALSE;\r
+}\r
+\r
/**\r
Transfers control to DxeCore.\r
\r
TopOfStack = (EFI_PHYSICAL_ADDRESS) (UINTN) ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);\r
\r
PageTables = 0;\r
- BuildPageTablesIa32Pae = (BOOLEAN) (IsIa32PaeSupport () &&\r
- (IsNullDetectionEnabled () ||\r
- (PcdGetBool (PcdSetNxForStack) &&\r
- IsExecuteDisableBitAvailable ())));\r
+ BuildPageTablesIa32Pae = ToBuildPageTable ();\r
if (BuildPageTablesIa32Pae) {\r
PageTables = Create4GPageTablesIa32Pae (BaseOfStack, STACK_SIZE);\r
if (IsExecuteDisableBitAvailable ()) {\r