-/*++\r
+/** @file\r
\r
Copyright (c) 2006, Intel Corporation\r
All rights reserved. This program and the accompanying materials\r
\r
Revision History\r
\r
---*/\r
+**/\r
\r
#include <PeiMain.h>\r
\r
+//\r
+//CAR is filled with this initial value during SEC phase\r
+//\r
#define INIT_CAR_VALUE 0x5AA55AA5\r
\r
typedef struct {\r
TEMPORARY_RAM_SUPPORT_PPI *TemporaryRamSupportPpi;\r
EFI_HOB_HANDOFF_INFO_TABLE *OldHandOffTable;\r
EFI_HOB_HANDOFF_INFO_TABLE *NewHandOffTable;\r
- INTN Offset;\r
+ INTN StackOffset;\r
+ INTN HeapOffset;\r
PEI_CORE_INSTANCE *PrivateInMem;\r
UINT64 NewPeiStackSize;\r
UINT64 OldPeiStackSize;\r
// usage in temporary memory for debuging.\r
//\r
DEBUG_CODE_BEGIN ();\r
- UINTN *StackPointer;\r
+ UINT32 *StackPointer;\r
\r
- for (StackPointer = (UINTN*)SecCoreData->StackBase;\r
- (StackPointer < (UINTN*)((UINTN)SecCoreData->StackBase + SecCoreData->StackSize)) \\r
+ for (StackPointer = (UINT32*)SecCoreData->StackBase;\r
+ (StackPointer < (UINT32*)((UINTN)SecCoreData->StackBase + SecCoreData->StackSize)) \\r
&& (*StackPointer == INIT_CAR_VALUE);\r
StackPointer ++);\r
\r
// CAUTION: The new base is computed accounding to gap of new stack.\r
//\r
NewPermenentMemoryBase = Private->PhysicalMemoryBegin + StackGap;\r
- Offset = (UINTN) NewPermenentMemoryBase - (UINTN) SecCoreData->TemporaryRamBase;\r
- NewHandOffTable = (EFI_HOB_HANDOFF_INFO_TABLE *)((UINTN)OldHandOffTable + Offset);\r
- PrivateInMem = (PEI_CORE_INSTANCE *)((UINTN) (VOID*) Private + Offset);\r
+ StackOffset = (UINTN) NewPermenentMemoryBase - (UINTN) SecCoreData->StackBase;\r
+ HeapOffset = (INTN) ((UINTN) Private->PhysicalMemoryBegin + Private->StackSize - \\r
+ (UINTN) SecCoreData->PeiTemporaryRamBase);\r
+ DEBUG ((EFI_D_INFO, "Heap Offset = 0x%X Stack Offset = 0x%X\n", HeapOffset, StackOffset));\r
+ \r
+ NewHandOffTable = (EFI_HOB_HANDOFF_INFO_TABLE *)((UINTN)OldHandOffTable + HeapOffset);\r
+ PrivateInMem = (PEI_CORE_INSTANCE *)((UINTN) (VOID*) Private + StackOffset);\r
\r
//\r
// TemporaryRamSupportPpi is produced by platform's SEC\r
);\r
\r
} else {\r
- CopyMem (\r
- (VOID*)(UINTN) NewPermenentMemoryBase,\r
- SecCoreData->TemporaryRamBase,\r
- SecCoreData->TemporaryRamSize\r
- );\r
+ //\r
+ // In IA32/x64/Itanium architecture, we need platform provide\r
+ // TEMPORAY_RAM_MIGRATION_PPI.\r
+ //\r
+ ASSERT (FALSE);\r
}\r
\r
\r
//\r
PrivateInMem->PS = &PrivateInMem->ServiceTableShadow;\r
PrivateInMem->CpuIo = &PrivateInMem->ServiceTableShadow.CpuIo;\r
- PrivateInMem->HobList.Raw = (VOID*) ((UINTN) PrivateInMem->HobList.Raw + Offset);\r
+ PrivateInMem->HobList.Raw = (VOID*) ((UINTN) PrivateInMem->HobList.Raw + HeapOffset);\r
PrivateInMem->StackBase = (EFI_PHYSICAL_ADDRESS)(((UINTN)PrivateInMem->PhysicalMemoryBegin + EFI_PAGE_MASK) & ~EFI_PAGE_MASK);\r
\r
PeiServices = &PrivateInMem->PS;\r
// Update HandOffHob for new installed permenent memory\r
//\r
NewHandOffTable->EfiEndOfHobList =\r
- (EFI_PHYSICAL_ADDRESS)(VOID*)((UINTN) NewHandOffTable->EfiEndOfHobList + Offset);\r
+ (EFI_PHYSICAL_ADDRESS)((UINTN) NewHandOffTable->EfiEndOfHobList + HeapOffset);\r
NewHandOffTable->EfiMemoryTop = PrivateInMem->PhysicalMemoryBegin +\r
PrivateInMem->PhysicalMemoryLength;\r
NewHandOffTable->EfiMemoryBottom = PrivateInMem->PhysicalMemoryBegin;\r
PrivateInMem->PeiMemoryInstalled = TRUE;\r
\r
//\r
- // Make sure we don't retry the same PEIM that added memory\r
+ // Restart scan of all PEIMs on next pass\r
//\r
- PrivateInMem->CurrentPeimCount++;\r
+ PrivateInMem->CurrentPeimCount = 0;\r
\r
//\r
// Shadow PEI Core. When permanent memory is avaiable, shadow\r