+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+ @param Data The data to write.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+PeiDefaultMemWrite16 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address,\r
+ IN UINT16 Data\r
+ );\r
+\r
+/**\r
+ 32-bit memory write operations.\r
+\r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+ @param Data The data to write.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+PeiDefaultMemWrite32 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address,\r
+ IN UINT32 Data\r
+ );\r
+ \r
+/**\r
+ 64-bit memory write operations.\r
+\r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+ @param Data The data to write.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+PeiDefaultMemWrite64 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address,\r
+ IN UINT64 Data\r
+ );\r
+ \r
+extern EFI_PEI_CPU_IO_PPI gPeiDefaultCpuIoPpi; \r
+\r
+//\r
+// Default EFI_PEI_PCI_CFG2_PPI support for EFI_PEI_SERVICES table when PeiCore initialization.\r
+// \r
+\r
+/**\r
+ Reads from a given location in the PCI configuration space.\r
+\r
+ If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM, then \r
+ return EFI_NOT_YET_AVAILABLE. \r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Width The width of the access. Enumerated in bytes.\r
+ See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
+ @param Address The physical address of the access. The format of\r
+ the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
+ @param Buffer A pointer to the buffer of data.\r
+\r
+ @retval EFI_SUCCESS The function completed successfully.\r
+ @retval EFI_INVALID_PARAMETER The invalid access width.\r
+ @retval EFI_NOT_YET_AVAILABLE If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM.\r
+ \r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiDefaultPciCfg2Read (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN OUT VOID *Buffer\r
+ );\r
+ \r
+/**\r
+ Write to a given location in the PCI configuration space.\r
+\r
+ If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM, then \r
+ return EFI_NOT_YET_AVAILABLE. \r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Width The width of the access. Enumerated in bytes.\r
+ See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
+ @param Address The physical address of the access. The format of\r
+ the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
+ @param Buffer A pointer to the buffer of data.\r
+\r
+ @retval EFI_SUCCESS The function completed successfully.\r
+ @retval EFI_INVALID_PARAMETER The invalid access width.\r
+ @retval EFI_NOT_YET_AVAILABLE If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiDefaultPciCfg2Write (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN OUT VOID *Buffer\r
+ );\r
+ \r
+/**\r
+ This function performs a read-modify-write operation on the contents from a given\r
+ location in the PCI configuration space.\r
+\r
+ @param PeiServices An indirect pointer to the PEI Services Table\r
+ published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Width The width of the access. Enumerated in bytes. Type\r
+ EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().\r
+ @param Address The physical address of the access.\r
+ @param SetBits Points to value to bitwise-OR with the read configuration value.\r
+ The size of the value is determined by Width.\r
+ @param ClearBits Points to the value to negate and bitwise-AND with the read configuration value.\r
+ The size of the value is determined by Width.\r
+\r
+ @retval EFI_SUCCESS The function completed successfully.\r
+ @retval EFI_INVALID_PARAMETER The invalid access width.\r
+ @retval EFI_NOT_YET_AVAILABLE If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiDefaultPciCfg2Modify (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN VOID *SetBits,\r
+ IN VOID *ClearBits\r
+ ); \r
+ \r
+extern EFI_PEI_PCI_CFG2_PPI gPeiDefaultPciCfg2Ppi;\r
+\r
+/**\r
+ After PeiCore image is shadowed into permanent memory, all build-in FvPpi should\r
+ be re-installed with the instance in permanent memory and all cached FvPpi pointers in \r
+ PrivateData->Fv[] array should be fixed up to be pointed to the one in permanent\r
+ memory.\r
+ \r
+ @param PrivateData Pointer to PEI_CORE_INSTANCE.\r
+**/ \r
+VOID\r
+PeiReinitializeFv (\r
+ IN PEI_CORE_INSTANCE *PrivateData\r
+ );\r
+ \r