--- /dev/null
+/** @file\r
+\r
+ Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>\r
+ SPDX-License-Identifier: BSD-2-Clause-Patent\r
+\r
+**/\r
+\r
+#ifndef _EDKII_NVME_PASS_THRU_PPI_H_\r
+#define _EDKII_NVME_PASS_THRU_PPI_H_\r
+\r
+#include <Protocol/DevicePath.h>\r
+#include <Protocol/NvmExpressPassthru.h>\r
+\r
+///\r
+/// Global ID for the EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI.\r
+///\r
+#define EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI_GUID \\r
+ { \\r
+ 0x6af31b2c, 0x3be, 0x46c1, { 0xb1, 0x2d, 0xea, 0x4a, 0x36, 0xdf, 0xa7, 0x4c } \\r
+ }\r
+\r
+//\r
+// Forward declaration for the EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI.\r
+//\r
+typedef struct _EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI;\r
+\r
+//\r
+// Revision The revision to which the Nvme Pass Thru PPI interface adheres.\r
+// All future revisions must be backwards compatible.\r
+// If a future version is not back wards compatible it is not the same GUID.\r
+//\r
+#define EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI_REVISION 0x00010000\r
+\r
+/**\r
+ Gets the device path information of the underlying NVM Express host controller.\r
+\r
+ @param[in] This The PPI instance pointer.\r
+ @param[out] DevicePathLength The length of the device path in bytes specified\r
+ by DevicePath.\r
+ @param[out] DevicePath The device path of the underlying NVM Express\r
+ host controller.\r
+ This field re-uses EFI Device Path Protocol as\r
+ defined by Section 10.2 EFI Device Path Protocol\r
+ of UEFI 2.7 Specification.\r
+\r
+ @retval EFI_SUCCESS The operation succeeds.\r
+ @retval EFI_INVALID_PARAMETER DevicePathLength or DevicePath is NULL.\r
+ @retval EFI_OUT_OF_RESOURCES The operation fails due to lack of resources.\r
+\r
+**/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *EDKII_PEI_NVME_PASS_THRU_GET_DEVICE_PATH) (\r
+ IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,\r
+ OUT UINTN *DevicePathLength,\r
+ OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath\r
+ );\r
+\r
+/**\r
+ Used to retrieve the next namespace ID for this NVM Express controller.\r
+\r
+ If on input the value pointed to by NamespaceId is 0xFFFFFFFF, then the first\r
+ valid namespace ID defined on the NVM Express controller is returned in the\r
+ location pointed to by NamespaceId and a status of EFI_SUCCESS is returned.\r
+\r
+ If on input the value pointed to by NamespaceId is an invalid namespace ID\r
+ other than 0xFFFFFFFF, then EFI_INVALID_PARAMETER is returned.\r
+\r
+ If on input the value pointed to by NamespaceId is a valid namespace ID, then\r
+ the next valid namespace ID on the NVM Express controller is returned in the\r
+ location pointed to by NamespaceId, and EFI_SUCCESS is returned.\r
+\r
+ If the value pointed to by NamespaceId is the namespace ID of the last\r
+ namespace on the NVM Express controller, then EFI_NOT_FOUND is returned.\r
+\r
+ @param[in] This The PPI instance pointer.\r
+ @param[in,out] NamespaceId On input, a pointer to a legal NamespaceId\r
+ for an NVM Express namespace present on the\r
+ NVM Express controller. On output, a pointer\r
+ to the next NamespaceId of an NVM Express\r
+ namespace on an NVM Express controller. An\r
+ input value of 0xFFFFFFFF retrieves the\r
+ first NamespaceId for an NVM Express\r
+ namespace present on an NVM Express\r
+ controller.\r
+\r
+ @retval EFI_SUCCESS The Namespace ID of the next Namespace was\r
+ returned.\r
+ @retval EFI_NOT_FOUND There are no more namespaces defined on this\r
+ controller.\r
+ @retval EFI_INVALID_PARAMETER NamespaceId is an invalid value other than\r
+ 0xFFFFFFFF.\r
+\r
+**/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *EDKII_PEI_NVME_PASS_THRU_GET_NEXT_NAMESPACE)(\r
+ IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,\r
+ IN OUT UINT32 *NamespaceId\r
+ );\r
+\r
+\r
+/**\r
+ Sends an NVM Express Command Packet to an NVM Express controller or namespace. This function only\r
+ supports blocking execution of the command.\r
+\r
+ @param[in] This The PPI instance pointer.\r
+ @param[in] NamespaceId Is a 32 bit Namespace ID to which the Nvm Express command packet will\r
+ be sent.\r
+ A Value of 0 denotes the NVM Express controller, a Value of all 0FFh in\r
+ the namespace ID specifies that the command packet should be sent to all\r
+ valid namespaces.\r
+ @param[in,out] Packet A pointer to the EDKII PEI NVM Express PassThru Command Packet to send\r
+ to the NVMe namespace specified by NamespaceId.\r
+\r
+ @retval EFI_SUCCESS The EDKII PEI NVM Express Command Packet was sent by the host.\r
+ TransferLength bytes were transferred to, or from DataBuffer.\r
+ @retval EFI_NOT_READY The EDKII PEI NVM Express Command Packet could not be sent because\r
+ the controller is not ready. The caller may retry again later.\r
+ @retval EFI_DEVICE_ERROR A device error occurred while attempting to send the EDKII PEI NVM\r
+ Express Command Packet.\r
+ @retval EFI_INVALID_PARAMETER Namespace, or the contents of EDKII_PEI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET\r
+ are invalid.\r
+ The EDKII PEI NVM Express Command Packet was not sent, so no\r
+ additional status information is available.\r
+ @retval EFI_UNSUPPORTED The command described by the EDKII PEI NVM Express Command Packet\r
+ is not supported by the host adapter.\r
+ The EDKII PEI NVM Express Command Packet was not sent, so no\r
+ additional status information is available.\r
+ @retval EFI_TIMEOUT A timeout occurred while waiting for the EDKII PEI NVM Express Command\r
+ Packet to execute.\r
+\r
+**/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *EDKII_PEI_NVME_PASS_THRU_PASSTHRU) (\r
+ IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,\r
+ IN UINT32 NamespaceId,\r
+ IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet\r
+ );\r
+\r
+//\r
+// This PPI contains a set of services to send commands\r
+// to a mass storage device.\r
+//\r
+struct _EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI {\r
+ UINT64 Revision;\r
+ EFI_NVM_EXPRESS_PASS_THRU_MODE *Mode;\r
+ EDKII_PEI_NVME_PASS_THRU_GET_DEVICE_PATH GetDevicePath;\r
+ EDKII_PEI_NVME_PASS_THRU_GET_NEXT_NAMESPACE GetNextNameSpace;\r
+ EDKII_PEI_NVME_PASS_THRU_PASSTHRU PassThru;\r
+};\r
+\r
+extern EFI_GUID gEdkiiPeiNvmExpressPassThruPpiGuid;\r
+\r
+#endif\r
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