# It also provides the defintions(including PPIs/PROTOCOLs/GUIDs and library classes)\r
# and libraries instances, which are used for those modules.\r
#\r
-# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2007 - 2011, Intel Corporation. All rights reserved.<BR>\r
# This program and the accompanying materials are licensed and made available under \r
# the terms and conditions of the BSD License that accompanies this distribution. \r
# The full text of the license may be found at\r
# This library is only intended to be used by UEFI network stack modules.\r
UdpIoLib|Include/Library/UdpIoLib.h\r
\r
+ ## @libraryclass The helper routines to access TCP service.\r
+ # This library is only intended to be used by UEFI network stack modules.\r
+ TcpIoLib|Include/Library/TcpIoLib.h\r
+\r
## @libraryclass Defines a set of methods to reset whole system.\r
ResetSystemLib|Include/Library/ResetSystemLib.h\r
\r
#\r
DebugAgentLib|Include/Library/DebugAgentLib.h\r
\r
+ ## @libraryclass Provide platform specific hooks.\r
+ #\r
+ PlatformHookLib|Include/Library/PlatformHookLib.h\r
+ \r
[Guids]\r
## MdeModule package token space guid\r
# Include/Guid/MdeModulePkgTokenSpace.h\r
# Include/Protocol/FaultTolerantWrite.h\r
gEfiFaultTolerantWriteProtocolGuid = { 0x3EBD9E82, 0x2C78, 0x4DE6, { 0x97, 0x86, 0x8D, 0x4B, 0xFC, 0xB7, 0xC8, 0x81 }}\r
\r
+ ## This protocol provides boot-time service to do fault tolerant write capability for block devices in SMM environment.\r
+ # Include/Protocol/SmmFaultTolerantWrite.h\r
+ gEfiSmmFaultTolerantWriteProtocolGuid = { 0x3868fc3b, 0x7e45, 0x43a7, { 0x90, 0x6c, 0x4b, 0xa4, 0x7d, 0xe1, 0x75, 0x4d }}\r
+ \r
## This protocol is used to abstract the swap operation of boot block and backup block of boot FV.\r
# Include/Protocol/SwapAddressRange.h\r
gEfiSwapAddressRangeProtocolGuid = { 0x1259F60D, 0xB754, 0x468E, { 0xA7, 0x89, 0x4D, 0xB8, 0x5D, 0x55, 0xE8, 0x7E }}\r
+ \r
+ ## This protocol is used to abstract the swap operation of boot block and backup block of boot FV in SMM environment.\r
+ # Include/Protocol/SmmSwapAddressRange.h\r
+ gEfiSmmSwapAddressRangeProtocolGuid = { 0x67c4f112, 0x3385, 0x4e55, { 0x9c, 0x5b, 0xc0, 0x5b, 0x71, 0x7c, 0x42, 0x28 }}\r
+ \r
+ ## This protocol is intended for use as a means to store data in the EFI SMM environment.\r
+ # Include/Protocol/SmmVariableProtocol.h\r
+ gEfiSmmVariableProtocolGuid = { 0xed32d533, 0x99e6, 0x4209, { 0x9c, 0xc0, 0x2d, 0x72, 0xcd, 0xd9, 0x98, 0xa7 }}\r
+\r
+ ## This protocol is similar with DXE FVB protocol and used in the UEFI SMM evvironment.\r
+ # Include/Protocol/SmmFirmwareVolumeBlock.h\r
+ gEfiSmmFirmwareVolumeBlockProtocolGuid = { 0xd326d041, 0xbd31, 0x4c01, { 0xb5, 0xa8, 0x62, 0x8b, 0xe8, 0x7f, 0x6, 0x53 }}\r
\r
[PcdsFeatureFlag]\r
## Indicate whether platform can support update capsule across a system reset\r
# interrupt to access usb device in the case of absence of usb stack. \r
# DUET platform requires the token to be TRUE.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|FALSE|BOOLEAN|0x00010047\r
-\r
+ \r
## If TRUE, HiiImageProtocol will be installed.\r
# FALSE is for size reduction.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdSupportHiiImageProtocol|TRUE|BOOLEAN|0x00010100\r
## RTC Update Timeout Value\r
gEfiMdeModulePkgTokenSpaceGuid.PcdRealTimeClockUpdateTimeout|100000|UINT32|0x00010034\r
\r
+ ## If TRUE, then 16550 serial port registers are in MMIO space. \r
+ # If FALSE, then 16550 serial port registers are in I/O space. Default value.\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|FALSE|BOOLEAN|0x00020000\r
+ \r
+ ## If TRUE, then the 16550 serial port hardware flow control is enabled.\r
+ # If FALSE, then the 16550 serial port hardware flow control is disabled. Default value.\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl|FALSE|BOOLEAN|0x00020001\r
+\r
+ ## If TRUE, then 16550 serial Tx operations will block if DSR is not asserted (no cable).\r
+ # If FALSE, then the 16550 serial Tx operations will not be blocked if DSR is not asserted. Default value.\r
+ # This PCD is ignored if PcdSerialUseHardwareFlowControl is FALSE.\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialDetectCable|FALSE|BOOLEAN|0x00020006\r
+ \r
+ ## Base address of 16550 serial port registers in MMIO or I/O space. Default is 0x3F8.\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x03F8|UINT64|0x00020002\r
+\r
+ ## Baud rate for the 16550 serial port. Default is 115200 baud.\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate|115200|UINT32|0x00020003\r
+\r
+ ## Line Control Register (LCR) for the 16550 serial port. This encodes data bits, parity, and stop bits. \r
+ # BIT1..BIT0 - Data bits. 00b = 5 bits, 01b = 6 bits, 10b = 7 bits, 11b = 8 bits\r
+ # BIT2 - Stop Bits. 0 = 1 stop bit. 1 = 1.5 stop bits if 5 data bits selected, otherwise 2 stop bits.\r
+ # BIT5..BIT2 - Parity. xx0b = No Parity, 001b = Odd Parity, 011b = Even Parity, 101b = Mark Parity, 111b=Stick Parity\r
+ # BIT7..BIT6 - Reserved. Must be 0.\r
+ #\r
+ # Default is No Parity, 8 Data Bits, 1 Stop Bit.\r
+ #\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl|0x03|UINT8|0x00020004\r
+\r
+ ## FIFO Control Register (FCR) for the 16550 serial port. \r
+ # BIT0 - FIFO Enable. 0 = Disable FIFOs. 1 = Enable FIFOs.\r
+ # BIT1 - Clear receive FIFO. 1 = Clear FIFO.\r
+ # BIT2 - Clear transmit FIFO. 1 = Clear FIFO.\r
+ # BIT7..BIT3 - Reserved. Must be 0.\r
+ #\r
+ # Default is to enable and clear all FIFOs.\r
+ #\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl|0x07|UINT8|0x00020005\r
+\r
## Maximum address that the DXE Core will allocate the EFI_SYSTEM_TABLE_POINTER\r
# structure. The default value for this PCD is 0, which means that the DXE Core\r
# will allocate the buffer from the EFI_SYSTEM_TABLE_POINTER structure on a 4MB\r
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