# It also provides the defintions(including PPIs/PROTOCOLs/GUIDs and library classes)\r
# and libraries instances, which are used for those modules.\r
#\r
-# Copyright (c) 2007 - 2013, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>\r
# This program and the accompanying materials are licensed and made available under \r
# the terms and conditions of the BSD License that accompanies this distribution. \r
# The full text of the license may be found at\r
DEC_SPECIFICATION = 0x00010005\r
PACKAGE_NAME = MdeModulePkg\r
PACKAGE_GUID = BA0D78D6-2CAF-414b-BD4D-B6762A894288\r
- PACKAGE_VERSION = 0.92\r
+ PACKAGE_VERSION = 0.93\r
\r
[Includes]\r
Include\r
## Include/Guid/ConnectConInEvent.h\r
gConnectConInEventGuid = { 0xdb4e8151, 0x57ed, 0x4bed, { 0x88, 0x33, 0x67, 0x51, 0xb5, 0xd1, 0xa8, 0xd7 }}\r
\r
+ ## Include/Guid/StatusCodeDataTypeVariable.h\r
+ gEdkiiStatusCodeDataTypeVariableGuid = { 0xf6ee6dbb, 0xd67f, 0x4ea0, { 0x8b, 0x96, 0x6a, 0x71, 0xb1, 0x9d, 0x84, 0xad }}\r
+\r
[Ppis]\r
## Include/Ppi/AtaController.h\r
gPeiAtaControllerPpiGuid = { 0xa45e60d1, 0xc719, 0x44aa, { 0xb0, 0x7a, 0xaa, 0x77, 0x7f, 0x85, 0x90, 0x6d }}\r
## Include/Ppi/PostBootScriptTable.h\r
gPeiPostScriptTablePpiGuid = { 0x88c9d306, 0x900, 0x4eb5, { 0x82, 0x60, 0x3e, 0x2d, 0xbe, 0xda, 0x1f, 0x89}}\r
\r
+ ## Include/Ppi/SerialPortPei.h\r
+ gPeiSerialPortPpiGuid = { 0x490e9d85, 0x8aef, 0x4193, { 0x8e, 0x56, 0xf7, 0x34, 0xa9, 0xff, 0xac, 0x8b}}\r
+\r
[Protocols]\r
## Load File protocol provides capability to load and unload EFI image into memory and execute it.\r
# Include/Protocol/LoadPe32Image.h\r
# for a dynamic PCD used in PEI phase.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPcdCallBackNumberPerPcdEntry|0x08|UINT32|0x0001000f\r
\r
- ## VPD type PCD allow developer point an absoluted physical address PcdVpdBaseAddress\r
- # to store PCD value.\r
- #\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0|UINT32|0x00010010\r
-\r
## Maximum number of FV is supported by PeiCore's dispatching.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxFvSupported|6|UINT32|0x00010030\r
\r
- ## Maximum PEIM count in every FV is supported by PeiCore's dispatching.\r
+ ## Maximum File count in every FV is supported by PeiCore's dispatching.\r
+ # PeiCore supported File type includes PEIM, Combined PEIM and FV.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxPeimPerFv|32|UINT32|0x00010031\r
\r
## Maximum stack size for PeiCore.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdLoadModuleAtFixAddressEnable|0|UINT64|0x30001015\r
\r
## Smbios version\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0207|UINT16|0x00010055\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0208|UINT16|0x00010055\r
\r
## TFTP BlockSize. Initial value 0 means using default block size which is (MTU-IP_HEADER-UDP_HEADER-TFTP_HEADER)\r
# to handle all link layers. If the value is non zero, the PCD value will be used as block size.\r
# PROGRESS_CODE_S3_SUSPEND_END = (EFI_SOFTWARE_SMM_DRIVER | (EFI_OEM_SPECIFIC | 0x00000001)) = 0x03078001\r
gEfiMdeModulePkgTokenSpaceGuid.PcdProgressCodeS3SuspendEnd|0x03078001|UINT32|0x30001033\r
\r
+ ## Error Code for SetVariable failure.\r
+ # EDKII_ERROR_CODE_SET_VARIABLE = (EFI_SOFTWARE_DXE_BS_DRIVER | (EFI_OEM_SPECIFIC | 0x00000002)) = 0x03058002\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdErrorCodeSetVariable|0x03058002|UINT32|0x30001040\r
+\r
[PcdsFixedAtBuild,PcdsPatchableInModule]\r
+ ## VPD type PCD allow developer point an absoluted physical address PcdVpdBaseAddress\r
+ # to store PCD value.\r
+ #\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0|UINT32|0x00010010\r
+\r
## Maximun number of performance log entries during PEI phase.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPerformanceLogEntries|40|UINT8|0x0001002f\r
\r
## Default Creator Revision for ACPI table creation.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision|0x01000013|UINT32|0x30001038\r
\r
+ ## UART clock frequency is for the baud rate configuration.\r
+ # @Prompt Serial Port Clock Rate\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|1843200|UINT32|0x00010066\r
+ \r
+ ## PCI Serial Device Info. It is an array of Device, Function, and Power Management\r
+ # information that describes the path that contains zero or more PCI to PCI briges \r
+ # followed by a PCI serial device. Each array entry is 4-bytes in length. The \r
+ # first byte is the PCI Device Number, then second byte is the PCI Function Number, \r
+ # and the last two bytes are the offset to the PCI power management capabilities \r
+ # register used to manage the D0-D3 states. If a PCI power management capabilities \r
+ # register is not present, then the last two bytes in the offset is set to 0. The \r
+ # array is terminated by an array entry with a PCI Device Number of 0xFF. For a \r
+ # non-PCI fixed address serial device, such as an ISA serial device, the value is 0xFF.\r
+ # @Prompt Pci Serial Device Info\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo|{0xFF}|VOID*|0x00010067\r
+\r
+ ## Serial Port Extended Transmit FIFO Size. The default is 64 bytes. \r
+ # @Prompt Pci Port Extended Transmit FIFO Size in Bytes\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize|64|UINT32|0x00010068\r
+ \r
[PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]\r
## This PCD defines the Console output column and the default value is 25 according to UEFI spec.\r
# This PCD could be set to 0 then console output could be at max column and max row.\r
## This PCD specifies whether full PCI enumeration is disabled.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|FALSE|BOOLEAN|0x10000048\r
\r
+ ## Disk I/O - Number of Data Buffer block\r
+ # Define the size in block of the pre-allocated buffer. It provide better\r
+ # performance for large Disk I/O requests\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdDiskIoDataBufferBlockNum|64|UINT32|0x30001039\r
+\r
[PcdsPatchableInModule]\r
## Specify memory size with page number for PEI code when \r
# the feature of Loading Module at Fixed Address is enabled\r
projects / mirror_edk2.git / blobdiff