# It also provides the definitions(including PPIs/PROTOCOLs/GUIDs and library classes)\r
# and libraries instances, which are used for those modules.\r
#\r
-# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>\r
-# This program and the accompanying materials are licensed and made available under \r
-# the terms and conditions of the BSD License that accompanies this distribution. \r
+# Copyright (c) 2007 - 2016, Intel Corporation. All rights reserved.<BR>\r
+# This program and the accompanying materials are licensed and made available under\r
+# the terms and conditions of the BSD License that accompanies this distribution.\r
# The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php. \r
-# \r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+# http://opensource.org/licenses/bsd-license.php.\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
#\r
##\r
\r
## @libraryclass Provide capability to maintain the data integrity cross S3 phase.\r
#\r
LockBoxLib|Include/Library/LockBoxLib.h\r
- \r
+\r
## @libraryclass Provide the CPU exception handler.\r
#\r
CpuExceptionHandlerLib|Include/Library/CpuExceptionHandlerLib.h\r
- \r
+\r
## @libraryclass Provides platform specific display interface.\r
#\r
CustomizedDisplayLib|Include/Library/CustomizedDisplayLib.h\r
#\r
AuthVariableLib|Include/Library/AuthVariableLib.h\r
\r
+ ## @libraryclass Provides variable check services and database management.\r
+ #\r
+ VarCheckLib|Include/Library/VarCheckLib.h\r
+\r
+ ## @libraryclass Provides services to get variable error flag and do platform variable cleanup.\r
+ #\r
+ PlatformVarCleanupLib|Include/Library/PlatformVarCleanupLib.h\r
+\r
+ ## @libraryclass Provides services to get do the file explorer.\r
+ #\r
+ FileExplorerLib|Include/Library/FileExplorerLib.h\r
+\r
+ ## @libraryclass Provides image decoding service.\r
+ #\r
+ ImageDecoderLib|Include/Library/ImageDecoderLib.h\r
+\r
+ ## @libraryclass Provides interfaces about logo display.\r
+ #\r
+ BootLogoLib|Include/Library/BootLogoLib.h\r
+\r
+ ## @libraryclass Provides interfaces about Ipmi submit generic commond.\r
+ #\r
+ IpmiLib|Include/Library/IpmiLib.h\r
+\r
+ ## @libraryclass Provides interfaces for platform to return root bridge information to PciHostBridgeDxe driver.\r
+ #\r
+ PciHostBridgeLib|Include/Library/PciHostBridgeLib.h\r
+\r
[Guids]\r
## MdeModule package token space guid\r
# Include/Guid/MdeModulePkgTokenSpace.h\r
## Guid is defined for SMM variable module to notify SMM variable wrapper module when variable write service was ready.\r
# Include/Guid/SmmVariableCommon.h\r
gSmmVariableWriteGuid = { 0x93ba1826, 0xdffb, 0x45dd, { 0x82, 0xa7, 0xe7, 0xdc, 0xaa, 0x3b, 0xbd, 0xf3 }}\r
- \r
+\r
## Performance protocol guid that also acts as the performance HOB guid and performance variable GUID\r
# Include/Guid/Performance.h\r
gPerformanceProtocolGuid = { 0x76B6BDFA, 0x2ACD, 0x4462, { 0x9E, 0x3F, 0xCB, 0x58, 0xC9, 0x69, 0xD9, 0x37 } }\r
# Include/Guid/StatusCodeDataTypeDebug.h\r
gEfiStatusCodeDataTypeDebugGuid = { 0x9A4E9246, 0xD553, 0x11D5, { 0x87, 0xE2, 0x00, 0x06, 0x29, 0x45, 0xC3, 0xB9 }}\r
\r
- ## A configuration Table Guid for Load module at fixed address \r
+ ## A configuration Table Guid for Load module at fixed address\r
# Include/Guid/LoadModuleAtFixedAddress.h\r
gLoadFixedAddressConfigurationTableGuid = { 0x2CA88B53,0xD296,0x4080, { 0xA4,0xA5,0xCA,0xD9,0xBA,0xE2,0x4B,0x9 } }\r
\r
## GUID used to store the global debug mask value into an EFI Variable\r
- # Include/Guid/DebugMask.h \r
+ # Include/Guid/DebugMask.h\r
gEfiGenericVariableGuid = { 0x59d1c24f, 0x50f1, 0x401a, {0xb1, 0x01, 0xf3, 0x3e, 0x0d, 0xae, 0xd4, 0x43} }\r
- \r
+\r
## Event for the DXE Core to signal idle events\r
# Include/Guid/EventIdle.h\r
gIdleLoopEventGuid = { 0x3c8d294c, 0x5fc3, 0x4451, { 0xbb, 0x31, 0xc4, 0xc0, 0x32, 0x29, 0x5e, 0x6c } }\r
## Include/Guid/UsbKeyBoardLayout.h\r
gUsbKeyboardLayoutPackageGuid = { 0xc0f3b43, 0x44de, 0x4907, { 0xb4, 0x78, 0x22, 0x5f, 0x6f, 0x62, 0x89, 0xdc }}\r
gUsbKeyboardLayoutKeyGuid = { 0x3a4d7a7c, 0x18a, 0x4b42, { 0x81, 0xb3, 0xdc, 0x10, 0xe3, 0xb5, 0x91, 0xbd }}\r
- \r
+\r
## Include/Guid/HiiResourceSampleHii.h\r
gHiiResourceSamleFormSetGuid = { 0x4f4ef7f0, 0xaa29, 0x4ce9, { 0xba, 0x41, 0x64, 0x3e, 0x1, 0x23, 0xa9, 0x9f }}\r
\r
\r
## Include/Guid/ZeroGuid.h\r
gZeroGuid = { 0x0, 0x0, 0x0, {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}\r
- \r
+\r
## Include/Guid/MtcVendor.h\r
gMtcVendorGuid = { 0xeb704011, 0x1402, 0x11d3, { 0x8e, 0x77, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b }}\r
\r
\r
## Include/Guid/StatusCodeDataTypeVariable.h\r
gEdkiiStatusCodeDataTypeVariableGuid = { 0xf6ee6dbb, 0xd67f, 0x4ea0, { 0x8b, 0x96, 0x6a, 0x71, 0xb1, 0x9d, 0x84, 0xad }}\r
- \r
+\r
## Include/Guid/MemoryProfile.h\r
gEdkiiMemoryProfileGuid = { 0x821c9a09, 0x541a, 0x40f6, { 0x9f, 0x43, 0xa, 0xd1, 0x93, 0xa1, 0x2c, 0xfe }}\r
\r
\r
## Include/Guid/HiiBootMaintenanceFormset.h\r
gEfiIfrBootMaintenanceGuid = { 0xb2dedc91, 0xd59f, 0x48d2, { 0x89, 0x8a, 0x12, 0x49, 0xc, 0x74, 0xa4, 0xe0 }}\r
- \r
+\r
+ gEfiIfrFrontPageGuid = { 0xe58809f8, 0xfbc1, 0x48e2, { 0x88, 0x3a, 0xa3, 0x0f, 0xdc, 0x4b, 0x44, 0x1e } }\r
+\r
+\r
[Ppis]\r
## Include/Ppi/AtaController.h\r
gPeiAtaControllerPpiGuid = { 0xa45e60d1, 0xc719, 0x44aa, { 0xb0, 0x7a, 0xaa, 0x77, 0x7f, 0x85, 0x90, 0x6d }}\r
## Include/Ppi/UfsHostController.h\r
gEdkiiPeiUfsHostControllerPpiGuid = { 0xdc54b283, 0x1a77, 0x4cd6, { 0x83, 0xbb, 0xfd, 0xda, 0x46, 0x9a, 0x2e, 0xc6 }}\r
\r
+ ## Include/Ppi/IpmiPpi.h\r
+ gPeiIpmiPpiGuid = { 0xa9731431, 0xd968, 0x4277, { 0xb7, 0x52, 0xa3, 0xa9, 0xa6, 0xae, 0x18, 0x98 }}\r
+\r
[Protocols]\r
## Load File protocol provides capability to load and unload EFI image into memory and execute it.\r
# Include/Protocol/LoadPe32Image.h\r
## This protocol provides boot-time service to do fault tolerant write capability for block devices in SMM environment.\r
# Include/Protocol/SmmFaultTolerantWrite.h\r
gEfiSmmFaultTolerantWriteProtocolGuid = { 0x3868fc3b, 0x7e45, 0x43a7, { 0x90, 0x6c, 0x4b, 0xa4, 0x7d, 0xe1, 0x75, 0x4d }}\r
- \r
+\r
## This protocol is used to abstract the swap operation of boot block and backup block of boot FV.\r
# Include/Protocol/SwapAddressRange.h\r
gEfiSwapAddressRangeProtocolGuid = { 0x1259F60D, 0xB754, 0x468E, { 0xA7, 0x89, 0x4D, 0xB8, 0x5D, 0x55, 0xE8, 0x7E }}\r
- \r
+\r
## This protocol is used to abstract the swap operation of boot block and backup block of boot FV in SMM environment.\r
# Include/Protocol/SmmSwapAddressRange.h\r
gEfiSmmSwapAddressRangeProtocolGuid = { 0x67c4f112, 0x3385, 0x4e55, { 0x9c, 0x5b, 0xc0, 0x5b, 0x71, 0x7c, 0x42, 0x28 }}\r
- \r
+\r
## This protocol is intended for use as a means to store data in the EFI SMM environment.\r
# Include/Protocol/SmmVariableProtocol.h\r
gEfiSmmVariableProtocolGuid = { 0xed32d533, 0x99e6, 0x4209, { 0x9c, 0xc0, 0x2d, 0x72, 0xcd, 0xd9, 0x98, 0xa7 }}\r
gEfiSmmFirmwareVolumeBlockProtocolGuid = { 0xd326d041, 0xbd31, 0x4c01, { 0xb5, 0xa8, 0x62, 0x8b, 0xe8, 0x7f, 0x6, 0x53 }}\r
\r
## This protocol allows the error level mask for DEBUG() macros to be adjusted for DXE Phase modules\r
- # Include/Guid/DebugMask.h \r
+ # Include/Guid/DebugMask.h\r
gEfiDebugMaskProtocolGuid = { 0x4c8a2451, 0xc207, 0x405b, {0x96, 0x94, 0x99, 0xea, 0x13, 0x25, 0x13, 0x41} }\r
\r
## Include/Protocol/LockBox.h\r
gEfiLockBoxProtocolGuid = { 0xbd445d79, 0xb7ad, 0x4f04, { 0x9a, 0xd8, 0x29, 0xbd, 0x20, 0x40, 0xeb, 0x3c }}\r
- \r
+\r
## Include/Protocol/FormBrowserEx.h\r
gEfiFormBrowserExProtocolGuid = { 0x1f73b18d, 0x4630, 0x43c1, { 0xa1, 0xde, 0x6f, 0x80, 0x85, 0x5d, 0x7d, 0xa4 } }\r
\r
\r
## Include/Protocol/UfsHostController.h\r
gEdkiiUfsHostControllerProtocolGuid = { 0xebc01af5, 0x7a9, 0x489e, { 0xb7, 0xce, 0xdc, 0x8, 0x9e, 0x45, 0x9b, 0x2f } }\r
- \r
+\r
## Include/Protocol/EsrtManagement.h\r
gEsrtManagementProtocolGuid = { 0xa340c064, 0x723c, 0x4a9c, { 0xa4, 0xdd, 0xd5, 0xb4, 0x7a, 0x26, 0xfb, 0xb0 }}\r
\r
## Include/Protocol/SmmReadyToBoot.h\r
gEdkiiSmmReadyToBootProtocolGuid = { 0x6e057ecf, 0xfa99, 0x4f39, { 0x95, 0xbc, 0x59, 0xf9, 0x92, 0x1d, 0x17, 0xe4 } }\r
\r
+ ## Include/Protocol/PlatformLogo.h\r
+ gEdkiiPlatformLogoProtocolGuid = { 0x9b517978, 0xeba1, 0x44e7, { 0xba, 0x65, 0x7c, 0x2c, 0xd0, 0x8b, 0xf8, 0xe9 } }\r
+\r
+ ## Include/Protocol/FileExplorer.h\r
+ gEfiFileExplorerProtocolGuid = { 0x2C03C536, 0x4594, 0x4515, { 0x9E, 0x7A, 0xD3, 0xD2, 0x04, 0xFE, 0x13, 0x63 } }\r
+\r
+ ## Include/Protocol/IpmiProtocol.h\r
+ gIpmiProtocolGuid = { 0xdbc6381f, 0x5554, 0x4d14, { 0x8f, 0xfd, 0x76, 0xd7, 0x87, 0xb8, 0xac, 0xbf } }\r
+ gSmmIpmiProtocolGuid = { 0x5169af60, 0x8c5a, 0x4243, { 0xb3, 0xe9, 0x56, 0xc5, 0x6d, 0x18, 0xee, 0x26 } }\r
+\r
#\r
# [Error.gEfiMdeModulePkgTokenSpaceGuid]\r
# 0x80000001 | Invalid value provided.\r
# FALSE - Does not turn off usb legacy support.<BR>\r
# @Prompt Turn off USB legacy support.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|FALSE|BOOLEAN|0x00010047\r
- \r
+\r
## Indicates if HiiImageProtocol will be installed.\r
# FALSE is for size reduction.<BR><BR>\r
# TRUE - Installs HiiImageProtocol.<BR>\r
# @Prompt Enable S3 performance data support.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwarePerformanceDataTableS3Support|TRUE|BOOLEAN|0x00010064\r
\r
+ ## Indicates if Serial device uses half hand shake.<BR><BR>\r
+ # TRUE - Serial device uses half hand shake.<BR>\r
+ # FALSE - Serial device doesn't use half hand shake.<BR>\r
+ # @Prompt Enable Serial device Half Hand Shake\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHalfHandshake|FALSE|BOOLEAN|0x00010073\r
+\r
[PcdsFeatureFlag.IA32, PcdsFeatureFlag.X64]\r
## Indicates if DxeIpl should switch to long mode to enter DXE phase.\r
# It is assumed that 64-bit DxeCore is built in firmware if it is true; otherwise 32-bit DxeCore\r
# FALSE - 16550 serial Tx operations will not be blocked if DSR is not asserted.<BR>\r
# @Prompt Enable serial port cable detetion.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialDetectCable|FALSE|BOOLEAN|0x00020006\r
- \r
+\r
## Base address of 16550 serial port registers in MMIO or I/O space. Default is 0x3F8.\r
# @Prompt Base address of serial port registers.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x03F8|UINT64|0x00020002\r
## Maximum address that the DXE Core will allocate the EFI_SYSTEM_TABLE_POINTER\r
# structure. The default value for this PCD is 0, which means that the DXE Core\r
# will allocate the buffer from the EFI_SYSTEM_TABLE_POINTER structure on a 4MB\r
- # boundary as close to the top of memory as feasible. If this PCD is set to a \r
+ # boundary as close to the top of memory as feasible. If this PCD is set to a\r
# value other than 0, then the DXE Core will first attempt to allocate the\r
# EFI_SYSTEM_TABLE_POINTER structure on a 4MB boundary below the address specified\r
# by this PCD, and if that allocation fails, retry the allocation on a 4MB\r
## Indicates if to shadow PEIM on S3 boot path after memory is ready.<BR><BR>\r
# TRUE - Shadow PEIM on S3 boot path after memory is ready.<BR>\r
# FALSE - Not shadow PEIM on S3 boot path after memory is ready.<BR>\r
- # @Prompt Shadow Peim On S3 Boot. \r
+ # @Prompt Shadow Peim On S3 Boot.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdShadowPeimOnS3Boot|FALSE|BOOLEAN|0x30001028\r
\r
+ ## Indicates if to shadow PEIM and PeiCore after memory is ready.<BR><BR>\r
+ # This PCD is used on other boot path except for S3 boot.\r
+ # TRUE - Shadow PEIM and PeiCore after memory is ready.<BR>\r
+ # FALSE - Not shadow PEIM after memory is ready.<BR>\r
+ # @Prompt Shadow Peim and PeiCore on boot\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdShadowPeimOnBoot|TRUE|BOOLEAN|0x30001029\r
+\r
## The mask is used to control memory profile behavior.<BR><BR>\r
# BIT0 - Enable UEFI memory profile.<BR>\r
# BIT1 - Enable SMRAM profile.<BR>\r
gEfiMdeModulePkgTokenSpaceGuid.PcdMemoryProfileMemoryType|0x0|UINT64|0x30001042\r
\r
## PCI Serial Device Info. It is an array of Device, Function, and Power Management\r
- # information that describes the path that contains zero or more PCI to PCI briges \r
- # followed by a PCI serial device. Each array entry is 4-bytes in length. The \r
- # first byte is the PCI Device Number, then second byte is the PCI Function Number, \r
- # and the last two bytes are the offset to the PCI power management capabilities \r
- # register used to manage the D0-D3 states. If a PCI power management capabilities \r
- # register is not present, then the last two bytes in the offset is set to 0. The \r
- # array is terminated by an array entry with a PCI Device Number of 0xFF. For a \r
+ # information that describes the path that contains zero or more PCI to PCI briges\r
+ # followed by a PCI serial device. Each array entry is 4-bytes in length. The\r
+ # first byte is the PCI Device Number, then second byte is the PCI Function Number,\r
+ # and the last two bytes are the offset to the PCI power management capabilities\r
+ # register used to manage the D0-D3 states. If a PCI power management capabilities\r
+ # register is not present, then the last two bytes in the offset is set to 0. The\r
+ # array is terminated by an array entry with a PCI Device Number of 0xFF. For a\r
# non-PCI fixed address serial device, such as an ISA serial device, the value is 0xFF.\r
# @Prompt Pci Serial Device Info\r
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo|{0xFF}|VOID*|0x00010067\r
\r
- ## Serial Port Extended Transmit FIFO Size. The default is 64 bytes. \r
+ ## PCI Serial Parameters. It is an array of VendorID, DeviceID, ClockRate, Offset,\r
+ # BarIndex, RegisterStride, ReceiveFifoDepth, TransmitFifoDepth information that\r
+ # describes the parameters of special PCI serial devices.\r
+ # Each array entry is 24-byte in length. The array is terminated\r
+ # by an array entry with a PCI Vendor ID of 0xFFFF. If a platform only contains a\r
+ # standard 16550 PCI serial device whose class code is 7/0/2, the value is 0xFFFF.\r
+ # The C style structure is defined as below:<BR>\r
+ # typedef struct {<BR>\r
+ # UINT16 VendorId; ///< Vendor ID to match the PCI device. The value 0xFFFF terminates the list of entries.<BR>\r
+ # UINT16 DeviceId; ///< Device ID to match the PCI device.<BR>\r
+ # UINT32 ClockRate; ///< UART clock rate. Set to 0 for default clock rate of 1843200 Hz.<BR>\r
+ # UINT64 Offset; ///< The byte offset into to the BAR.<BR>\r
+ # UINT8 BarIndex; ///< Which BAR to get the UART base address.<BR>\r
+ # UINT8 RegisterStride; ///< UART register stride in bytes. Set to 0 for default register stride of 1 byte.<BR>\r
+ # UINT16 ReceiveFifoDepth; ///< UART receive FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.<BR>\r
+ # UINT16 TransmitFifoDepth; ///< UART transmit FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.<BR>\r
+ # UINT8 Reserved[2];<BR>\r
+ # } PCI_SERIAL_PARAMETER;<BR>\r
+ # It contains zero or more instances of the above structure.<BR>\r
+ # For example, if a PCI device contains two UARTs, PcdPciSerialParameters needs\r
+ # to contain two instances of the above structure, with the VendorId and DeviceId\r
+ # equals to the Device ID and Vendor ID of the device; If the PCI device uses the\r
+ # first two BARs to support two UARTs, BarIndex of first instance equals to 0 and\r
+ # BarIndex of second one equals to 1; If the PCI device uses the first BAR to\r
+ # support both UARTs, BarIndex of both instance equals to 0, Offset of first\r
+ # instance equals to 0 and Offset of second one equals to a value bigger than or\r
+ # equal to 8.<BR>\r
+ # For certain UART whose register needs to be accessed in DWORD aligned address,\r
+ # RegisterStride equals to 4.\r
+ # @Prompt Pci Serial Parameters\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPciSerialParameters|{0xFF, 0xFF}|VOID*|0x00010071\r
+\r
+ ## Serial Port Extended Transmit FIFO Size. The default is 64 bytes.\r
# @Prompt Serial Port Extended Transmit FIFO Size in Bytes\r
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize|64|UINT32|0x00010068\r
- \r
+\r
## This PCD points to the file name GUID of the BootManagerMenuApp\r
# Platform can customize the PCD to point to different application for Boot Manager Menu\r
# @Prompt Boot Manager Menu File\r
## The number of bytes between registers in serial device. The default is 1 byte.\r
# @Prompt Serial Port Register Stride in Bytes\r
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride|1|UINT32|0x0001006d\r
- \r
+\r
+ ## This PCD to include the driver guid of VFR drivers for VarCheckHiiBin generation.<BR><BR>\r
+ # Default is gZeroGuid that means no VFR driver will be parsed for VarCheckHiiBin generation.<BR>\r
+ # If it is set to an all FFs GUID, it means all modules in all FVs will be parsed for VarCheckHiiBin generation.<BR>\r
+ # @Prompt Driver guid array of VFR drivers for VarCheckHiiBin generation.\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdVarCheckVfrDriverGuidArray|{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }|VOID*|0x3000103A\r
+\r
[PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]\r
## This PCD defines the Console output row. The default value is 25 according to UEFI spec.\r
# This PCD could be set to 0 then console output would be at max column and max row.\r
# @Prompt Foreground color for browser subtile.\r
# @ValidRange 0x80000004 | 0x00 - 0x0F\r
gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserSubtitleTextColor|0x01|UINT8|0x00010057\r
- \r
+\r
## Specify the foreground color for prompt and Question value text in HII Form Browser. The default value is EFI_BLACK.\r
# Only following values defined in UEFI specification are valid:<BR><BR>\r
# 0x00 (EFI_BLACK)<BR>\r
# @Prompt Foreground color for browser field.\r
# @ValidRange 0x80000004 | 0x00 - 0x0F\r
gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserFieldTextColor|0x00|UINT8|0x00010058\r
- \r
+\r
## Specify the foreground color for highlighted prompt and Question value text in HII Form Browser.\r
# The default value is EFI_LIGHTGRAY. Only following values defined in UEFI specification are valid:<BR><BR>\r
# 0x00 (EFI_BLACK)<BR>\r
# @Prompt Foreground color for highlighted browser field.\r
# @ValidRange 0x80000004 | 0x00 - 0x0F\r
gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserFieldTextHighlightColor|0x07|UINT8|0x00010059\r
- \r
+\r
## Specify the background color for highlighted prompt and Question value text in HII Form Browser.\r
# The default value is EFI_BACKGROUND_BLACK. Only following values defined in UEFI specification are valid:<BR><BR>\r
# 0x00 (EFI_BACKGROUND_BLACK)<BR>\r
# @Prompt SATA spin-up delay time in second for recovery path.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdSataSpinUpDelayInSecForRecoveryPath|15|UINT16|0x0001005B\r
\r
- ## This PCD is used to specify memory size with page number for a pre-allocated ACPI NVS memory to hold\r
- # runtime created S3 boot script entries. The default page number is 2. When changing the value of this\r
- # PCD, the platform developer should make sure the memory size is large enough to hold the S3 boot\r
- # script node created in runtime phase.\r
+ ## This PCD is used to specify memory size with page number for a pre-allocated ACPI reserved memory\r
+ # to hold runtime(after SmmReadyToLock) created S3 boot script entries. The default page number is 2.\r
+ # When changing the value of this PCD, the platform developer should make sure the memory size is\r
+ # large enough to hold the S3 boot script node created in runtime(after SmmReadyToLock) phase.\r
# @Prompt Reserved page number for S3 Boot Script Runtime Table.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdS3BootScriptRuntimeTableReservePageNumber|0x2|UINT16|0x0001005C\r
\r
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId|"INTEL "|VOID*|0x30001034\r
\r
## Default OEM Table ID for ACPI table creation, it is "EDK2 ".\r
+ # According to ACPI specification, this field is particularly useful when\r
+ # defining a definition block to distinguish definition block functions.\r
+ # The OEM assigns each dissimilar table a new OEM Table ID.\r
+ # This PCD is ignored for definition block.\r
# @Prompt Default OEM Table ID for ACPI table creation.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId|0x20202020324B4445|UINT64|0x30001035\r
\r
## Default OEM Revision for ACPI table creation.\r
+ # According to ACPI specification, for LoadTable() opcode, the OS can also\r
+ # check the OEM Table ID and Revision ID against a database for a newer\r
+ # revision Definition Block of the same OEM Table ID and load it instead.\r
+ # This PCD is ignored for definition block.\r
# @Prompt Default OEM Revision for ACPI table creation.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision|0x00000002|UINT32|0x30001036\r
\r
## Default Creator ID for ACPI table creation.\r
+ # According to ACPI specification, for tables containing Definition Blocks,\r
+ # this is the ID for the ASL Compiler.\r
+ # This PCD is ignored for definition block.\r
# @Prompt Default Creator ID for ACPI table creation.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId|0x20202020|UINT32|0x30001037\r
\r
## Default Creator Revision for ACPI table creation.\r
+ # According to ACPI specification, for tables containing Definition Blocks,\r
+ # this is the revision for the ASL Compiler.\r
+ # This PCD is ignored for definition block.\r
# @Prompt Default Creator Revision for ACPI table creation.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision|0x01000013|UINT32|0x30001038\r
\r
+ ## Indicates if to set NX for stack.<BR><BR>\r
+ # For the DxeIpl and the DxeCore are both X64, set NX for stack feature also require PcdDxeIplBuildPageTables be TRUE.<BR>\r
+ # For the DxeIpl and the DxeCore are both IA32 (PcdDxeIplSwitchToLongMode is FALSE), set NX for stack feature also require\r
+ # IA32 PAE is supported and Execute Disable Bit is available.<BR>\r
+ # TRUE - to set NX for stack.<BR>\r
+ # FALSE - Not to set NX for stack.<BR>\r
+ # @Prompt Set NX for stack.\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack|FALSE|BOOLEAN|0x0001006f\r
+\r
[PcdsPatchableInModule]\r
## Specify memory size with page number for PEI code when\r
# Loading Module at Fixed Address feature is enabled.\r
# @Prompt LMFA PEI code page number.\r
# @ValidList 0x80000001 | 0\r
gEfiMdeModulePkgTokenSpaceGuid.PcdLoadFixAddressPeiCodePageNumber|0|UINT32|0x00000029\r
- \r
+\r
## Specify memory size with page number for DXE boot time code when\r
# Loading Module at Fixed Address feature is enabled.\r
# The value will be set by the build tool.\r
# @Prompt LMFA DXE boot code page number.\r
# @ValidList 0x80000001 | 0\r
gEfiMdeModulePkgTokenSpaceGuid.PcdLoadFixAddressBootTimeCodePageNumber|0|UINT32|0x0000002a\r
- \r
+\r
## Specify memory size with page number for DXE runtime code when\r
# Loading Module at Fixed Address feature is enabled.\r
# The value will be set by the build tool.\r
# @Prompt LMFA DXE runtime code page number.\r
# @ValidList 0x80000001 | 0\r
gEfiMdeModulePkgTokenSpaceGuid.PcdLoadFixAddressRuntimeCodePageNumber|0|UINT32|0x0000002b\r
- \r
+\r
## Specify memory size with page number for SMM code when\r
# Loading Module at Fixed Address feature is enabled.\r
# The value will be set by the build tool.\r
# @ValidList 0x80000001 | 0x0\r
gEfiMdeModulePkgTokenSpaceGuid.PcdS3BootScriptTablePrivateSmmDataPtr|0x0|UINT64|0x00030001\r
\r
- ## This dynamic PCD hold an address to point to the memory of page table. The page table establishes a 1:1 \r
+ ## This dynamic PCD hold an address to point to the memory of page table. The page table establishes a 1:1\r
# Virtual to Physical mapping according to the processor physical address bits.\r
# @Prompt Identify Mapping Page Table pointer.\r
# @ValidList 0x80000001 | 0x0\r
projects / mirror_edk2.git / blobdiff