- # The C style structure is defined as below:\r
- # typedef struct {\r
- # UINT16 VendorId; ///< Vendor ID to match the PCI device. The value 0xFFFF terminates the list of entries.\r
- # UINT16 DeviceId; ///< Device ID to match the PCI device\r
- # UINT32 ClockRate; ///< UART clock rate. Set to 0 for default clock rate of 1843200 Hz\r
- # UINT64 Offset; ///< The byte offset into to the BAR\r
- # UINT8 BarIndex; ///< Which BAR to get the UART base address\r
- # UINT8 RegisterStride; ///< UART register stride in bytes. Set to 0 for default register stride of 1 byte.\r
- # UINT16 ReceiveFifoDepth; ///< UART receive FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.\r
- # UINT16 TransmitFifoDepth; ///< UART transmit FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.\r
- # UINT8 Reserved[2];\r
- # } PCI_SERIAL_PARAMETER;\r
- # It contains zero or more instances of the above structure.\r
+ # The C style structure is defined as below:<BR>\r
+ # typedef struct {<BR>\r
+ # UINT16 VendorId; ///< Vendor ID to match the PCI device. The value 0xFFFF terminates the list of entries.<BR>\r
+ # UINT16 DeviceId; ///< Device ID to match the PCI device.<BR>\r
+ # UINT32 ClockRate; ///< UART clock rate. Set to 0 for default clock rate of 1843200 Hz.<BR>\r
+ # UINT64 Offset; ///< The byte offset into to the BAR.<BR>\r
+ # UINT8 BarIndex; ///< Which BAR to get the UART base address.<BR>\r
+ # UINT8 RegisterStride; ///< UART register stride in bytes. Set to 0 for default register stride of 1 byte.<BR>\r
+ # UINT16 ReceiveFifoDepth; ///< UART receive FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.<BR>\r
+ # UINT16 TransmitFifoDepth; ///< UART transmit FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.<BR>\r
+ # UINT8 Reserved[2];<BR>\r
+ # } PCI_SERIAL_PARAMETER;<BR>\r
+ # It contains zero or more instances of the above structure.<BR>\r