Revert "EhciDxe: Use common buffer for AsyncInterruptTransfer"

[mirror_edk2.git] / MdeModulePkg / MdeModulePkg.uni

diff --git a/MdeModulePkg/MdeModulePkg.uni b/MdeModulePkg/MdeModulePkg.uni
index a6bcb627cf3ba425d075e92c9b7955c95560e53b..5fa7a6ae30cc96068d75dc3c05a27f4741e05dc5 100644 (file)
--- a/MdeModulePkg/MdeModulePkg.uni
+++ b/MdeModulePkg/MdeModulePkg.uni
@@ -1171,6 +1171,7 @@
                                                                                         " before and after corresponding type of pages allocated if there's enough\n"\r
                                                                                         " free pages for all of them. The page allocation for the type related to\n"\r
                                                                                         " cleared bits keeps the same as ususal.\n\n"\r
+                                                                                        " This PCD is only valid if BIT0 and/or BIT2 are set in PcdHeapGuardPropertyMask.\n\n"\r
                                                                                         " Below is bit mask for this PCD: (Order is same as UEFI spec)<BR>\n"\r
                                                                                         "  EfiReservedMemoryType             0x0000000000000001\n"\r
                                                                                         "  EfiLoaderCode                     0x0000000000000002\n"\r
@@ -1198,6 +1199,7 @@
                                                                                         " before and after corresponding type of pages which the allocated pool occupies,\n"\r
                                                                                         " if there's enough free memory for all of them. The pool allocation for the\n"\r
                                                                                         " type related to cleared bits keeps the same as ususal.\n\n"\r
+                                                                                        " This PCD is only valid if BIT1 and/or BIT3 are set in PcdHeapGuardPropertyMask.\n\n"\r
                                                                                         " Below is bit mask for this PCD: (Order is same as UEFI spec)<BR>\n"\r
                                                                                         "  EfiReservedMemoryType             0x0000000000000001\n"\r
                                                                                         "  EfiLoaderCode                     0x0000000000000002\n"\r
@@ -1222,14 +1224,20 @@
 #string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdHeapGuardPropertyMask_PROMPT  #language en-US "The Heap Guard feature mask"\r
 \r
 #string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdHeapGuardPropertyMask_HELP    #language en-US "This mask is to control Heap Guard behavior.\n"\r
-                                                                                            "Note that due to the limit of pool memory implementation and the alignment\n"\r
-                                                                                            "requirement of UEFI spec, BIT7 is a try-best setting which cannot guarantee\n"\r
-                                                                                            "that the returned pool is exactly adjacent to head guard page or tail guard\n"\r
-                                                                                            "page.\n"\r
+                                                                                            " Note:\n"\r
+                                                                                            "   a) Heap Guard is for debug purpose and should not be enabled in product"\r
+                                                                                            "      BIOS.\n"\r
+                                                                                            "   b) Due to the limit of pool memory implementation and the alignment"\r
+                                                                                            "      requirement of UEFI spec, BIT7 is a try-best setting which cannot"\r
+                                                                                            "      guarantee that the returned pool is exactly adjacent to head guard"\r
+                                                                                            "      page or tail guard page.\n"\r
+                                                                                            "   c) UEFI freed-memory guard and UEFI pool/page guard cannot be enabled"\r
+                                                                                            "      at the same time.\n"\r
                                                                                             "   BIT0 - Enable UEFI page guard.<BR>\n"\r
                                                                                             "   BIT1 - Enable UEFI pool guard.<BR>\n"\r
                                                                                             "   BIT2 - Enable SMM page guard.<BR>\n"\r
                                                                                             "   BIT3 - Enable SMM pool guard.<BR>\n"\r
+                                                                                            "   BIT4 - Enable UEFI freed-memory guard (Use-After-Free memory detection).<BR>\n"\r
                                                                                             "   BIT7 - The direction of Guard Page for Pool Guard.\n"\r
                                                                                             "          0 - The returned pool is near the tail guard page.<BR>\n"\r
                                                                                             "          1 - The returned pool is near the head guard page.<BR>"\r