// It also provides the definitions(including PPIs/PROTOCOLs/GUIDs and library classes)\r
// and libraries instances, which are used for those modules.\r
//\r
-// Copyright (c) 2007 - 2019, Intel Corporation. All rights reserved.<BR>\r
+// Copyright (c) 2007 - 2020, Intel Corporation. All rights reserved.<BR>\r
//\r
// SPDX-License-Identifier: BSD-2-Clause-Patent\r
//\r
"TRUE - Shadow PEIM on S3 boot path after memory is ready.<BR>\n"\r
"FALSE - Not shadow PEIM on S3 boot path after memory is ready.<BR>"\r
\r
+#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdMigrateTemporaryRamFirmwareVolumes_HELP #language en-US "Enable the feature that evacuate temporary memory to permanent memory or not.<BR><BR>\n"\r
+ "It will allocate page to save the temporary PEIMs resided in NEM(or CAR) to the permanent memory and change all pointers pointed to the NEM(or CAR) to permanent memory.<BR><BR>\n"\r
+ "After then, there are no pointer pointed to NEM(or CAR) and TOCTOU volnerability can be avoid.<BR><BR>\n"\r
+\r
+#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdMigrateTemporaryRamFirmwareVolumes_PROMPT #language en-US "Enable the feature that evacuate temporary memory to permanent memory or not"\r
+\r
#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdAcpiDefaultOemId_PROMPT #language en-US "Default OEM ID for ACPI table creation"\r
\r
#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdAcpiDefaultOemId_HELP #language en-US "Default OEM ID for ACPI table creation, its length must be 0x6 bytes to follow ACPI specification."\r
#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdFrontPageFormSetGuid_HELP #language en-US "This PCD points to the front page formset GUID\n"\r
"Compare the FormsetGuid or ClassGuid with this PCD value can detect whether in front page"\r
\r
-#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdPropertiesTableEnable_PROMPT #language en-US "Publish UEFI PropertiesTable."\r
-\r
-#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdPropertiesTableEnable_HELP #language en-US "Publish PropertiesTable or not.\n"\r
- "\n"\r
- "If this PCD is TRUE, DxeCore publishs PropertiesTable.\n"\r
- "DxeCore evaluates if all runtime drivers has 4K aligned PE sections. If all\n"\r
- "PE sections in runtime drivers are 4K aligned, DxeCore sets BIT0 in\n"\r
- "PropertiesTable. Or DxeCore clears BIT0 in PropertiesTable.\n"\r
- "If this PCD is FALSE, DxeCore does not publish PropertiesTable.\n"\r
- "\n"\r
- "If PropertiesTable has BIT0 set, DxeCore uses below policy in UEFI memory map:\n"\r
- "1) Use EfiRuntimeServicesCode for runtime driver PE image code section and\n"\r
- "use EfiRuntimeServicesData for runtime driver PE image header and other section.\n"\r
- "2) Set EfiRuntimeServicesCode to be EFI_MEMORY_RO.\n"\r
- "3) Set EfiRuntimeServicesData to be EFI_MEMORY_XP.\n"\r
- "4) Set EfiMemoryMappedIO and EfiMemoryMappedIOPortSpace to be EFI_MEMORY_XP.\n"\r
- "\n"\r
- "NOTE: Platform need gurantee this PCD is set correctly. Platform should set\n"\r
- "this PCD to be TURE if and only if all runtime driver has seperated Code/Data\n"\r
- "section. If PE code/data sections are merged, the result is unpredictable.\n"\r
-\r
#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdShadowPeimOnBoot_HELP #language en-US "Indicates if to shadow PEIM and PeiCore after memory is ready.<BR><BR>\n"\r
"This PCD is used on other boot path except for S3 boot.\n"\r
"TRUE - Shadow PEIM and PeiCore after memory is ready.<BR>\n"\r
"TRUE - All PCI MMIO BARs of a device will be located below 4 GB if it has an option ROM.<BR>"\r
"FALSE - PCI MMIO BARs of a device may be located above 4 GB even if it has an option ROM.<BR>"\r
\r
+#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdSupportProcessCapsuleAtRuntime_PROMPT #language en-US "Enable process non-reset capsule image at runtime."\r
+\r
+#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdSupportProcessCapsuleAtRuntime_HELP #language en-US "Indicates if the platform can support process non-reset capsule image at runtime.<BR><BR>\n"\r
+ "TRUE - Supports process non-reset capsule image at runtime.<BR>\n"\r
+ "FALSE - Does not support process non-reset capsule image at runtime.<BR>"\r
+\r
+\r
#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdStatusCodeSubClassCapsule_PROMPT #language en-US "Status Code for Capsule subclass definitions"\r
\r
#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdStatusCodeSubClassCapsule_HELP #language en-US "Status Code for Capsule subclass definitions.<BR><BR>\n"\r
"when the PCD is TRUE but CPU doesn't support 5-Level Paging."\r
" TRUE - 5-Level Paging will be enabled."\r
" FALSE - 5-Level Paging will not be enabled."\r
+\r
+#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdTcgPfpMeasurementRevision_PROMPT #language en-US "TCG Platform Firmware Profile revision"\r
+\r
+#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdTcgPfpMeasurementRevision_HELP #language en-US "Indicates which TCG Platform Firmware Profile revision the EDKII firmware follows."\r
+\r
+#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdGhcbBase_PROMPT #language en-US "Guest-Hypervisor Communication Block (GHCB) Pool Base Address"\r
+\r
+#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdGhcbBase_HELP #language en-US "Used with SEV-ES support to identify an address range that is not to be encrypted."\r
+\r
+#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdGhcbSize_PROMPT #language en-US "Guest-Hypervisor Communication Block (GHCB) Pool Base Size"\r
+\r
+#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdGhcbSize_HELP #language en-US "Used with SEV-ES support to identify the size of the address range that is not to be encrypted."\r
projects / mirror_edk2.git / blobdiff