MdeModulePkg: Replace BSD License with BSD+Patent License

[mirror_edk2.git] / MdeModulePkg / Universal / CapsulePei / X64 / X64Entry.c

diff --git a/MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c b/MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c
index e1871c3c2ad585f89924f0471fccefcf0fec7d37..4a0567fa7664fb83948d02b25da9779551183e01 100644 (file)
--- a/MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c
+++ b/MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c
@@ -1,16 +1,10 @@
 /** @file\r
   The X64 entrypoint is used to process capsule in long mode.\r
 \r
-Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>\r
 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
 \r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution.  The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
 \r
@@ -165,7 +159,7 @@ PageFaultHandler (
   //\r
   // Get the IDT Descriptor.\r
   //\r
-  AsmReadIdtr ((IA32_DESCRIPTOR *) &Idtr); \r
+  AsmReadIdtr ((IA32_DESCRIPTOR *) &Idtr);\r
   //\r
   // Then get page fault context by IDT Descriptor.\r
   //\r
@@ -233,7 +227,7 @@ _ModuleEntryPoint (
   //\r
   // Save the IA32 IDT Descriptor\r
   //\r
-  AsmReadIdtr ((IA32_DESCRIPTOR *) &Ia32Idtr); \r
+  AsmReadIdtr ((IA32_DESCRIPTOR *) &Ia32Idtr);\r
 \r
   //\r
   // Setup X64 IDT table\r
@@ -241,7 +235,7 @@ _ModuleEntryPoint (
   ZeroMem (PageFaultIdtTable.IdtEntryTable, sizeof (IA32_IDT_GATE_DESCRIPTOR) * EXCEPTION_VECTOR_NUMBER);\r
   X64Idtr.Base = (UINTN) PageFaultIdtTable.IdtEntryTable;\r
   X64Idtr.Limit = (UINT16) (sizeof (IA32_IDT_GATE_DESCRIPTOR) * EXCEPTION_VECTOR_NUMBER - 1);\r
-  AsmWriteIdtr ((IA32_DESCRIPTOR *) &X64Idtr);  \r
+  AsmWriteIdtr ((IA32_DESCRIPTOR *) &X64Idtr);\r
 \r
   //\r
   // Setup the default CPU exception handlers\r
@@ -272,7 +266,7 @@ _ModuleEntryPoint (
              (VOID **) (UINTN) EntrypointContext->MemoryBase64Ptr,\r
              (UINTN *) (UINTN) EntrypointContext->MemorySize64Ptr\r
              );\r
-  \r
+\r
   ReturnContext->ReturnStatus = Status;\r
 \r
   DEBUG ((\r
@@ -290,8 +284,8 @@ _ModuleEntryPoint (
   //\r
   // Restore IA32 IDT table\r
   //\r
-  AsmWriteIdtr ((IA32_DESCRIPTOR *) &Ia32Idtr);  \r
-  \r
+  AsmWriteIdtr ((IA32_DESCRIPTOR *) &Ia32Idtr);\r
+\r
   //\r
   // Finish to coalesce capsule, and return to 32-bit mode.\r
   //\r
@@ -301,8 +295,8 @@ _ModuleEntryPoint (
     (UINT32) (UINTN) EntrypointContext,\r
     (UINT32) (UINTN) ReturnContext,\r
     (UINT32) (EntrypointContext->StackBufferBase + EntrypointContext->StackBufferLength)\r
-    );  \r
-  \r
+    );\r
+\r
   //\r
   // Should never be here.\r
   //\r