#include "EbcExecute.h"\r
#include "EbcSupport.h"\r
\r
+/**\r
+ Given raw bytes of Itanium based code, format them into a bundle and\r
+ write them out.\r
+\r
+ @param MemPtr pointer to memory location to write the bundles\r
+ to.\r
+ @param Template 5-bit template.\r
+ @param Slot0 Instruction slot 0 data for the bundle.\r
+ @param Slot1 Instruction slot 1 data for the bundle.\r
+ @param Slot2 Instruction slot 2 data for the bundle.\r
+\r
+ @retval EFI_INVALID_PARAMETER Pointer is not aligned\r
+ @retval EFI_INVALID_PARAMETER No more than 5 bits in template\r
+ @retval EFI_INVALID_PARAMETER More than 41 bits used in code\r
+ @retval EFI_SUCCESS All data is written.\r
+\r
+**/\r
STATIC\r
EFI_STATUS\r
WriteBundle (\r
IN UINT64 Slot2\r
);\r
\r
+/**\r
+ Pushes a 64 bit unsigned value to the VM stack.\r
+\r
+ @param VmPtr The pointer to current VM context.\r
+ @param Arg The value to be pushed.\r
+\r
+**/\r
STATIC\r
VOID\r
PushU64 (\r
- VM_CONTEXT *VmPtr,\r
- UINT64 Arg\r
+ IN VM_CONTEXT *VmPtr,\r
+ IN UINT64 Arg\r
)\r
{\r
//\r
*(UINT64 *) VmPtr->R[0] = Arg;\r
}\r
\r
+/**\r
+ Begin executing an EBC image. The address of the entry point is passed\r
+ in via a processor register, so we'll need to make a call to get the\r
+ value.\r
+\r
+ This is a thunk function. Microsoft x64 compiler only provide fast_call\r
+ calling convention, so the first four arguments are passed by rcx, rdx,\r
+ r8, and r9, while other arguments are passed in stack.\r
+\r
+ @param Arg1 The 1st argument.\r
+ @param ... The variable arguments list.\r
+\r
+ @return The value returned by the EBC application we're going to run.\r
+\r
+**/\r
STATIC\r
UINT64\r
EbcInterpret (\r
\r
\r
/**\r
- IPF implementation.\r
Begin executing an EBC image. The address of the entry point is passed\r
in via a processor register, so we'll need to make a call to get the\r
value.\r
\r
- @param ImageHandle image handle for the EBC application we're\r
- executing\r
- @param SystemTable standard system table passed into an driver's\r
- entry point\r
+ @param ImageHandle image handle for the EBC application we're executing\r
+ @param SystemTable standard system table passed into an driver's entry\r
+ point\r
\r
@return The value returned by the EBC application we're going to run.\r
\r
/**\r
Create thunks for an EBC image entry point, or an EBC protocol service.\r
\r
- @param ImageHandle Image handle for the EBC image. If not null, then\r
- we're creating a thunk for an image entry point.\r
- @param EbcEntryPoint Address of the EBC code that the thunk is to call\r
- @param Thunk Returned thunk we create here\r
- @param Flags Flags indicating options for creating the thunk\r
+ @param ImageHandle Image handle for the EBC image. If not null, then\r
+ we're creating a thunk for an image entry point.\r
+ @param EbcEntryPoint Address of the EBC code that the thunk is to call\r
+ @param Thunk Returned thunk we create here\r
+ @param Flags Flags indicating options for creating the thunk\r
\r
- @return Standard EFI status.\r
+ @retval EFI_SUCCESS The thunk was created successfully.\r
+ @retval EFI_INVALID_PARAMETER The parameter of EbcEntryPoint is not 16-bit\r
+ aligned.\r
+ @retval EFI_OUT_OF_RESOURCES There is not enough memory to created the EBC\r
+ Thunk.\r
+ @retval EFI_BUFFER_TOO_SMALL EBC_THUNK_SIZE is not larger enough.\r
\r
**/\r
EFI_STATUS\r
UINT64 Addr;\r
UINT64 Code[3]; // Code in a bundle\r
UINT64 RegNum; // register number for MOVL\r
- UINT64 I; // bits of MOVL immediate data\r
- UINT64 Ic; // bits of MOVL immediate data\r
- UINT64 Imm5c; // bits of MOVL immediate data\r
- UINT64 Imm9d; // bits of MOVL immediate data\r
- UINT64 Imm7b; // bits of MOVL immediate data\r
+ UINT64 BitI; // bits of MOVL immediate data\r
+ UINT64 BitIc; // bits of MOVL immediate data\r
+ UINT64 BitImm5c; // bits of MOVL immediate data\r
+ UINT64 BitImm9d; // bits of MOVL immediate data\r
+ UINT64 BitImm7b; // bits of MOVL immediate data\r
UINT64 Br; // branch register for loading and jumping\r
UINT64 *Data64Ptr;\r
UINT32 ThunkSize;\r
// Extract bits from the address for insertion into the instruction\r
// i = Addr[63:63]\r
//\r
- I = RShiftU64 (Addr, 63) & 0x01;\r
+ BitI = RShiftU64 (Addr, 63) & 0x01;\r
//\r
// ic = Addr[21:21]\r
//\r
- Ic = RShiftU64 (Addr, 21) & 0x01;\r
+ BitIc = RShiftU64 (Addr, 21) & 0x01;\r
//\r
// imm5c = Addr[20:16] for 5 bits\r
//\r
- Imm5c = RShiftU64 (Addr, 16) & 0x1F;\r
+ BitImm5c = RShiftU64 (Addr, 16) & 0x1F;\r
//\r
// imm9d = Addr[15:7] for 9 bits\r
//\r
- Imm9d = RShiftU64 (Addr, 7) & 0x1FF;\r
+ BitImm9d = RShiftU64 (Addr, 7) & 0x1FF;\r
//\r
// imm7b = Addr[6:0] for 7 bits\r
//\r
- Imm7b = Addr & 0x7F;\r
+ BitImm7b = Addr & 0x7F;\r
\r
//\r
// The EBC entry point will be put into r8, so r8 can be used here\r
//\r
// Next is jumbled data, including opcode and rest of address\r
//\r
- Code[2] = LShiftU64 (Imm7b, 13);\r
+ Code[2] = LShiftU64 (BitImm7b, 13);\r
Code[2] = Code[2] | LShiftU64 (0x00, 20); // vc\r
- Code[2] = Code[2] | LShiftU64 (Ic, 21);\r
- Code[2] = Code[2] | LShiftU64 (Imm5c, 22);\r
- Code[2] = Code[2] | LShiftU64 (Imm9d, 27);\r
- Code[2] = Code[2] | LShiftU64 (I, 36);\r
+ Code[2] = Code[2] | LShiftU64 (BitIc, 21);\r
+ Code[2] = Code[2] | LShiftU64 (BitImm5c, 22);\r
+ Code[2] = Code[2] | LShiftU64 (BitImm9d, 27);\r
+ Code[2] = Code[2] | LShiftU64 (BitI, 36);\r
Code[2] = Code[2] | LShiftU64 ((UINT64)MOVL_OPCODE, 37);\r
Code[2] = Code[2] | LShiftU64 ((RegNum & 0x7F), 6);\r
\r
// Extract bits from the address for insertion into the instruction\r
// i = Addr[63:63]\r
//\r
- I = RShiftU64 (Addr, 63) & 0x01;\r
+ BitI = RShiftU64 (Addr, 63) & 0x01;\r
//\r
// ic = Addr[21:21]\r
//\r
- Ic = RShiftU64 (Addr, 21) & 0x01;\r
+ BitIc = RShiftU64 (Addr, 21) & 0x01;\r
//\r
// imm5c = Addr[20:16] for 5 bits\r
//\r
- Imm5c = RShiftU64 (Addr, 16) & 0x1F;\r
+ BitImm5c = RShiftU64 (Addr, 16) & 0x1F;\r
//\r
// imm9d = Addr[15:7] for 9 bits\r
//\r
- Imm9d = RShiftU64 (Addr, 7) & 0x1FF;\r
+ BitImm9d = RShiftU64 (Addr, 7) & 0x1FF;\r
//\r
// imm7b = Addr[6:0] for 7 bits\r
//\r
- Imm7b = Addr & 0x7F;\r
+ BitImm7b = Addr & 0x7F;\r
\r
//\r
// Put the EBC entry point in r8, which is the location of the return value\r
//\r
// Next is jumbled data, including opcode and rest of address\r
//\r
- Code[2] = LShiftU64 (Imm7b, 13);\r
+ Code[2] = LShiftU64 (BitImm7b, 13);\r
Code[2] = Code[2] | LShiftU64 (0x00, 20); // vc\r
- Code[2] = Code[2] | LShiftU64 (Ic, 21);\r
- Code[2] = Code[2] | LShiftU64 (Imm5c, 22);\r
- Code[2] = Code[2] | LShiftU64 (Imm9d, 27);\r
- Code[2] = Code[2] | LShiftU64 (I, 36);\r
+ Code[2] = Code[2] | LShiftU64 (BitIc, 21);\r
+ Code[2] = Code[2] | LShiftU64 (BitImm5c, 22);\r
+ Code[2] = Code[2] | LShiftU64 (BitImm9d, 27);\r
+ Code[2] = Code[2] | LShiftU64 (BitI, 36);\r
Code[2] = Code[2] | LShiftU64 ((UINT64)MOVL_OPCODE, 37);\r
Code[2] = Code[2] | LShiftU64 ((RegNum & 0x7F), 6);\r
\r
// Extract bits from the address for insertion into the instruction\r
// i = Addr[63:63]\r
//\r
- I = RShiftU64 (Addr, 63) & 0x01;\r
+ BitI = RShiftU64 (Addr, 63) & 0x01;\r
//\r
// ic = Addr[21:21]\r
//\r
- Ic = RShiftU64 (Addr, 21) & 0x01;\r
+ BitIc = RShiftU64 (Addr, 21) & 0x01;\r
//\r
// imm5c = Addr[20:16] for 5 bits\r
//\r
- Imm5c = RShiftU64 (Addr, 16) & 0x1F;\r
+ BitImm5c = RShiftU64 (Addr, 16) & 0x1F;\r
//\r
// imm9d = Addr[15:7] for 9 bits\r
//\r
- Imm9d = RShiftU64 (Addr, 7) & 0x1FF;\r
+ BitImm9d = RShiftU64 (Addr, 7) & 0x1FF;\r
//\r
// imm7b = Addr[6:0] for 7 bits\r
//\r
- Imm7b = Addr & 0x7F;\r
+ BitImm7b = Addr & 0x7F;\r
\r
//\r
// Put it in r31, a scratch register\r
//\r
// Next is jumbled data, including opcode and rest of address\r
//\r
- Code[2] = LShiftU64(Imm7b, 13);\r
+ Code[2] = LShiftU64(BitImm7b, 13);\r
Code[2] = Code[2] | LShiftU64 (0x00, 20); // vc\r
- Code[2] = Code[2] | LShiftU64 (Ic, 21);\r
- Code[2] = Code[2] | LShiftU64 (Imm5c, 22);\r
- Code[2] = Code[2] | LShiftU64 (Imm9d, 27);\r
- Code[2] = Code[2] | LShiftU64 (I, 36);\r
+ Code[2] = Code[2] | LShiftU64 (BitIc, 21);\r
+ Code[2] = Code[2] | LShiftU64 (BitImm5c, 22);\r
+ Code[2] = Code[2] | LShiftU64 (BitImm9d, 27);\r
+ Code[2] = Code[2] | LShiftU64 (BitI, 36);\r
Code[2] = Code[2] | LShiftU64 ((UINT64)MOVL_OPCODE, 37);\r
Code[2] = Code[2] | LShiftU64 ((RegNum & 0x7F), 6);\r
\r
Given raw bytes of Itanium based code, format them into a bundle and\r
write them out.\r
\r
- @param MemPtr pointer to memory location to write the bundles to\r
- @param Template 5-bit template\r
- @param Slot0-2 instruction slot data for the bundle\r
+ @param MemPtr pointer to memory location to write the bundles\r
+ to.\r
+ @param Template 5-bit template.\r
+ @param Slot0 Instruction slot 0 data for the bundle.\r
+ @param Slot1 Instruction slot 1 data for the bundle.\r
+ @param Slot2 Instruction slot 2 data for the bundle.\r
\r
@retval EFI_INVALID_PARAMETER Pointer is not aligned\r
- @retval No more than 5 bits in template\r
- @retval More than 41 bits used in code\r
+ @retval EFI_INVALID_PARAMETER No more than 5 bits in template\r
+ @retval EFI_INVALID_PARAMETER More than 41 bits used in code\r
@retval EFI_SUCCESS All data is written.\r
\r
**/\r
otherwise, set the VM->IP to target EBC code directly to avoid another VM\r
be startup which cost time and stack space.\r
\r
- @param VmPtr Pointer to a VM context.\r
- @param FuncAddr Callee's address\r
- @param NewStackPointer New stack pointer after the call\r
- @param FramePtr New frame pointer after the call\r
- @param Size The size of call instruction\r
-\r
- @return None.\r
+ @param VmPtr Pointer to a VM context.\r
+ @param FuncAddr Callee's address\r
+ @param NewStackPointer New stack pointer after the call\r
+ @param FramePtr New frame pointer after the call\r
+ @param Size The size of call instruction\r
\r
**/\r
VOID\r
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