replace PCI Root Bridge I/O protocol with PciLib to achieve M2 qulity.

[mirror_edk2.git] / MdeModulePkg / Universal / FirmwareVolume / FaultTolerantWriteDxe / Ia32 / Ia32FtwMisc.c

diff --git a/MdeModulePkg/Universal/FirmwareVolume/FaultTolerantWriteDxe/Ia32/Ia32FtwMisc.c b/MdeModulePkg/Universal/FirmwareVolume/FaultTolerantWriteDxe/Ia32/Ia32FtwMisc.c
index 2c359b231c31c96a704e056c6a5787e03e0f483c..3893a6c857e6194b520ee7745a786d2c629505c5 100644 (file)
--- a/MdeModulePkg/Universal/FirmwareVolume/FaultTolerantWriteDxe/Ia32/Ia32FtwMisc.c
+++ b/MdeModulePkg/Universal/FirmwareVolume/FaultTolerantWriteDxe/Ia32/Ia32FtwMisc.c
@@ -35,51 +35,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 \r
 /**\r
 \r
-  Read PCI register value.\r
-  This is a internal function.\r
-\r
-\r
-  @param Offset          Offset of the register\r
-\r
-  @return The pci register value.\r
-\r
-**/\r
-UINT32\r
-ReadPciRegister (\r
-  IN UINT32                 Offset\r
-  )\r
-{\r
-  EFI_STATUS                      Status;\r
-  UINT32                          Value;\r
-  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;\r
-\r
-  Value   = 0;\r
-  Status  = gBS->LocateProtocol (&gEfiPciRootBridgeIoProtocolGuid, NULL, (VOID **) &PciRootBridgeIo);\r
-  if (EFI_ERROR (Status)) {\r
-    DEBUG ((EFI_D_ERROR, "FtwLite: Locate PCI root bridge io protocol - %r", Status));\r
-    return 0;\r
-  }\r
-\r
-  Status = PciRootBridgeIo->Pci.Read (\r
-                                  PciRootBridgeIo,\r
-                                  EfiPciWidthUint32,\r
-                                  EFI_PCI_ADDRESS (\r
-                                    LPC_BUS_NUMBER,\r
-                                    LPC_DEVICE_NUMBER,\r
-                                    LPC_IF,\r
-                                    Offset\r
-                                    ),\r
-                                  1,\r
-                                  &Value\r
-                                  );\r
-  ASSERT_EFI_ERROR (Status);\r
-\r
-  return Value;\r
-}\r
-\r
-/**\r
-\r
-  Get swap state\r
+  Get swap state.\r
 \r
   This is a internal function.\r
 \r
@@ -95,10 +51,13 @@ GetSwapState (
   OUT BOOLEAN               *SwapState\r
   )\r
 {\r
+  UINT32 Value;\r
+  Value = PciRead32(EFI_PCI_ADDRESS (LPC_BUS_NUMBER, LPC_DEVICE_NUMBER, LPC_IF, GEN_STATUS))\r
+\r
   //\r
   // Top swap status is 13 bit\r
   //\r
-  *SwapState = (BOOLEAN) ((ReadPciRegister (GEN_STATUS) & TOP_SWAP_BIT) != 0);\r
+  *SwapState = (BOOLEAN) ((Value & TOP_SWAP_BIT) != 0);\r
 \r
   return EFI_SUCCESS;\r
 }\r
@@ -131,7 +90,7 @@ SetSwapState (
   //\r
   // Top-Swap bit (bit 13, D31: F0, Offset D4h)\r
   //\r
-  GenStatus = ReadPciRegister (GEN_STATUS);\r
+  GenStatus = PciRead32(EFI_PCI_ADDRESS (LPC_BUS_NUMBER, LPC_DEVICE_NUMBER, LPC_IF, GEN_STATUS));\r
 \r
   //\r
   // Set 13 bit, according to input NewSwapState\r
@@ -142,26 +101,10 @@ SetSwapState (
     GenStatus &= ~TOP_SWAP_BIT;\r
   }\r
 \r
-  Status = gBS->LocateProtocol (&gEfiPciRootBridgeIoProtocolGuid, NULL, (VOID **) &PciRootBridgeIo);\r
-  if (EFI_ERROR (Status)) {\r
-    DEBUG ((EFI_D_ERROR, "FtwLite: Locate PCI root bridge io protocol - %r", Status));\r
-    return Status;\r
-  }\r
   //\r
   // Write back the GenStatus register\r
   //\r
-  Status = PciRootBridgeIo->Pci.Write (\r
-                                  PciRootBridgeIo,\r
-                                  EfiPciWidthUint32,\r
-                                  EFI_PCI_ADDRESS (\r
-                                    LPC_BUS_NUMBER,\r
-                                    LPC_DEVICE_NUMBER,\r
-                                    LPC_IF,\r
-                                    GEN_STATUS\r
-                                    ),\r
-                                  1,\r
-                                  &GenStatus\r
-                                  );\r
+  PciWrite32(EFI_PCI_ADDRESS (LPC_BUS_NUMBER, LPC_DEVICE_NUMBER, LPC_IF, GEN_STATUS), GenStatus);\r
 \r
   DEBUG_CODE_BEGIN ();\r
     if (TopSwap) {\r