**/\r
UINTN\r
PciCfgAddressConvert (\r
- EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *Address\r
+ EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *Address\r
)\r
{\r
if (Address->ExtendedRegister == 0) {\r
EFI_STATUS\r
EFIAPI\r
PciCfg2Read (\r
- IN CONST EFI_PEI_SERVICES **PeiServices,\r
- IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r
- IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
- IN UINT64 Address,\r
- IN OUT VOID *Buffer\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN OUT VOID *Buffer\r
)\r
{\r
UINTN PciLibAddress;\r
\r
- PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);\r
+ PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *)&Address);\r
\r
if (Width == EfiPeiPciCfgWidthUint8) {\r
- *((UINT8 *) Buffer) = PciRead8 (PciLibAddress);\r
+ *((UINT8 *)Buffer) = PciRead8 (PciLibAddress);\r
} else if (Width == EfiPeiPciCfgWidthUint16) {\r
if ((PciLibAddress & 0x01) == 0) {\r
//\r
// Aligned Pci address access\r
//\r
- WriteUnaligned16 (((UINT16 *) Buffer), PciRead16 (PciLibAddress));\r
+ WriteUnaligned16 (((UINT16 *)Buffer), PciRead16 (PciLibAddress));\r
} else {\r
//\r
// Unaligned Pci address access, break up the request into byte by byte.\r
//\r
- *((UINT8 *) Buffer) = PciRead8 (PciLibAddress);\r
- *((UINT8 *) Buffer + 1) = PciRead8 (PciLibAddress + 1);\r
+ *((UINT8 *)Buffer) = PciRead8 (PciLibAddress);\r
+ *((UINT8 *)Buffer + 1) = PciRead8 (PciLibAddress + 1);\r
}\r
} else if (Width == EfiPeiPciCfgWidthUint32) {\r
if ((PciLibAddress & 0x03) == 0) {\r
//\r
// Aligned Pci address access\r
//\r
- WriteUnaligned32 (((UINT32 *) Buffer), PciRead32 (PciLibAddress));\r
+ WriteUnaligned32 (((UINT32 *)Buffer), PciRead32 (PciLibAddress));\r
} else if ((PciLibAddress & 0x01) == 0) {\r
//\r
// Unaligned Pci address access, break up the request into word by word.\r
//\r
- WriteUnaligned16 (((UINT16 *) Buffer), PciRead16 (PciLibAddress));\r
- WriteUnaligned16 (((UINT16 *) Buffer + 1), PciRead16 (PciLibAddress + 2));\r
+ WriteUnaligned16 (((UINT16 *)Buffer), PciRead16 (PciLibAddress));\r
+ WriteUnaligned16 (((UINT16 *)Buffer + 1), PciRead16 (PciLibAddress + 2));\r
} else {\r
//\r
// Unaligned Pci address access, break up the request into byte by byte.\r
//\r
- *((UINT8 *) Buffer) = PciRead8 (PciLibAddress);\r
- *((UINT8 *) Buffer + 1) = PciRead8 (PciLibAddress + 1);\r
- *((UINT8 *) Buffer + 2) = PciRead8 (PciLibAddress + 2);\r
- *((UINT8 *) Buffer + 3) = PciRead8 (PciLibAddress + 3);\r
+ *((UINT8 *)Buffer) = PciRead8 (PciLibAddress);\r
+ *((UINT8 *)Buffer + 1) = PciRead8 (PciLibAddress + 1);\r
+ *((UINT8 *)Buffer + 2) = PciRead8 (PciLibAddress + 2);\r
+ *((UINT8 *)Buffer + 3) = PciRead8 (PciLibAddress + 3);\r
}\r
} else {\r
return EFI_INVALID_PARAMETER;\r
EFI_STATUS\r
EFIAPI\r
PciCfg2Write (\r
- IN CONST EFI_PEI_SERVICES **PeiServices,\r
- IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r
- IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
- IN UINT64 Address,\r
- IN OUT VOID *Buffer\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN OUT VOID *Buffer\r
)\r
{\r
UINTN PciLibAddress;\r
\r
- PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);\r
+ PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *)&Address);\r
\r
if (Width == EfiPeiPciCfgWidthUint8) {\r
- PciWrite8 (PciLibAddress, *((UINT8 *) Buffer));\r
+ PciWrite8 (PciLibAddress, *((UINT8 *)Buffer));\r
} else if (Width == EfiPeiPciCfgWidthUint16) {\r
if ((PciLibAddress & 0x01) == 0) {\r
//\r
// Aligned Pci address access\r
//\r
- PciWrite16 (PciLibAddress, ReadUnaligned16 ((UINT16 *) Buffer));\r
+ PciWrite16 (PciLibAddress, ReadUnaligned16 ((UINT16 *)Buffer));\r
} else {\r
//\r
// Unaligned Pci address access, break up the request into byte by byte.\r
//\r
- PciWrite8 (PciLibAddress, *((UINT8 *) Buffer));\r
- PciWrite8 (PciLibAddress + 1, *((UINT8 *) Buffer + 1));\r
+ PciWrite8 (PciLibAddress, *((UINT8 *)Buffer));\r
+ PciWrite8 (PciLibAddress + 1, *((UINT8 *)Buffer + 1));\r
}\r
} else if (Width == EfiPeiPciCfgWidthUint32) {\r
if ((PciLibAddress & 0x03) == 0) {\r
//\r
// Aligned Pci address access\r
//\r
- PciWrite32 (PciLibAddress, ReadUnaligned32 ((UINT32 *) Buffer));\r
+ PciWrite32 (PciLibAddress, ReadUnaligned32 ((UINT32 *)Buffer));\r
} else if ((PciLibAddress & 0x01) == 0) {\r
//\r
// Unaligned Pci address access, break up the request into word by word.\r
//\r
- PciWrite16 (PciLibAddress, ReadUnaligned16 ((UINT16 *) Buffer));\r
- PciWrite16 (PciLibAddress + 2, ReadUnaligned16 ((UINT16 *) Buffer + 1));\r
+ PciWrite16 (PciLibAddress, ReadUnaligned16 ((UINT16 *)Buffer));\r
+ PciWrite16 (PciLibAddress + 2, ReadUnaligned16 ((UINT16 *)Buffer + 1));\r
} else {\r
//\r
// Unaligned Pci address access, break up the request into byte by byte.\r
//\r
- PciWrite8 (PciLibAddress, *((UINT8 *) Buffer));\r
- PciWrite8 (PciLibAddress + 1, *((UINT8 *) Buffer + 1));\r
- PciWrite8 (PciLibAddress + 2, *((UINT8 *) Buffer + 2));\r
- PciWrite8 (PciLibAddress + 3, *((UINT8 *) Buffer + 3));\r
+ PciWrite8 (PciLibAddress, *((UINT8 *)Buffer));\r
+ PciWrite8 (PciLibAddress + 1, *((UINT8 *)Buffer + 1));\r
+ PciWrite8 (PciLibAddress + 2, *((UINT8 *)Buffer + 2));\r
+ PciWrite8 (PciLibAddress + 3, *((UINT8 *)Buffer + 3));\r
}\r
} else {\r
return EFI_INVALID_PARAMETER;\r
return EFI_SUCCESS;\r
}\r
\r
-\r
/**\r
This function performs a read-modify-write operation on the contents from a given\r
location in the PCI configuration space.\r
EFI_STATUS\r
EFIAPI\r
PciCfg2Modify (\r
- IN CONST EFI_PEI_SERVICES **PeiServices,\r
- IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r
- IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
- IN UINT64 Address,\r
- IN VOID *SetBits,\r
- IN VOID *ClearBits\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN VOID *SetBits,\r
+ IN VOID *ClearBits\r
)\r
{\r
UINTN PciLibAddress;\r
UINT32 ClearValue32;\r
UINT32 SetValue32;\r
\r
- PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);\r
+ PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *)&Address);\r
\r
if (Width == EfiPeiPciCfgWidthUint8) {\r
- PciAndThenOr8 (PciLibAddress, (UINT8) (~(*(UINT8 *) ClearBits)), *((UINT8 *) SetBits));\r
+ PciAndThenOr8 (PciLibAddress, (UINT8)(~(*(UINT8 *)ClearBits)), *((UINT8 *)SetBits));\r
} else if (Width == EfiPeiPciCfgWidthUint16) {\r
if ((PciLibAddress & 0x01) == 0) {\r
//\r
// Aligned Pci address access\r
//\r
- ClearValue16 = (UINT16) (~ReadUnaligned16 ((UINT16 *) ClearBits));\r
- SetValue16 = ReadUnaligned16 ((UINT16 *) SetBits);\r
+ ClearValue16 = (UINT16)(~ReadUnaligned16 ((UINT16 *)ClearBits));\r
+ SetValue16 = ReadUnaligned16 ((UINT16 *)SetBits);\r
PciAndThenOr16 (PciLibAddress, ClearValue16, SetValue16);\r
} else {\r
//\r
// Unaligned Pci address access, break up the request into byte by byte.\r
//\r
- PciAndThenOr8 (PciLibAddress, (UINT8) (~(*(UINT8 *) ClearBits)), *((UINT8 *) SetBits));\r
- PciAndThenOr8 (PciLibAddress + 1, (UINT8) (~(*((UINT8 *) ClearBits + 1))), *((UINT8 *) SetBits + 1));\r
+ PciAndThenOr8 (PciLibAddress, (UINT8)(~(*(UINT8 *)ClearBits)), *((UINT8 *)SetBits));\r
+ PciAndThenOr8 (PciLibAddress + 1, (UINT8)(~(*((UINT8 *)ClearBits + 1))), *((UINT8 *)SetBits + 1));\r
}\r
} else if (Width == EfiPeiPciCfgWidthUint32) {\r
if ((PciLibAddress & 0x03) == 0) {\r
//\r
// Aligned Pci address access\r
//\r
- ClearValue32 = (UINT32) (~ReadUnaligned32 ((UINT32 *) ClearBits));\r
- SetValue32 = ReadUnaligned32 ((UINT32 *) SetBits);\r
+ ClearValue32 = (UINT32)(~ReadUnaligned32 ((UINT32 *)ClearBits));\r
+ SetValue32 = ReadUnaligned32 ((UINT32 *)SetBits);\r
PciAndThenOr32 (PciLibAddress, ClearValue32, SetValue32);\r
} else if ((PciLibAddress & 0x01) == 0) {\r
//\r
// Unaligned Pci address access, break up the request into word by word.\r
//\r
- ClearValue16 = (UINT16) (~ReadUnaligned16 ((UINT16 *) ClearBits));\r
- SetValue16 = ReadUnaligned16 ((UINT16 *) SetBits);\r
+ ClearValue16 = (UINT16)(~ReadUnaligned16 ((UINT16 *)ClearBits));\r
+ SetValue16 = ReadUnaligned16 ((UINT16 *)SetBits);\r
PciAndThenOr16 (PciLibAddress, ClearValue16, SetValue16);\r
\r
- ClearValue16 = (UINT16) (~ReadUnaligned16 ((UINT16 *) ClearBits + 1));\r
- SetValue16 = ReadUnaligned16 ((UINT16 *) SetBits + 1);\r
+ ClearValue16 = (UINT16)(~ReadUnaligned16 ((UINT16 *)ClearBits + 1));\r
+ SetValue16 = ReadUnaligned16 ((UINT16 *)SetBits + 1);\r
PciAndThenOr16 (PciLibAddress + 2, ClearValue16, SetValue16);\r
} else {\r
//\r
// Unaligned Pci address access, break up the request into byte by byte.\r
//\r
- PciAndThenOr8 (PciLibAddress, (UINT8) (~(*(UINT8 *) ClearBits)), *((UINT8 *) SetBits));\r
- PciAndThenOr8 (PciLibAddress + 1, (UINT8) (~(*((UINT8 *) ClearBits + 1))), *((UINT8 *) SetBits + 1));\r
- PciAndThenOr8 (PciLibAddress + 2, (UINT8) (~(*((UINT8 *) ClearBits + 2))), *((UINT8 *) SetBits + 2));\r
- PciAndThenOr8 (PciLibAddress + 3, (UINT8) (~(*((UINT8 *) ClearBits + 3))), *((UINT8 *) SetBits + 3));\r
+ PciAndThenOr8 (PciLibAddress, (UINT8)(~(*(UINT8 *)ClearBits)), *((UINT8 *)SetBits));\r
+ PciAndThenOr8 (PciLibAddress + 1, (UINT8)(~(*((UINT8 *)ClearBits + 1))), *((UINT8 *)SetBits + 1));\r
+ PciAndThenOr8 (PciLibAddress + 2, (UINT8)(~(*((UINT8 *)ClearBits + 2))), *((UINT8 *)SetBits + 2));\r
+ PciAndThenOr8 (PciLibAddress + 3, (UINT8)(~(*((UINT8 *)ClearBits + 3))), *((UINT8 *)SetBits + 3));\r
}\r
} else {\r
return EFI_INVALID_PARAMETER;\r
return EFI_SUCCESS;\r
}\r
\r
-EFI_PEI_PCI_CFG2_PPI gPciCfg2Ppi = {\r
+EFI_PEI_PCI_CFG2_PPI gPciCfg2Ppi = {\r
PciCfg2Read,\r
PciCfg2Write,\r
PciCfg2Modify,\r
0\r
};\r
\r
-EFI_PEI_PPI_DESCRIPTOR gPciCfg2PpiList = {\r
+EFI_PEI_PPI_DESCRIPTOR gPciCfg2PpiList = {\r
(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
&gEfiPciCfg2PpiGuid,\r
&gPciCfg2Ppi\r
IN CONST EFI_PEI_SERVICES **PeiServices\r
)\r
{\r
- EFI_STATUS Status;\r
+ EFI_STATUS Status;\r
\r
(**(EFI_PEI_SERVICES **)PeiServices).PciCfg = &gPciCfg2Ppi;\r
- Status = PeiServicesInstallPpi (&gPciCfg2PpiList);\r
+ Status = PeiServicesInstallPpi (&gPciCfg2PpiList);\r
ASSERT_EFI_ERROR (Status);\r
\r
return Status;\r