Code scrub for the following drivers and librarys.

[mirror_edk2.git] / MdeModulePkg / Universal / PcatSingleSegmentPciCfg2Pei / PciCfg2.c

diff --git a/MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PciCfg2.c b/MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PciCfg2.c
index fdd67f7abb86b66483fca1a04631ea4c1e8b20e9..d2ca19c7b065156f2ad3c5c909d8ba37908188f3 100644 (file)
--- a/MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PciCfg2.c
+++ b/MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PciCfg2.c
@@ -1,7 +1,9 @@
 /** @file\r
 /** @file\r

-  Installs Single Segment Pci Configuration PPI.\r
+  This driver installs Single Segment Pci Configuration 2 PPI \r
+  to provide read, write and modify access to Pci configuration space in PEI phase. \r
+  To follow PI specification, these services also support access to the unaligned Pci address.\r

 \r
 \r

-  Copyright (c) 2006 - 2007, Intel Corporation\r
+  Copyright (c) 2006 - 2008, Intel Corporation\r

   All rights reserved. This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
   All rights reserved. This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r


@@ -13,164 +15,19 @@
 **/\r
 \r
 #include <PiPei.h>\r
 **/\r
 \r
 #include <PiPei.h>\r

-\r

 #include <Ppi/PciCfg2.h>\r
 #include <Ppi/PciCfg2.h>\r

-\r

 #include <Library/BaseLib.h>\r
 #include <Library/DebugLib.h>\r
 #include <Library/PciLib.h>\r
 #include <Library/PeimEntryPoint.h>\r
 #include <Library/BaseLib.h>\r
 #include <Library/DebugLib.h>\r
 #include <Library/PciLib.h>\r
 #include <Library/PeimEntryPoint.h>\r

-\r

 #include <IndustryStandard/Pci.h>\r
 \r
 #include <IndustryStandard/Pci.h>\r
 \r

-/**\r
-  Reads from a given location in the PCI configuration space.\r
-\r
-  @param  PeiServices     An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
-\r
-  @param  This            Pointer to local data for the interface.\r
-\r
-  @param  Width           The width of the access. Enumerated in bytes.\r
-                          See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
-\r
-  @param  Address         The physical address of the access. The format of\r
-                          the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
-\r
-  @param  Buffer          A pointer to the buffer of data..\r
-\r
-\r
-  @retval EFI_SUCCESS           The function completed successfully.\r
-\r
-  @retval EFI_DEVICE_ERROR      There was a problem with the transaction.\r
-\r
-  @retval EFI_DEVICE_NOT_READY  The device is not capable of supporting the operation at this\r
-                                time.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-PciCfg2Read (\r
-  IN CONST  EFI_PEI_SERVICES          **PeiServices,\r
-  IN CONST  EFI_PEI_PCI_CFG2_PPI      *This,\r
-  IN        EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
-  IN        UINT64                    Address,\r
-  IN OUT    VOID                      *Buffer\r
-  );\r
-\r
-/**\r
-  Write to a given location in the PCI configuration space.\r
-\r
-  @param  PeiServices     An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
-\r
-  @param  This            Pointer to local data for the interface.\r
-\r
-  @param  Width           The width of the access. Enumerated in bytes.\r
-                          See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
-\r
-  @param  Address         The physical address of the access. The format of\r
-                          the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
-\r
-  @param  Buffer          A pointer to the buffer of data..\r
-\r
-\r
-  @retval EFI_SUCCESS           The function completed successfully.\r
-\r
-  @retval EFI_DEVICE_ERROR      There was a problem with the transaction.\r
-\r
-  @retval EFI_DEVICE_NOT_READY  The device is not capable of supporting the operation at this\r
-                                time.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-PciCfg2Write (\r
-  IN CONST  EFI_PEI_SERVICES          **PeiServices,\r
-  IN CONST  EFI_PEI_PCI_CFG2_PPI      *This,\r
-  IN        EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
-  IN        UINT64                    Address,\r
-  IN OUT    VOID                      *Buffer\r
-  );\r
-\r
-\r
-/**\r
-  PCI read-modify-write operation.\r
-\r
-  @param  PeiServices     An indirect pointer to the PEI Services Table\r
-                          published by the PEI Foundation.\r
-\r
-  @param  This            Pointer to local data for the interface.\r
-\r
-  @param  Width           The width of the access. Enumerated in bytes. Type\r
-                          EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().\r
-\r
-  @param  Address         The physical address of the access.\r
-\r
-  @param  SetBits         Points to value to bitwise-OR with the read configuration value.\r
-\r
-                          The size of the value is determined by Width.\r
-\r
-  @param  ClearBits       Points to the value to negate and bitwise-AND with the read configuration value.\r
-                          The size of the value is determined by Width.\r
-\r
-\r
-  @retval EFI_SUCCESS           The function completed successfully.\r
-\r
-  @retval EFI_DEVICE_ERROR      There was a problem with the transaction.\r
-\r
-  @retval EFI_DEVICE_NOT_READY  The device is not capable of supporting\r
-                                the operation at this time.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-PciCfg2Modify (\r
-  IN CONST  EFI_PEI_SERVICES          **PeiServices,\r
-  IN CONST  EFI_PEI_PCI_CFG2_PPI      *This,\r
-  IN        EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
-  IN        UINT64                    Address,\r
-  IN        VOID                      *SetBits,\r
-  IN        VOID                      *ClearBits\r
-  );\r
-\r
-\r
-\r
-/**\r
-  @par Ppi Description:\r
-  The EFI_PEI_PCI_CFG2_PPI interfaces are used to abstract\r
-  accesses to PCI controllers behind a PCI root bridge\r
-  controller.\r
-\r
-  @param Read     PCI read services.  See the Read() function description.\r
-\r
-  @param Write    PCI write services.  See the Write() function description.\r
-\r
-  @param Modify   PCI read-modify-write services.  See the Modify() function description.\r
-\r
-  @param Segment  The PCI bus segment which the specified functions will access.\r
-\r
-**/\r
-GLOBAL_REMOVE_IF_UNREFERENCED\r
-EFI_PEI_PCI_CFG2_PPI gPciCfg2Ppi = {\r
-  PciCfg2Read,\r
-  PciCfg2Write,\r
-  PciCfg2Modify\r
-};\r
-\r
-GLOBAL_REMOVE_IF_UNREFERENCED\r
-EFI_PEI_PPI_DESCRIPTOR gPciCfg2PpiList = {\r
-  (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
-  &gEfiPciCfg2PpiGuid,\r
-  &gPciCfg2Ppi\r
-};\r
-\r
-\r

 /**\r
    Convert EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS to PCI_LIB_ADDRESS.\r
 \r
 /**\r
    Convert EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS to PCI_LIB_ADDRESS.\r
 \r

-   @param Address   PCI address with\r
-                    EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS format.\r
+   @param Address   PCI address with EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS format.\r

 \r
 \r

-   @return The PCI address with PCI_LIB_ADDRESS format.\r
+   @return PCI address with PCI_LIB_ADDRESS format.\r

 \r
 **/\r
 UINTN\r
 \r
 **/\r
 UINTN\r


@@ -185,30 +42,20 @@ PciCfgAddressConvert (
   return PCI_LIB_ADDRESS (Address->Bus, Address->Device, Address->Function, Address->ExtendedRegister);\r
 }\r
 \r
   return PCI_LIB_ADDRESS (Address->Bus, Address->Device, Address->Function, Address->ExtendedRegister);\r
 }\r
 \r

-\r

 /**\r
   Reads from a given location in the PCI configuration space.\r
 \r
   @param  PeiServices     An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
 /**\r
   Reads from a given location in the PCI configuration space.\r
 \r
   @param  PeiServices     An indirect pointer to the PEI Services Table published by the PEI Foundation.\r

-\r

   @param  This            Pointer to local data for the interface.\r
   @param  This            Pointer to local data for the interface.\r

-\r

   @param  Width           The width of the access. Enumerated in bytes.\r
                           See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
   @param  Width           The width of the access. Enumerated in bytes.\r
                           See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r

-\r

   @param  Address         The physical address of the access. The format of\r
                           the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
   @param  Address         The physical address of the access. The format of\r
                           the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r

-\r
-  @param  Buffer          A pointer to the buffer of data..\r
-\r
+  @param  Buffer          A pointer to the buffer of data.\r

 \r
   @retval EFI_SUCCESS           The function completed successfully.\r
 \r
   @retval EFI_SUCCESS           The function completed successfully.\r

-\r
-  @retval EFI_DEVICE_ERROR      There was a problem with the transaction.\r
-\r
-  @retval EFI_DEVICE_NOT_READY  The device is not capable of supporting the operation at this\r
-                                time.\r
-\r
+  @retval EFI_INVALID_PARAMETER The invalid access width.\r
+  \r

 **/\r
 EFI_STATUS\r
 EFIAPI\r
 **/\r
 EFI_STATUS\r
 EFIAPI\r


@@ -271,24 +118,15 @@ PciCfg2Read (
   Write to a given location in the PCI configuration space.\r
 \r
   @param  PeiServices     An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
   Write to a given location in the PCI configuration space.\r
 \r
   @param  PeiServices     An indirect pointer to the PEI Services Table published by the PEI Foundation.\r

-\r

   @param  This            Pointer to local data for the interface.\r
   @param  This            Pointer to local data for the interface.\r

-\r

   @param  Width           The width of the access. Enumerated in bytes.\r
                           See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
   @param  Width           The width of the access. Enumerated in bytes.\r
                           See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r

-\r

   @param  Address         The physical address of the access. The format of\r
                           the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
   @param  Address         The physical address of the access. The format of\r
                           the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r

-\r
-  @param  Buffer          A pointer to the buffer of data..\r
-\r
+  @param  Buffer          A pointer to the buffer of data.\r

 \r
   @retval EFI_SUCCESS           The function completed successfully.\r
 \r
   @retval EFI_SUCCESS           The function completed successfully.\r

-\r
-  @retval EFI_DEVICE_ERROR      There was a problem with the transaction.\r
-\r
-  @retval EFI_DEVICE_NOT_READY  The device is not capable of supporting the operation at this\r
-                                time.\r
+  @retval EFI_INVALID_PARAMETER The invalid access width.\r

 \r
 **/\r
 EFI_STATUS\r
 \r
 **/\r
 EFI_STATUS\r


@@ -350,32 +188,22 @@ PciCfg2Write (
 \r
 \r
 /**\r
 \r
 \r
 /**\r

-  PCI read-modify-write operation.\r
+  This function performs a read-modify-write operation on the contents from a given\r
+  location in the PCI configuration space.\r

 \r
   @param  PeiServices     An indirect pointer to the PEI Services Table\r
                           published by the PEI Foundation.\r
 \r
   @param  PeiServices     An indirect pointer to the PEI Services Table\r
                           published by the PEI Foundation.\r

-\r

   @param  This            Pointer to local data for the interface.\r
   @param  This            Pointer to local data for the interface.\r

-\r

   @param  Width           The width of the access. Enumerated in bytes. Type\r
                           EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().\r
   @param  Width           The width of the access. Enumerated in bytes. Type\r
                           EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().\r

-\r

   @param  Address         The physical address of the access.\r
   @param  Address         The physical address of the access.\r

-\r

   @param  SetBits         Points to value to bitwise-OR with the read configuration value.\r
   @param  SetBits         Points to value to bitwise-OR with the read configuration value.\r

-\r

                           The size of the value is determined by Width.\r
                           The size of the value is determined by Width.\r

-\r

   @param  ClearBits       Points to the value to negate and bitwise-AND with the read configuration value.\r
                           The size of the value is determined by Width.\r
 \r
   @param  ClearBits       Points to the value to negate and bitwise-AND with the read configuration value.\r
                           The size of the value is determined by Width.\r
 \r

-\r

   @retval EFI_SUCCESS           The function completed successfully.\r
   @retval EFI_SUCCESS           The function completed successfully.\r

-\r
-  @retval EFI_DEVICE_ERROR      There was a problem with the transaction.\r
-\r
-  @retval EFI_DEVICE_NOT_READY  The device is not capable of supporting\r
-                                the operation at this time.\r
+  @retval EFI_INVALID_PARAMETER The invalid access width.\r

 \r
 **/\r
 EFI_STATUS\r
 \r
 **/\r
 EFI_STATUS\r


@@ -445,9 +273,23 @@ PciCfg2Modify (
   } else {\r
     return EFI_INVALID_PARAMETER;\r
   }\r
   } else {\r
     return EFI_INVALID_PARAMETER;\r
   }\r

+\r

   return EFI_SUCCESS;\r
 }\r
 \r
   return EFI_SUCCESS;\r
 }\r
 \r

+EFI_PEI_PCI_CFG2_PPI gPciCfg2Ppi = {\r
+  PciCfg2Read,\r
+  PciCfg2Write,\r
+  PciCfg2Modify,\r
+  0\r
+};\r
+\r
+EFI_PEI_PPI_DESCRIPTOR gPciCfg2PpiList = {\r
+  (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
+  &gEfiPciCfg2PpiGuid,\r
+  &gPciCfg2Ppi\r
+};\r
+\r

 /**\r
   Module's entry function. \r
   This routine will install EFI_PEI_PCI_CFG2_PPI.\r
 /**\r
   Module's entry function. \r
   This routine will install EFI_PEI_PCI_CFG2_PPI.\r


@@ -466,10 +308,10 @@ PeimInitializePciCfg (
 {\r
   EFI_STATUS            Status;\r
 \r
 {\r
   EFI_STATUS            Status;\r
 \r

-  ASSERT ((**PeiServices).Hdr.Revision >= PEI_SERVICES_REVISION);\r
+  ASSERT ((**PeiServices).Hdr.Revision >= PI_SPECIFICATION_VERSION);\r

 \r
   (**(EFI_PEI_SERVICES **)PeiServices).PciCfg = &gPciCfg2Ppi;\r
 \r
   (**(EFI_PEI_SERVICES **)PeiServices).PciCfg = &gPciCfg2Ppi;\r

-  Status = (**PeiServices).InstallPpi ((CONST EFI_PEI_SERVICES **)PeiServices, &gPciCfg2PpiList);\r
+  Status = (**PeiServices).InstallPpi (PeiServices, &gPciCfg2PpiList);\r

 \r
   return Status;\r
 }\r
 \r
   return Status;\r
 }\r