-#define ACPI_SMALL_IRQ_DESCRIPTOR_NAME 0x04\r
-#define ACPI_SMALL_DMA_DESCRIPTOR_NAME 0x05\r
-#define ACPI_SMALL_START_DEPENDENT_DESCRIPTOR_NAME 0x06\r
-#define ACPI_SMALL_END_DEPENDENT_DESCRIPTOR_NAME 0x07\r
-#define ACPI_SMALL_IO_PORT_DESCRIPTOR_NAME 0x08\r
-#define ACPI_SMALL_FIXED_IO_PORT_DESCRIPTOR_NAME 0x09\r
-#define ACPI_SMALL_VENDOR_DEFINED_DESCRIPTOR_NAME 0x0E\r
-#define ACPI_SMALL_END_TAG_DESCRIPTOR_NAME 0x0F\r
+#define ACPI_SMALL_IRQ_DESCRIPTOR_NAME 0x04\r
+#define ACPI_SMALL_DMA_DESCRIPTOR_NAME 0x05\r
+#define ACPI_SMALL_START_DEPENDENT_DESCRIPTOR_NAME 0x06\r
+#define ACPI_SMALL_END_DEPENDENT_DESCRIPTOR_NAME 0x07\r
+#define ACPI_SMALL_IO_PORT_DESCRIPTOR_NAME 0x08\r
+#define ACPI_SMALL_FIXED_IO_PORT_DESCRIPTOR_NAME 0x09\r
+#define ACPI_SMALL_VENDOR_DEFINED_DESCRIPTOR_NAME 0x0E\r
+#define ACPI_SMALL_END_TAG_DESCRIPTOR_NAME 0x0F\r
-#define ACPI_LARGE_24_BIT_MEMORY_RANGE_DESCRIPTOR_NAME 0x01\r
-#define ACPI_LARGE_VENDOR_DEFINED_DESCRIPTOR_NAME 0x04\r
-#define ACPI_LARGE_32_BIT_MEMORY_RANGE_DESCRIPTOR_NAME 0x05\r
-#define ACPI_LARGE_32_BIT_FIXED_MEMORY_RANGE_DESCRIPTOR_NAME 0x06\r
-#define ACPI_LARGE_DWORD_ADDRESS_SPACE_DESCRIPTOR_NAME 0x07\r
-#define ACPI_LARGE_WORD_ADDRESS_SPACE_DESCRIPTOR_NAME 0x08\r
-#define ACPI_LARGE_EXTENDED_IRQ_DESCRIPTOR_NAME 0x09\r
-#define ACPI_LARGE_QWORD_ADDRESS_SPACE_DESCRIPTOR_NAME 0x0A\r
+#define ACPI_LARGE_24_BIT_MEMORY_RANGE_DESCRIPTOR_NAME 0x01\r
+#define ACPI_LARGE_VENDOR_DEFINED_DESCRIPTOR_NAME 0x04\r
+#define ACPI_LARGE_32_BIT_MEMORY_RANGE_DESCRIPTOR_NAME 0x05\r
+#define ACPI_LARGE_32_BIT_FIXED_MEMORY_RANGE_DESCRIPTOR_NAME 0x06\r
+#define ACPI_LARGE_DWORD_ADDRESS_SPACE_DESCRIPTOR_NAME 0x07\r
+#define ACPI_LARGE_WORD_ADDRESS_SPACE_DESCRIPTOR_NAME 0x08\r
+#define ACPI_LARGE_EXTENDED_IRQ_DESCRIPTOR_NAME 0x09\r
+#define ACPI_LARGE_QWORD_ADDRESS_SPACE_DESCRIPTOR_NAME 0x0A\r
-#define ACPI_IRQ_NOFLAG_DESCRIPTOR 0x22\r
-#define ACPI_IRQ_DESCRIPTOR 0x23\r
-#define ACPI_DMA_DESCRIPTOR 0x2A\r
-#define ACPI_START_DEPENDENT_DESCRIPTOR 0x30\r
-#define ACPI_START_DEPENDENT_EX_DESCRIPTOR 0x31\r
-#define ACPI_END_DEPENDENT_DESCRIPTOR 0x38\r
-#define ACPI_IO_PORT_DESCRIPTOR 0x47\r
-#define ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR 0x4B\r
-#define ACPI_END_TAG_DESCRIPTOR 0x79\r
+#define ACPI_IRQ_NOFLAG_DESCRIPTOR 0x22\r
+#define ACPI_IRQ_DESCRIPTOR 0x23\r
+#define ACPI_DMA_DESCRIPTOR 0x2A\r
+#define ACPI_START_DEPENDENT_DESCRIPTOR 0x30\r
+#define ACPI_START_DEPENDENT_EX_DESCRIPTOR 0x31\r
+#define ACPI_END_DEPENDENT_DESCRIPTOR 0x38\r
+#define ACPI_IO_PORT_DESCRIPTOR 0x47\r
+#define ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR 0x4B\r
+#define ACPI_END_TAG_DESCRIPTOR 0x79\r
-#define ACPI_24_BIT_MEMORY_RANGE_DESCRIPTOR 0x81\r
-#define ACPI_32_BIT_MEMORY_RANGE_DESCRIPTOR 0x85\r
-#define ACPI_32_BIT_FIXED_MEMORY_RANGE_DESCRIPTOR 0x86\r
-#define ACPI_DWORD_ADDRESS_SPACE_DESCRIPTOR 0x87\r
-#define ACPI_WORD_ADDRESS_SPACE_DESCRIPTOR 0x88\r
-#define ACPI_EXTENDED_INTERRUPT_DESCRIPTOR 0x89\r
-#define ACPI_QWORD_ADDRESS_SPACE_DESCRIPTOR 0x8A\r
-#define ACPI_ADDRESS_SPACE_DESCRIPTOR 0x8A\r
+#define ACPI_24_BIT_MEMORY_RANGE_DESCRIPTOR 0x81\r
+#define ACPI_32_BIT_MEMORY_RANGE_DESCRIPTOR 0x85\r
+#define ACPI_32_BIT_FIXED_MEMORY_RANGE_DESCRIPTOR 0x86\r
+#define ACPI_DWORD_ADDRESS_SPACE_DESCRIPTOR 0x87\r
+#define ACPI_WORD_ADDRESS_SPACE_DESCRIPTOR 0x88\r
+#define ACPI_EXTENDED_INTERRUPT_DESCRIPTOR 0x89\r
+#define ACPI_QWORD_ADDRESS_SPACE_DESCRIPTOR 0x8A\r
+#define ACPI_ADDRESS_SPACE_DESCRIPTOR 0x8A\r
-#define ACPI_ADDRESS_SPACE_TYPE_MEM 0x00\r
-#define ACPI_ADDRESS_SPACE_TYPE_IO 0x01\r
-#define ACPI_ADDRESS_SPACE_TYPE_BUS 0x02\r
+#define ACPI_ADDRESS_SPACE_TYPE_MEM 0x00\r
+#define ACPI_ADDRESS_SPACE_TYPE_IO 0x01\r
+#define ACPI_ADDRESS_SPACE_TYPE_BUS 0x02\r
} EFI_ACPI_DMA_DESCRIPTOR;\r
\r
///\r
/// I/O Port Descriptor\r
///\r
typedef PACKED struct {\r
} EFI_ACPI_DMA_DESCRIPTOR;\r
\r
///\r
/// I/O Port Descriptor\r
///\r
typedef PACKED struct {\r
- ACPI_SMALL_RESOURCE_HEADER Header;\r
- UINT8 Information;\r
- UINT16 BaseAddressMin;\r
- UINT16 BaseAddressMax;\r
- UINT8 Alignment;\r
- UINT8 Length;\r
+ ACPI_SMALL_RESOURCE_HEADER Header;\r
+ UINT8 Information;\r
+ UINT16 BaseAddressMin;\r
+ UINT16 BaseAddressMax;\r
+ UINT8 Alignment;\r
+ UINT8 Length;\r
} EFI_ACPI_IO_PORT_DESCRIPTOR;\r
\r
///\r
/// Fixed Location I/O Port Descriptor.\r
///\r
typedef PACKED struct {\r
} EFI_ACPI_IO_PORT_DESCRIPTOR;\r
\r
///\r
/// Fixed Location I/O Port Descriptor.\r
///\r
typedef PACKED struct {\r
-#define EFI_ACPI_RESERVED_BYTE 0x00\r
-#define EFI_ACPI_RESERVED_WORD 0x0000\r
-#define EFI_ACPI_RESERVED_DWORD 0x00000000\r
-#define EFI_ACPI_RESERVED_QWORD 0x0000000000000000\r
+#define EFI_ACPI_RESERVED_BYTE 0x00\r
+#define EFI_ACPI_RESERVED_WORD 0x0000\r
+#define EFI_ACPI_RESERVED_DWORD 0x00000000\r
+#define EFI_ACPI_RESERVED_QWORD 0x0000000000000000\r
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_READ_WRITE (1 << 0)\r
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_READ_ONLY (0 << 0)\r
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_READ_WRITE (1 << 0)\r
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_READ_ONLY (0 << 0)\r
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_NON_CACHEABLE (0 << 1)\r
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE (1 << 1)\r
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_WRITE_COMBINING (2 << 1)\r
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE (3 << 1)\r
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_NON_CACHEABLE (0 << 1)\r
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE (1 << 1)\r
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_WRITE_COMBINING (2 << 1)\r
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE (3 << 1)\r
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_MEMORY (0 << 3)\r
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_RESERVED (1 << 3)\r
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_ACPI (2 << 3)\r
-#define EFI_APCI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_NVS (3 << 3)\r
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_MEMORY (0 << 3)\r
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_RESERVED (1 << 3)\r
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_ACPI (2 << 3)\r
+#define EFI_APCI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_NVS (3 << 3)\r
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_TYPE_TRANSLATION (1 << 5)\r
-#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_TYPE_STATIC (0 << 5)\r
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_TYPE_TRANSLATION (1 << 5)\r
+#define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_TYPE_STATIC (0 << 5)\r
-#define EFI_ACPI_IRQ_POLARITY_MASK 0x08\r
-#define EFI_ACPI_IRQ_HIGH_TRUE 0x00\r
-#define EFI_ACPI_IRQ_LOW_FALSE 0x08\r
+#define EFI_ACPI_IRQ_POLARITY_MASK 0x08\r
+#define EFI_ACPI_IRQ_HIGH_TRUE 0x00\r
+#define EFI_ACPI_IRQ_LOW_FALSE 0x08\r
-#define EFI_ACPI_IRQ_MODE 0x01\r
-#define EFI_ACPI_IRQ_LEVEL_TRIGGERED 0x00\r
-#define EFI_ACPI_IRQ_EDGE_TRIGGERED 0x01\r
+#define EFI_ACPI_IRQ_MODE 0x01\r
+#define EFI_ACPI_IRQ_LEVEL_TRIGGERED 0x00\r
+#define EFI_ACPI_IRQ_EDGE_TRIGGERED 0x01\r
-#define EFI_ACPI_DMA_SPEED_TYPE_MASK 0x60\r
-#define EFI_ACPI_DMA_SPEED_TYPE_COMPATIBILITY 0x00\r
-#define EFI_ACPI_DMA_SPEED_TYPE_A 0x20\r
-#define EFI_ACPI_DMA_SPEED_TYPE_B 0x40\r
-#define EFI_ACPI_DMA_SPEED_TYPE_F 0x60\r
+#define EFI_ACPI_DMA_SPEED_TYPE_MASK 0x60\r
+#define EFI_ACPI_DMA_SPEED_TYPE_COMPATIBILITY 0x00\r
+#define EFI_ACPI_DMA_SPEED_TYPE_A 0x20\r
+#define EFI_ACPI_DMA_SPEED_TYPE_B 0x40\r
+#define EFI_ACPI_DMA_SPEED_TYPE_F 0x60\r
-#define EFI_ACPI_DMA_TRANSFER_TYPE_MASK 0x03\r
-#define EFI_ACPI_DMA_TRANSFER_TYPE_8_BIT 0x00\r
-#define EFI_ACPI_DMA_TRANSFER_TYPE_8_BIT_AND_16_BIT 0x01\r
-#define EFI_ACPI_DMA_TRANSFER_TYPE_16_BIT 0x02\r
+#define EFI_ACPI_DMA_TRANSFER_TYPE_MASK 0x03\r
+#define EFI_ACPI_DMA_TRANSFER_TYPE_8_BIT 0x00\r
+#define EFI_ACPI_DMA_TRANSFER_TYPE_8_BIT_AND_16_BIT 0x01\r
+#define EFI_ACPI_DMA_TRANSFER_TYPE_16_BIT 0x02\r
-#define EFI_ACPI_IO_DECODE_MASK 0x01\r
-#define EFI_ACPI_IO_DECODE_16_BIT 0x01\r
-#define EFI_ACPI_IO_DECODE_10_BIT 0x00\r
+#define EFI_ACPI_IO_DECODE_MASK 0x01\r
+#define EFI_ACPI_IO_DECODE_16_BIT 0x01\r
+#define EFI_ACPI_IO_DECODE_10_BIT 0x00\r
-#define EFI_ACPI_MEMORY_WRITE_STATUS_MASK 0x01\r
-#define EFI_ACPI_MEMORY_WRITABLE 0x01\r
-#define EFI_ACPI_MEMORY_NON_WRITABLE 0x00\r
+#define EFI_ACPI_MEMORY_WRITE_STATUS_MASK 0x01\r
+#define EFI_ACPI_MEMORY_WRITABLE 0x01\r
+#define EFI_ACPI_MEMORY_NON_WRITABLE 0x00\r
\r
//\r
// Interrupt Vector Flags definitions for Extended Interrupt Descriptor\r
// Ref ACPI specification 6.4.3.6\r
//\r
\r
//\r
// Interrupt Vector Flags definitions for Extended Interrupt Descriptor\r
// Ref ACPI specification 6.4.3.6\r
//\r
-#define EFI_ACPI_EXTENDED_INTERRUPT_FLAG_PRODUCER_CONSUMER_MASK BIT0\r
-#define EFI_ACPI_EXTENDED_INTERRUPT_FLAG_MODE_MASK BIT1\r
-#define EFI_ACPI_EXTENDED_INTERRUPT_FLAG_POLARITY_MASK BIT2\r
-#define EFI_ACPI_EXTENDED_INTERRUPT_FLAG_SHARABLE_MASK BIT3\r
-#define EFI_ACPI_EXTENDED_INTERRUPT_FLAG_WAKE_CAPABLITY_MASK BIT4\r
+#define EFI_ACPI_EXTENDED_INTERRUPT_FLAG_PRODUCER_CONSUMER_MASK BIT0\r
+#define EFI_ACPI_EXTENDED_INTERRUPT_FLAG_MODE_MASK BIT1\r
+#define EFI_ACPI_EXTENDED_INTERRUPT_FLAG_POLARITY_MASK BIT2\r
+#define EFI_ACPI_EXTENDED_INTERRUPT_FLAG_SHARABLE_MASK BIT3\r
+#define EFI_ACPI_EXTENDED_INTERRUPT_FLAG_WAKE_CAPABLITY_MASK BIT4\r
\r
//\r
// Fixed ACPI Description Table Fixed Feature Flags\r
// All other bits are reserved and must be set to 0.\r
//\r
\r
//\r
// Fixed ACPI Description Table Fixed Feature Flags\r
// All other bits are reserved and must be set to 0.\r
//\r
-#define EFI_ACPI_1_0_WBINVD BIT0\r
-#define EFI_ACPI_1_0_WBINVD_FLUSH BIT1\r
-#define EFI_ACPI_1_0_PROC_C1 BIT2\r
-#define EFI_ACPI_1_0_P_LVL2_UP BIT3\r
-#define EFI_ACPI_1_0_PWR_BUTTON BIT4\r
-#define EFI_ACPI_1_0_SLP_BUTTON BIT5\r
-#define EFI_ACPI_1_0_FIX_RTC BIT6\r
-#define EFI_ACPI_1_0_RTC_S4 BIT7\r
-#define EFI_ACPI_1_0_TMR_VAL_EXT BIT8\r
-#define EFI_ACPI_1_0_DCK_CAP BIT9\r
+#define EFI_ACPI_1_0_WBINVD BIT0\r
+#define EFI_ACPI_1_0_WBINVD_FLUSH BIT1\r
+#define EFI_ACPI_1_0_PROC_C1 BIT2\r
+#define EFI_ACPI_1_0_P_LVL2_UP BIT3\r
+#define EFI_ACPI_1_0_PWR_BUTTON BIT4\r
+#define EFI_ACPI_1_0_SLP_BUTTON BIT5\r
+#define EFI_ACPI_1_0_FIX_RTC BIT6\r
+#define EFI_ACPI_1_0_RTC_S4 BIT7\r
+#define EFI_ACPI_1_0_TMR_VAL_EXT BIT8\r
+#define EFI_ACPI_1_0_DCK_CAP BIT9\r
} EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
\r
///\r
/// Firmware Control Structure Feature Flags.\r
/// All other bits are reserved and must be set to 0.\r
///\r
} EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
\r
///\r
/// Firmware Control Structure Feature Flags.\r
/// All other bits are reserved and must be set to 0.\r
///\r
\r
///\r
/// Multiple APIC Description Table header definition. The rest of the table\r
/// must be defined in a platform-specific manner.\r
///\r
typedef struct {\r
\r
///\r
/// Multiple APIC Description Table header definition. The rest of the table\r
/// must be defined in a platform-specific manner.\r
///\r
typedef struct {\r
} EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
\r
///\r
/// MADT Revision (as defined in ACPI 1.0b specification).\r
///\r
} EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
\r
///\r
/// MADT Revision (as defined in ACPI 1.0b specification).\r
///\r
} EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
\r
///\r
/// Local APIC Flags. All other bits are reserved and must be 0.\r
///\r
} EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
\r
///\r
/// Local APIC Flags. All other bits are reserved and must be 0.\r
///\r
- EFI_ACPI_DESCRIPTION_HEADER Header;\r
- UINT32 WarningEnergyLevel;\r
- UINT32 LowEnergyLevel;\r
- UINT32 CriticalEnergyLevel;\r
+ EFI_ACPI_DESCRIPTION_HEADER Header;\r
+ UINT32 WarningEnergyLevel;\r
+ UINT32 LowEnergyLevel;\r
+ UINT32 CriticalEnergyLevel;\r