MdePkg: Fix ACPI NFIT GUID definitions

[mirror_edk2.git] / MdePkg / Include / IndustryStandard / Pci30.h

diff --git a/MdePkg/Include/IndustryStandard/Pci30.h b/MdePkg/Include/IndustryStandard/Pci30.h
index c4a1b64ace7ce5b4aff0d287469399cf5716ecff..a4ab909eb53434c5e196916d0430840be1d0db6c 100644 (file)
--- a/MdePkg/Include/IndustryStandard/Pci30.h
+++ b/MdePkg/Include/IndustryStandard/Pci30.h
@@ -1,8 +1,8 @@
 /** @file\r
   Support for PCI 3.0 standard.\r
 \r
-  Copyright (c) 2006, Intel Corporation                                                         \r
-  All rights reserved. This program and the accompanying materials                          \r
+  Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>\r
+  This program and the accompanying materials                          \r
   are licensed and made available under the terms and conditions of the BSD License         \r
   which accompanies this distribution.  The full text of the license may be found at        \r
   http://opensource.org/licenses/bsd-license.php                                            \r
@@ -15,13 +15,50 @@
 #ifndef __PCI30_H__\r
 #define __PCI30_H__\r
 \r
+\r
+#include <IndustryStandard/Pci23.h>\r
+\r
+///\r
+/// PCI_CLASS_MASS_STORAGE, Base Class 01h.\r
+///\r
+///@{\r
 #define PCI_CLASS_MASS_STORAGE_SATADPA   0x06\r
-#define PCI_CLASS_MASS_STORAGE_AHCI      PCI_CLASS_MASS_STORAGE_SATADPA\r
+#define   PCI_IF_MASS_STORAGE_SATA         0x00\r
+#define   PCI_IF_MASS_STORAGE_AHCI         0x01\r
+///@}\r
+\r
+///\r
+/// PCI_CLASS_WIRELESS, Base Class 0Dh.\r
+///\r
+///@{\r
+#define PCI_SUBCLASS_ETHERNET_80211A    0x20\r
+#define PCI_SUBCLASS_ETHERNET_80211B    0x21\r
+///@}\r
 \r
-#pragma pack(push, 1)\r
+/**\r
+  Macro that checks whether device is a SATA controller.\r
 \r
+  @param  _p      Specified device.\r
+\r
+  @retval TRUE    Device is a SATA controller.\r
+  @retval FALSE   Device is not a SATA controller.\r
+\r
+**/\r
+#define IS_PCI_SATADPA(_p) IS_CLASS2 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_SATADPA)\r
+\r
+///\r
+/// PCI Capability List IDs and records\r
+///\r
+#define EFI_PCI_CAPABILITY_ID_PCIEXP  0x10\r
+\r
+#pragma pack(1)\r
+\r
+///\r
+/// PCI Data Structure Format\r
+/// Section 5.1.2, PCI Firmware Specification, Revision 3.0\r
+///\r
 typedef struct {\r
-  UINT32  Signature;    // "PCIR"\r
+  UINT32  Signature;    ///< "PCIR"\r
   UINT16  VendorId;\r
   UINT16  DeviceId;\r
   UINT16  DeviceListOffset;\r
@@ -37,9 +74,6 @@ typedef struct {
   UINT16  DMTFCLPEntryPointOffset;\r
 } PCI_3_0_DATA_STRUCTURE;\r
 \r
-#pragma pack(pop)\r
-\r
-\r
-#include <IndustryStandard/Pci23.h>\r
+#pragma pack()\r
 \r
 #endif\r