+typedef struct {\r
+ UINT32 CapabilityId:16;\r
+ UINT32 CapabilityVersion:4;\r
+ UINT32 NextCapabilityOffset:12;\r
+} PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER;\r
+\r
+#define PCI_EXP_EXT_HDR PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER\r
+\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_ADVANCED_ERROR_REPORTING_ID 0x0001\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_ADVANCED_ERROR_REPORTING_VER1 0x1\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_ADVANCED_ERROR_REPORTING_VER2 0x2\r
+\r
+typedef struct {\r
+ PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;\r
+ UINT32 UncorrectableErrorStatus;\r
+ UINT32 UncorrectableErrorMask;\r
+ UINT32 UncorrectableErrorSeverity;\r
+ UINT32 CorrectableErrorStatus;\r
+ UINT32 CorrectableErrorMask;\r
+ UINT32 AdvancedErrorCapabilitiesAndControl;\r
+ UINT32 HeaderLog;\r
+ UINT32 RootErrorCommand;\r
+ UINT32 RootErrorStatus;\r
+ UINT16 ErrorSourceIdentification;\r
+ UINT16 CorrectableErrorSourceIdentification;\r
+ UINT32 TlpPrefixLog[4];\r
+} PCI_EXPRESS_EXTENDED_CAPABILITIES_ADVANCED_ERROR_REPORTING;\r
+\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_VIRTUAL_CHANNEL_ID 0x0002\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_VIRTUAL_CHANNEL_MFVC 0x0009\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_VIRTUAL_CHANNEL_VER1 0x1\r
+\r
+typedef struct {\r
+ UINT32 VcResourceCapability:24;\r
+ UINT32 PortArbTableOffset:8;\r
+ UINT32 VcResourceControl;\r
+ UINT16 Reserved1;\r
+ UINT16 VcResourceStatus;\r
+} PCI_EXPRESS_EXTENDED_CAPABILITIES_VIRTUAL_CHANNEL_VC;\r
+\r
+typedef struct {\r
+ PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;\r
+ UINT32 ExtendedVcCount:3;\r
+ UINT32 PortVcCapability1:29;\r
+ UINT32 PortVcCapability2:24;\r
+ UINT32 VcArbTableOffset:8;\r
+ UINT16 PortVcControl;\r
+ UINT16 PortVcStatus;\r
+ PCI_EXPRESS_EXTENDED_CAPABILITIES_VIRTUAL_CHANNEL_VC Capability[1];\r
+} PCI_EXPRESS_EXTENDED_CAPABILITIES_VIRTUAL_CHANNEL_CAPABILITY;\r
+\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_SERIAL_NUMBER_ID 0x0003\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_SERIAL_NUMBER_VER1 0x1\r
+\r
+typedef struct {\r
+ PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;\r
+ UINT64 SerialNumber;\r
+} PCI_EXPRESS_EXTENDED_CAPABILITIES_SERIAL_NUMBER;\r
+\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_LINK_DECLARATION_ID 0x0005\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_LINK_DECLARATION_VER1 0x1\r
+\r
+typedef struct {\r
+ PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;\r
+ UINT32 ElementSelfDescription;\r
+ UINT32 Reserved;\r
+ UINT32 LinkEntry[1];\r
+} PCI_EXPRESS_EXTENDED_CAPABILITIES_LINK_DECLARATION;\r
+\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_LINK_DECLARATION_GET_LINK_COUNT(LINK_DECLARATION) (UINT8)(((LINK_DECLARATION->ElementSelfDescription)&0x0000ff00)>>8)\r
+\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_LINK_CONTROL_ID 0x0006\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_LINK_CONTROL_VER1 0x1\r
+\r
+typedef struct {\r
+ PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;\r
+ UINT32 RootComplexLinkCapabilities;\r
+ UINT16 RootComplexLinkControl;\r
+ UINT16 RootComplexLinkStatus;\r
+} PCI_EXPRESS_EXTENDED_CAPABILITIES_INTERNAL_LINK_CONTROL;\r
+\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_POWER_BUDGETING_ID 0x0004\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_POWER_BUDGETING_VER1 0x1\r
+\r
+typedef struct {\r
+ PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;\r
+ UINT32 DataSelect:8;\r
+ UINT32 Reserved:24;\r
+ UINT32 Data;\r
+ UINT32 PowerBudgetCapability:1;\r
+ UINT32 Reserved2:7;\r
+ UINT32 Reserved3:24;\r
+} PCI_EXPRESS_EXTENDED_CAPABILITIES_POWER_BUDGETING;\r
+\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_ACS_EXTENDED_ID 0x000D\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_ACS_EXTENDED_VER1 0x1\r
+\r
+typedef struct {\r
+ PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;\r
+ UINT16 AcsCapability;\r
+ UINT16 AcsControl;\r
+ UINT8 EgressControlVectorArray[1];\r
+} PCI_EXPRESS_EXTENDED_CAPABILITIES_ACS_EXTENDED;\r
+\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_ACS_EXTENDED_GET_EGRES_CONTROL(ACS_EXTENDED) (UINT8)(((ACS_EXTENDED->AcsCapability)&0x00000020))\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_ACS_EXTENDED_GET_EGRES_VECTOR_SIZE(ACS_EXTENDED) (UINT8)(((ACS_EXTENDED->AcsCapability)&0x0000FF00))\r
+\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_EVENT_COLLECTOR_ENDPOINT_ASSOCIATION_ID 0x0007\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_EVENT_COLLECTOR_ENDPOINT_ASSOCIATION_VER1 0x1\r
+\r
+typedef struct {\r
+ PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;\r
+ UINT32 AssociationBitmap;\r
+} PCI_EXPRESS_EXTENDED_CAPABILITIES_EVENT_COLLECTOR_ENDPOINT_ASSOCIATION;\r
+\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_MULTI_FUNCTION_VIRTUAL_CHANNEL_ID 0x0008\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_MULTI_FUNCTION_VIRTUAL_CHANNEL_VER1 0x1\r
+\r
+typedef PCI_EXPRESS_EXTENDED_CAPABILITIES_VIRTUAL_CHANNEL_CAPABILITY PCI_EXPRESS_EXTENDED_CAPABILITIES_MULTI_FUNCTION_VIRTUAL_CHANNEL_CAPABILITY;\r
+\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_VENDOR_SPECIFIC_ID 0x000B\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_VENDOR_SPECIFIC_VER1 0x1\r
+\r
+typedef struct {\r
+ PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;\r
+ UINT32 VendorSpecificHeader;\r
+ UINT8 VendorSpecific[1];\r
+} PCI_EXPRESS_EXTENDED_CAPABILITIES_VENDOR_SPECIFIC;\r
+\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_VENDOR_SPECIFIC_GET_SIZE(VENDOR) (UINT16)(((VENDOR->VendorSpecificHeader)&0xFFF00000)>>20)\r
+\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_RCRB_HEADER_ID 0x000A\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_RCRB_HEADER_VER1 0x1\r
+\r
+typedef struct {\r
+ PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;\r
+ UINT16 VendorId;\r
+ UINT16 DeviceId;\r
+ UINT32 RcrbCapabilities;\r
+ UINT32 RcrbControl;\r
+ UINT32 Reserved;\r
+} PCI_EXPRESS_EXTENDED_CAPABILITIES_RCRB_HEADER;\r
+\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_MULTICAST_ID 0x0012\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_MULTICAST_VER1 0x1\r
+\r
+typedef struct {\r
+ PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;\r
+ UINT16 MultiCastCapability;\r
+ UINT16 MulticastControl;\r
+ UINT64 McBaseAddress;\r
+ UINT64 McReceiveAddress;\r
+ UINT64 McBlockAll;\r
+ UINT64 McBlockUntranslated;\r
+ UINT64 McOverlayBar;\r
+} PCI_EXPRESS_EXTENDED_CAPABILITIES_MULTICAST;\r
+\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_RESIZABLE_BAR_ID 0x0015\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_RESIZABLE_BAR_VER1 0x1\r
+\r
+typedef struct {\r
+ UINT32 ResizableBarCapability;\r
+ UINT16 ResizableBarControl;\r
+ UINT16 Reserved;\r
+} PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR_ENTRY;\r
+\r
+typedef struct {\r
+ PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;\r
+ PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR_ENTRY Capability[1];\r
+} PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR;\r
+\r
+#define GET_NUMBER_RESIZABLE_BARS(x) (((x->Capability[0].ResizableBarControl) & 0xE0) >> 5)\r
+\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_ARI_CAPABILITY_ID 0x000E\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_ARI_CAPABILITY_VER1 0x1\r
+\r
+typedef struct {\r
+ PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;\r
+ UINT16 AriCapability;\r
+ UINT16 AriControl;\r
+} PCI_EXPRESS_EXTENDED_CAPABILITIES_ARI_CAPABILITY;\r
+\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_DYNAMIC_POWER_ALLOCATION_ID 0x0016\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_DYNAMIC_POWER_ALLOCATION_VER1 0x1\r
+\r
+typedef struct {\r
+ PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;\r
+ UINT32 DpaCapability;\r
+ UINT32 DpaLatencyIndicator;\r
+ UINT16 DpaStatus;\r
+ UINT16 DpaControl;\r
+ UINT8 DpaPowerAllocationArray[1];\r
+} PCI_EXPRESS_EXTENDED_CAPABILITIES_DYNAMIC_POWER_ALLOCATION;\r
+\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_DYNAMIC_POWER_ALLOCATION_GET_SUBSTATE_MAX(POWER) (UINT16)(((POWER->DpaCapability)&0x0000000F))\r
+\r
+\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_LATENCE_TOLERANCE_REPORTING_ID 0x0018\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_LATENCE_TOLERANCE_REPORTING_VER1 0x1\r
+\r
+typedef struct {\r
+ PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;\r
+ UINT16 MaxSnoopLatency;\r
+ UINT16 MaxNoSnoopLatency;\r
+} PCI_EXPRESS_EXTENDED_CAPABILITIES_LATENCE_TOLERANCE_REPORTING;\r
+\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_TPH_ID 0x0017\r
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_TPH_VER1 0x1\r
+\r
+typedef struct {\r
+ PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;\r
+ UINT32 TphRequesterCapability;\r
+ UINT32 TphRequesterControl;\r
+ UINT16 TphStTable[1];\r
+} PCI_EXPRESS_EXTENDED_CAPABILITIES_TPH;\r
+\r
+#define GET_TPH_TABLE_SIZE(x) ((x->TphRequesterCapability & 0x7FF0000)>>16) * sizeof(UINT16)\r
+\r