MdePkg: Apply uncrustify changes

[mirror_edk2.git] / MdePkg / Include / IndustryStandard / PciExpress30.h

diff --git a/MdePkg/Include/IndustryStandard/PciExpress30.h b/MdePkg/Include/IndustryStandard/PciExpress30.h
index 4a30077a038226964818e71c7f5ca73ab6ceb289..8b06496559c650d1cc8673754f57e1dc7145d77e 100644 (file)
--- a/MdePkg/Include/IndustryStandard/PciExpress30.h
+++ b/MdePkg/Include/IndustryStandard/PciExpress30.h
@@ -4,13 +4,7 @@
   This header file may not define all structures.  Please extend as required.\r
 \r
   Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>\r
-  This program and the accompanying materials\r
-  are licensed and made available under the terms and conditions of the BSD License\r
-  which accompanies this distribution.  The full text of the license may be found at\r
-  http://opensource.org/licenses/bsd-license.php\r
-\r
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+  SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
 \r
@@ -26,30 +20,30 @@
 \r
 typedef union {\r
   struct {\r
-    UINT32 PerformEqualization : 1;\r
-    UINT32 LinkEqualizationRequestInterruptEnable : 1;\r
-    UINT32 Reserved : 30;\r
+    UINT32    PerformEqualization                    : 1;\r
+    UINT32    LinkEqualizationRequestInterruptEnable : 1;\r
+    UINT32    Reserved                               : 30;\r
   } Bits;\r
-  UINT32   Uint32;\r
+  UINT32    Uint32;\r
 } PCI_EXPRESS_REG_LINK_CONTROL3;\r
 \r
 typedef union {\r
   struct {\r
-    UINT16 DownstreamPortTransmitterPreset : 4;\r
-    UINT16 DownstreamPortReceiverPresetHint : 3;\r
-    UINT16 Reserved : 1;\r
-    UINT16 UpstreamPortTransmitterPreset : 4;\r
-    UINT16 UpstreamPortReceiverPresetHint : 3;\r
-    UINT16 Reserved2 : 1;\r
+    UINT16    DownstreamPortTransmitterPreset  : 4;\r
+    UINT16    DownstreamPortReceiverPresetHint : 3;\r
+    UINT16    Reserved                         : 1;\r
+    UINT16    UpstreamPortTransmitterPreset    : 4;\r
+    UINT16    UpstreamPortReceiverPresetHint   : 3;\r
+    UINT16    Reserved2                        : 1;\r
   } Bits;\r
-  UINT16   Uint16;\r
+  UINT16    Uint16;\r
 } PCI_EXPRESS_REG_LANE_EQUALIZATION_CONTROL;\r
 \r
 typedef struct {\r
-  PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER                Header;\r
-  PCI_EXPRESS_REG_LINK_CONTROL3                           LinkControl3;\r
-  UINT32                                                  LaneErrorStatus;\r
-  PCI_EXPRESS_REG_LANE_EQUALIZATION_CONTROL               EqualizationControl[2];\r
+  PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER     Header;\r
+  PCI_EXPRESS_REG_LINK_CONTROL3                LinkControl3;\r
+  UINT32                                       LaneErrorStatus;\r
+  PCI_EXPRESS_REG_LANE_EQUALIZATION_CONTROL    EqualizationControl[2];\r
 } PCI_EXPRESS_EXTENDED_CAPABILITIES_SECONDARY_PCIE;\r
 \r
 #pragma pack()\r