///\r
/// SAL return status type \r
///\r
-typedef UINTN EFI_SAL_STATUS;\r
+typedef INTN EFI_SAL_STATUS;\r
\r
///\r
/// Call completed without error. \r
/**\r
Prototype of SAL procedures.\r
\r
- @param Arg0 Functional identifier.\r
+ @param FunctionId Functional identifier.\r
The upper 32 bits are ignored and only the lower 32 bits\r
are used. The following functional identifiers are defined:\r
- 0x01XXXXXX \96 Architected SAL functional group.\r
- 0x02XXXXXX to 0x03XXXXXX \96 OEM SAL functional group. Each OEM is\r
+ 0x01XXXXXX - Architected SAL functional group.\r
+ 0x02XXXXXX to 0x03XXXXXX - OEM SAL functional group. Each OEM is\r
allowed to use the entire range in the 0x02XXXXXX to 0x03XXXXXX range.\r
- 0x04XXXXXX to 0xFFFFFFFF \96 Reserved.\r
+ 0x04XXXXXX to 0xFFFFFFFF - Reserved.\r
@param Arg1 The first parameter of the architected/OEM specific SAL functions.\r
@param Arg2 The second parameter of the architected/OEM specific SAL functions.\r
@param Arg3 The third parameter passed to the ESAL function based\r
**/\r
typedef\r
SAL_RETURN_REGS\r
-(EFIAPI *SAL_PROC) (\r
+(EFIAPI *SAL_PROC)(\r
IN UINT64 FunctionId,\r
+ IN UINT64 Arg1,\r
IN UINT64 Arg2,\r
IN UINT64 Arg3,\r
IN UINT64 Arg4,\r
IN UINT64 Arg5,\r
IN UINT64 Arg6,\r
- IN UINT64 Arg7,\r
- IN UINT64 Arg8\r
+ IN UINT64 Arg7\r
);\r
\r
//\r
// Parameter and return value of EFI_SAL_UPDATE_PAL\r
//\r
// Return parameter provides additional information on the\r
-// failure when the status field contains a value of \963,\r
+// failure when the status field contains a value of -3,\r
// returned in r9.\r
//\r
#define EFI_SAL_UPDATE_BAD_PAL_VERSION ((UINT64) -1)\r
UINT8 Type;\r
UINT8 Reserved[5];\r
UINT64 FwVendorId;\r
+ UINT8 Reserved2[40];\r
} SAL_UPDATE_PAL_DATA_BLOCK;\r
///\r
/// Data structure pointed by parameter param_buf.\r
#pragma pack(1)\r
typedef struct {\r
///\r
- /// The ASCII string representation of \93SST_\94, which confirms the presence of the table.\r
- ///\r
+ /// The ASCII string representation of "SST_" which confirms the presence of the table. \r
+ /// \r
UINT32 Signature;\r
///\r
/// The length of the entire table in bytes, starting from offset zero and including the\r
///\r
UINT8 Reserved2[8];\r
} SAL_SYSTEM_TABLE_HEADER;\r
-#pragma pack()\r
\r
#define EFI_SAL_ST_HEADER_SIGNATURE "SST_"\r
#define EFI_SAL_REVISION 0x0320\r
#define EFI_SAL_ST_PTC_SIZE 16\r
#define EFI_SAL_ST_AP_WAKEUP_SIZE 16\r
\r
-#pragma pack(1)\r
///\r
-/// Format Entrypoint Descriptor Entry\r
+/// Format of Entrypoint Descriptor Entry\r
///\r
typedef struct {\r
UINT8 Type; ///< Type here should be 0\r
UINT64 Reserved2[2];\r
} SAL_ST_ENTRY_POINT_DESCRIPTOR;\r
\r
-#pragma pack(1)\r
///\r
-/// Format Platform Features Descriptor Entry\r
+/// Format of Platform Features Descriptor Entry\r
///\r
typedef struct {\r
UINT8 Type; ///< Type here should be 2\r
UINT8 PlatformFeatures;\r
UINT8 Reserved[14];\r
} SAL_ST_PLATFORM_FEATURES;\r
-#pragma pack()\r
+\r
//\r
// Value of Platform Feature List\r
//\r
#define SAL_PLAT_FEAT_PLAT_IPI_HINT 0x02\r
#define SAL_PLAT_FEAT_PROC_IPI_HINT 0x04\r
\r
-#pragma pack(1)\r
///\r
/// Format of Translation Register Descriptor Entry\r
///\r
UINT64 EncodedPageSize;\r
UINT64 Reserved1;\r
} SAL_ST_TR_DECRIPTOR;\r
-#pragma pack()\r
+\r
//\r
// Type of Translation Register\r
//\r
#define EFI_SAL_ST_TR_USAGE_INSTRUCTION 00\r
#define EFI_SAL_ST_TR_USAGE_DATA 01\r
\r
-#pragma pack(1)\r
///\r
/// Definition of Coherence Domain Information\r
///\r
UINT64 NumberOfProcessors;\r
UINT64 LocalIDRegister;\r
} SAL_COHERENCE_DOMAIN_INFO;\r
-#pragma pack()\r
-\r
-#pragma pack(1)\r
+ \r
///\r
/// Format of Purge Translation Cache Coherence Domain Entry\r
///\r
UINT32 NumberOfDomains;\r
SAL_COHERENCE_DOMAIN_INFO *DomainInformation;\r
} SAL_ST_CACHE_COHERENCE_DECRIPTOR;\r
-#pragma pack()\r
\r
-#pragma pack(1)\r
///\r
/// Format of Application Processor Wake-Up Descriptor Entry\r
///\r
UINT8 Reserved[6];\r
UINT64 ExternalInterruptVector;\r
} SAL_ST_AP_WAKEUP_DECRIPTOR;\r
-#pragma pack()\r
\r
///\r
/// Format of Firmware Interface Table (FIT) Entry\r
#define PCI_BUS_OEM_ID_VALID_BIT_MASK 0x200\r
#define PCI_BUS_OEM_DATA_STRUCT_VALID_BIT_MASK 0x400\r
\r
+///\r
+/// Designated PCI Bus identifier\r
+///\r
typedef struct {\r
UINT8 BusNumber;\r
UINT8 SegmentNumber;\r
} PCI_BUS_ID;\r
+\r
///\r
/// Definition of Platform PCI Bus Error Info Record\r
///\r