/** @file\r
- Industry Standard Definitions of SMBIOS Table Specification v2.7.1\r
+ Industry Standard Definitions of SMBIOS Table Specification v3.0.0.\r
\r
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
+(C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>\r
This program and the accompanying materials are licensed and made available under \r
the terms and conditions of the BSD License that accompanies this distribution. \r
The full text of the license may be found at\r
///\r
#define SMBIOS_STRING_MAX_LENGTH 64\r
\r
+//\r
+// The length of the entire structure table (including all strings) must be reported\r
+// in the Structure Table Length field of the SMBIOS Structure Table Entry Point,\r
+// which is a WORD field limited to 65,535 bytes.\r
+//\r
+#define SMBIOS_TABLE_MAX_LENGTH 0xFFFF\r
+\r
+//\r
+// For SMBIOS 3.0, Structure table maximum size in Entry Point structure is DWORD field limited to 0xFFFFFFFF bytes.\r
+//\r
+#define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF\r
+\r
+//\r
+// SMBIOS type macros which is according to SMBIOS 2.7 specification.\r
+//\r
+#define SMBIOS_TYPE_BIOS_INFORMATION 0\r
+#define SMBIOS_TYPE_SYSTEM_INFORMATION 1\r
+#define SMBIOS_TYPE_BASEBOARD_INFORMATION 2\r
+#define SMBIOS_TYPE_SYSTEM_ENCLOSURE 3\r
+#define SMBIOS_TYPE_PROCESSOR_INFORMATION 4\r
+#define SMBIOS_TYPE_MEMORY_CONTROLLER_INFORMATION 5\r
+#define SMBIOS_TYPE_MEMORY_MODULE_INFORMATON 6\r
+#define SMBIOS_TYPE_CACHE_INFORMATION 7\r
+#define SMBIOS_TYPE_PORT_CONNECTOR_INFORMATION 8\r
+#define SMBIOS_TYPE_SYSTEM_SLOTS 9\r
+#define SMBIOS_TYPE_ONBOARD_DEVICE_INFORMATION 10\r
+#define SMBIOS_TYPE_OEM_STRINGS 11\r
+#define SMBIOS_TYPE_SYSTEM_CONFIGURATION_OPTIONS 12\r
+#define SMBIOS_TYPE_BIOS_LANGUAGE_INFORMATION 13\r
+#define SMBIOS_TYPE_GROUP_ASSOCIATIONS 14\r
+#define SMBIOS_TYPE_SYSTEM_EVENT_LOG 15\r
+#define SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY 16\r
+#define SMBIOS_TYPE_MEMORY_DEVICE 17\r
+#define SMBIOS_TYPE_32BIT_MEMORY_ERROR_INFORMATION 18\r
+#define SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS 19\r
+#define SMBIOS_TYPE_MEMORY_DEVICE_MAPPED_ADDRESS 20\r
+#define SMBIOS_TYPE_BUILT_IN_POINTING_DEVICE 21\r
+#define SMBIOS_TYPE_PORTABLE_BATTERY 22\r
+#define SMBIOS_TYPE_SYSTEM_RESET 23\r
+#define SMBIOS_TYPE_HARDWARE_SECURITY 24\r
+#define SMBIOS_TYPE_SYSTEM_POWER_CONTROLS 25\r
+#define SMBIOS_TYPE_VOLTAGE_PROBE 26\r
+#define SMBIOS_TYPE_COOLING_DEVICE 27\r
+#define SMBIOS_TYPE_TEMPERATURE_PROBE 28\r
+#define SMBIOS_TYPE_ELECTRICAL_CURRENT_PROBE 29\r
+#define SMBIOS_TYPE_OUT_OF_BAND_REMOTE_ACCESS 30\r
+#define SMBIOS_TYPE_BOOT_INTEGRITY_SERVICE 31\r
+#define SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION 32\r
+#define SMBIOS_TYPE_64BIT_MEMORY_ERROR_INFORMATION 33\r
+#define SMBIOS_TYPE_MANAGEMENT_DEVICE 34\r
+#define SMBIOS_TYPE_MANAGEMENT_DEVICE_COMPONENT 35\r
+#define SMBIOS_TYPE_MANAGEMENT_DEVICE_THRESHOLD_DATA 36\r
+#define SMBIOS_TYPE_MEMORY_CHANNEL 37\r
+#define SMBIOS_TYPE_IPMI_DEVICE_INFORMATION 38\r
+#define SMBIOS_TYPE_SYSTEM_POWER_SUPPLY 39\r
+#define SMBIOS_TYPE_ADDITIONAL_INFORMATION 40\r
+#define SMBIOS_TYPE_ONBOARD_DEVICES_EXTENDED_INFORMATION 41\r
+#define SMBIOS_TYPE_MANAGEMENT_CONTROLLER_HOST_INTERFACE 42\r
+\r
///\r
/// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.\r
/// Upper-level software that interprets the SMBIOS structure-table should bypass an \r
///\r
#define SMBIOS_TYPE_END_OF_TABLE 0x007F\r
\r
+#define SMBIOS_OEM_BEGIN 128\r
+#define SMBIOS_OEM_END 255\r
+\r
+///\r
+/// Types 0 through 127 (7Fh) are reserved for and defined by this\r
+/// specification. Types 128 through 256 (80h to FFh) are available for system- and OEM-specific information. \r
+///\r
+typedef UINT8 SMBIOS_TYPE;\r
+\r
+///\r
+/// Specifies the structure's handle, a unique 16-bit number in the range 0 to 0FFFEh (for version\r
+/// 2.0) or 0 to 0FEFFh (for version 2.1 and later). The handle can be used with the Get SMBIOS\r
+/// Structure function to retrieve a specific structure; the handle numbers are not required to be\r
+/// contiguous. For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for\r
+/// use by this specification.\r
+/// If the system configuration changes, a previously assigned handle might no longer exist.\r
+/// However once a handle has been assigned by the BIOS, the BIOS cannot re-assign that handle\r
+/// number to another structure.\r
+///\r
+typedef UINT16 SMBIOS_HANDLE;\r
+\r
///\r
/// Smbios Table Entry Point Structure.\r
///\r
UINT8 SmbiosBcdRevision;\r
} SMBIOS_TABLE_ENTRY_POINT;\r
\r
+typedef struct {\r
+ UINT8 AnchorString[5];\r
+ UINT8 EntryPointStructureChecksum;\r
+ UINT8 EntryPointLength;\r
+ UINT8 MajorVersion;\r
+ UINT8 MinorVersion;\r
+ UINT8 DocRev;\r
+ UINT8 EntryPointRevision;\r
+ UINT8 Reserved;\r
+ UINT32 TableMaximumSize;\r
+ UINT64 TableAddress;\r
+} SMBIOS_TABLE_3_0_ENTRY_POINT;\r
+\r
///\r
/// The Smbios structure header.\r
///\r
typedef struct {\r
- UINT8 Type;\r
- UINT8 Length;\r
- UINT16 Handle;\r
+ SMBIOS_TYPE Type;\r
+ UINT8 Length;\r
+ SMBIOS_HANDLE Handle;\r
} SMBIOS_STRUCTURE;\r
\r
///\r
-/// String Number for a Null terminated string, 00h stands for no string available.\r
+/// Text strings associated with a given SMBIOS structure are returned in the dmiStrucBuffer, appended directly after\r
+/// the formatted portion of the structure. This method of returning string information eliminates the need for\r
+/// application software to deal with pointers embedded in the SMBIOS structure. Each string is terminated with a null\r
+/// (00h) BYTE and the set of strings is terminated with an additional null (00h) BYTE. When the formatted portion of\r
+/// a SMBIOS structure references a string, it does so by specifying a non-zero string number within the structure's\r
+/// string-set. For example, if a string field contains 02h, it references the second string following the formatted portion\r
+/// of the SMBIOS structure. If a string field references no string, a null (0) is placed in that string field. If the\r
+/// formatted portion of the structure contains string-reference fields and all the string fields are set to 0 (no string\r
+/// references), the formatted section of the structure is followed by two null (00h) BYTES.\r
///\r
typedef UINT8 SMBIOS_TABLE_STRING;\r
\r
MiscChassisCompactPCI = 0x1A,\r
MiscChassisAdvancedTCA = 0x1B,\r
MiscChassisBlade = 0x1C,\r
- MiscChassisBladeEnclosure = 0x1D\r
+ MiscChassisBladeEnclosure = 0x1D,\r
+ MiscChassisTablet = 0x1E,\r
+ MiscChassisConvertible = 0x1F,\r
+ MiscChassisDetachable = 0x20\r
} MISC_CHASSIS_TYPE;\r
\r
///\r
ProcessorFamilyIntelCoreDuoMobile = 0x29,\r
ProcessorFamilyIntelCoreSoloMobile = 0x2A,\r
ProcessorFamilyIntelAtom = 0x2B,\r
- ProcessorFamilyAlpha3 = 0x30,\r
+ ProcessorFamilyIntelCoreM = 0x2C,\r
+ ProcessorFamilyAlpha = 0x30,\r
ProcessorFamilyAlpha21064 = 0x31,\r
ProcessorFamilyAlpha21066 = 0x32,\r
ProcessorFamilyAlpha21164 = 0x33,\r
ProcessorFamilyAmdOpteron4100Series = 0x3C,\r
ProcessorFamilyAmdOpteron6200Series = 0x3D,\r
ProcessorFamilyAmdOpteron4200Series = 0x3E,\r
+ ProcessorFamilyAmdFxSeries = 0x3F,\r
ProcessorFamilyMips = 0x40,\r
ProcessorFamilyMIPSR4000 = 0x41,\r
ProcessorFamilyMIPSR4200 = 0x42,\r
ProcessorFamilyMIPSR10000 = 0x45,\r
ProcessorFamilyAmdCSeries = 0x46,\r
ProcessorFamilyAmdESeries = 0x47,\r
- ProcessorFamilyAmdSSeries = 0x48,\r
+ ProcessorFamilyAmdASeries = 0x48, ///< SMBIOS spec 2.8.0 updated the name\r
ProcessorFamilyAmdGSeries = 0x49,\r
+ ProcessorFamilyAmdZSeries = 0x4A,\r
+ ProcessorFamilyAmdRSeries = 0x4B,\r
+ ProcessorFamilyAmdOpteron4300 = 0x4C,\r
+ ProcessorFamilyAmdOpteron6300 = 0x4D,\r
+ ProcessorFamilyAmdOpteron3300 = 0x4E,\r
+ ProcessorFamilyAmdFireProSeries = 0x4F,\r
ProcessorFamilySparc = 0x50,\r
ProcessorFamilySuperSparc = 0x51,\r
ProcessorFamilymicroSparcII = 0x52,\r
ProcessorFamilymicroSparcIIep = 0x53,\r
ProcessorFamilyUltraSparc = 0x54,\r
ProcessorFamilyUltraSparcII = 0x55,\r
- ProcessorFamilyUltraSparcIIi = 0x56,\r
+ ProcessorFamilyUltraSparcIii = 0x56,\r
ProcessorFamilyUltraSparcIII = 0x57,\r
ProcessorFamilyUltraSparcIIIi = 0x58,\r
ProcessorFamily68040 = 0x60,\r
ProcessorFamily68010 = 0x63,\r
ProcessorFamily68020 = 0x64,\r
ProcessorFamily68030 = 0x65,\r
+ ProcessorFamilyAmdAthlonX4QuadCore = 0x66,\r
+ ProcessorFamilyAmdOpteronX1000Series = 0x67,\r
+ ProcessorFamilyAmdOpteronX2000Series = 0x68,\r
ProcessorFamilyHobbit = 0x70,\r
ProcessorFamilyCrusoeTM5000 = 0x78,\r
ProcessorFamilyCrusoeTM3000 = 0x79,\r
ProcessorFamilyIntelCeleronD = 0xBA,\r
ProcessorFamilyIntelPentiumD = 0xBB,\r
ProcessorFamilyIntelPentiumEx = 0xBC,\r
- ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 correct this value\r
+ ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 updated this value\r
ProcessorFamilyReserved = 0xBE,\r
ProcessorFamilyIntelCore2 = 0xBF,\r
ProcessorFamilyIntelCore2Solo = 0xC0,\r
ProcessorFamilyG4 = 0xC9,\r
ProcessorFamilyG5 = 0xCA,\r
ProcessorFamilyG6 = 0xCB,\r
- ProcessorFamilyzArchitectur = 0xCC,\r
+ ProcessorFamilyzArchitecture = 0xCC,\r
ProcessorFamilyIntelCoreI5 = 0xCD,\r
ProcessorFamilyIntelCoreI3 = 0xCE,\r
ProcessorFamilyViaC7M = 0xD2,\r
ProcessorFamilyQuadCoreIntelXeon7Series = 0xDE,\r
ProcessorFamilyMultiCoreIntelXeon7Series = 0xDF,\r
ProcessorFamilyMultiCoreIntelXeon3400Series = 0xE0,\r
+ ProcessorFamilyAmdOpteron3000Series = 0xE4,\r
+ ProcessorFamilyAmdSempronII = 0xE5,\r
ProcessorFamilyEmbeddedAmdOpteronQuadCore = 0xE6,\r
ProcessorFamilyAmdPhenomTripleCore = 0xE7,\r
ProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8,\r
ProcessorFamilyReserved1 = 0xFF\r
} PROCESSOR_FAMILY_DATA;\r
\r
+///\r
+/// Processor Information2 - Processor Family2.\r
+///\r
+typedef enum {\r
+ ProcessorFamilySH3 = 0x0104,\r
+ ProcessorFamilySH4 = 0x0105,\r
+ ProcessorFamilyARM = 0x0118,\r
+ ProcessorFamilyStrongARM = 0x0119,\r
+ ProcessorFamily6x86 = 0x012C,\r
+ ProcessorFamilyMediaGX = 0x012D,\r
+ ProcessorFamilyMII = 0x012E,\r
+ ProcessorFamilyWinChip = 0x0140,\r
+ ProcessorFamilyDSP = 0x015E,\r
+ ProcessorFamilyVideoProcessor = 0x01F4\r
+} PROCESSOR_FAMILY2_DATA;\r
+\r
///\r
/// Processor Information - Voltage. \r
///\r
ProcessorUpgradeSocketrPGA988B = 0x21,\r
ProcessorUpgradeSocketBGA1023 = 0x22,\r
ProcessorUpgradeSocketBGA1224 = 0x23,\r
- ProcessorUpgradeSocketBGA1155 = 0x24,\r
+ ProcessorUpgradeSocketLGA1155 = 0x24, ///< SMBIOS spec 2.8.0 updated the name\r
ProcessorUpgradeSocketLGA1356 = 0x25,\r
ProcessorUpgradeSocketLGA2011 = 0x26,\r
ProcessorUpgradeSocketFS1 = 0x27,\r
ProcessorUpgradeSocketFS2 = 0x28,\r
ProcessorUpgradeSocketFM1 = 0x29,\r
- ProcessorUpgradeSocketFM2 = 0x2A\r
+ ProcessorUpgradeSocketFM2 = 0x2A,\r
+ ProcessorUpgradeSocketLGA2011_3 = 0x2B,\r
+ ProcessorUpgradeSocketLGA1356_3 = 0x2C,\r
+ ProcessorUpgradeSocketLGA1150 = 0x2D,\r
+ ProcessorUpgradeSocketBGA1168 = 0x2E,\r
+ ProcessorUpgradeSocketBGA1234 = 0x2F,\r
+ ProcessorUpgradeSocketBGA1364 = 0x30\r
} PROCESSOR_UPGRADE;\r
\r
///\r
// Add for smbios 2.6\r
//\r
UINT16 ProcessorFamily2;\r
+ //\r
+ // Add for smbios 3.0\r
+ //\r
+ UINT16 CoreCount2;\r
+ UINT16 EnabledCoreCount2;\r
+ UINT16 ThreadCount2;\r
} SMBIOS_TABLE_TYPE4;\r
\r
///\r
PortTypeAudioPort = 0x1D,\r
PortTypeModemPort = 0x1E,\r
PortTypeNetworkPort = 0x1F,\r
+ PortTypeSata = 0x20,\r
+ PortTypeSas = 0x21,\r
PortType8251Compatible = 0xA0,\r
PortType8251FifoCompatible = 0xA1,\r
PortTypeOther = 0xFF\r
SlotTypeApg2X = 0x10,\r
SlotTypeAgp4X = 0x11,\r
SlotTypePciX = 0x12,\r
- SlotTypeAgp4x = 0x13,\r
+ SlotTypeAgp8X = 0x13,\r
+ SlotTypeM2Socket1_DP = 0x14,\r
+ SlotTypeM2Socket1_SD = 0x15,\r
+ SlotTypeM2Socket2 = 0x16,\r
+ SlotTypeM2Socket3 = 0x17,\r
+ SlotTypeMxmTypeI = 0x18,\r
+ SlotTypeMxmTypeII = 0x19,\r
+ SlotTypeMxmTypeIIIStandard = 0x1A,\r
+ SlotTypeMxmTypeIIIHe = 0x1B,\r
+ SlotTypeMxmTypeIV = 0x1C,\r
+ SlotTypeMxm30TypeA = 0x1D,\r
+ SlotTypeMxm30TypeB = 0x1E,\r
+ SlotTypePciExpressGen2Sff_8639 = 0x1F,\r
+ SlotTypePciExpressGen3Sff_8639 = 0x20,\r
SlotTypePC98C20 = 0xA0,\r
SlotTypePC98C24 = 0xA1,\r
SlotTypePC98E = 0xA2,\r
MemoryTypeDdr2 = 0x13,\r
MemoryTypeDdr2FbDimm = 0x14,\r
MemoryTypeDdr3 = 0x18,\r
- MemoryTypeFbd2 = 0x19\r
+ MemoryTypeFbd2 = 0x19,\r
+ MemoryTypeDdr4 = 0x1A,\r
+ MemoryTypeLpddr = 0x1B,\r
+ MemoryTypeLpddr2 = 0x1C,\r
+ MemoryTypeLpddr3 = 0x1D,\r
+ MemoryTypeLpddr4 = 0x1E\r
} MEMORY_DEVICE_TYPE;\r
\r
typedef struct {\r
UINT16 Nonvolatile :1;\r
UINT16 Registered :1;\r
UINT16 Unbuffered :1;\r
- UINT16 Reserved1 :1;\r
+ UINT16 LrDimm :1;\r
} MEMORY_DEVICE_TYPE_DETAIL;\r
\r
///\r
//\r
UINT32 ExtendedSize;\r
UINT16 ConfiguredMemoryClockSpeed;\r
+ //\r
+ // Add for smbios 2.8.0\r
+ //\r
+ UINT16 MinimumVoltage;\r
+ UINT16 MaximumVoltage;\r
+ UINT16 ConfiguredVoltage;\r
} SMBIOS_TABLE_TYPE17;\r
\r
///\r
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