Updated the Runtime Driver to use the MDE libs for cache flush and removed local...

[mirror_edk2.git] / MdePkg / Include / Library / BaseLib.h

diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index e414e27399b1336ddf9c7ce2e18fcd13576ef9ca..329385d9c19f1813d04d55b01b1ef467bce8c779 100644 (file)
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -5072,24 +5072,24 @@ IpfReadItc (
 \r
 \r
 /**\r
-  Invalidates a range of instruction cache lines in the cache coherency domain\r
-  of the calling CPU.\r
-\r
-  Invalidates the instruction cache lines specified by Address and Length. If\r
-  Address is not aligned on a cache line boundary, then entire instruction\r
-  cache line containing Address is invalidated. If Address + Length is not\r
-  aligned on a cache line boundary, then the entire instruction cache line\r
-  containing Address + Length -1 is invalidated. This function may choose to\r
-  invalidate the entire instruction cache if that is more efficient than\r
-  invalidating the specified range. If Length is 0, the no instruction cache\r
-  lines are invalidated. Address is returned.\r
+  Flush a range of  cache lines in the cache coherency domain of the calling \r
+  CPU.\r
+\r
+  Invalidates the  cache lines specified by Address and Length. If Address is \r
+  not aligned on a cache line boundary, then entire cache line containing \r
+  Address is invalidated. If Address + Length is not aligned on a cache line \r
+  boundary, then the entire instruction cache line containing Address + Length\r
+  -1 is invalidated. This function may choose to invalidate the entire \r
+  instruction cache if that is more efficient than invalidating the specified \r
+  range. If Length is 0, the no instruction cache lines are invalidated. \r
+  Address is returned.\r
 \r
   If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
 \r
-  @param  Address The base address of the instruction cache lines to\r
-                  invalidate. If the CPU is in a physical addressing mode, then\r
-                  Address is a physical address. If the CPU is in a virtual\r
-                  addressing mode, then Address is a virtual address.\r
+  @param  Address The base address of the instruction lines to invalidate. If \r
+                  the CPU is in a physical addressing mode, then Address is a\r
+                  physical address. If the CPU is in a virtual addressing mode,\r
+                  then Address is a virtual address.\r
 \r
   @param  Length  The number of bytes to invalidate from the instruction cache.\r
 \r
@@ -5098,7 +5098,7 @@ IpfReadItc (
 **/\r
 VOID *\r
 EFIAPI\r
-IpfInvalidateInstructionCacheRange (\r
+IpfFlushCacheRange (\r
   IN      VOID                      *Address,\r
   IN      UINTN                     Length\r
   );\r