Provides string functions, linked list functions, math functions, synchronization\r
functions, file path functions, and CPU architecture-specific functions.\r
\r
-Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>\r
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution. The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php.\r
+Copyright (c) Microsoft Corporation.<BR>\r
+Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r
+Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>\r
\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
/// The IA-32 architecture context buffer used by SetJump() and LongJump().\r
///\r
typedef struct {\r
- UINT32 Ebx;\r
- UINT32 Esi;\r
- UINT32 Edi;\r
- UINT32 Ebp;\r
- UINT32 Esp;\r
- UINT32 Eip;\r
+ UINT32 Ebx;\r
+ UINT32 Esi;\r
+ UINT32 Edi;\r
+ UINT32 Ebp;\r
+ UINT32 Esp;\r
+ UINT32 Eip;\r
+ UINT32 Ssp;\r
} BASE_LIBRARY_JUMP_BUFFER;\r
\r
-#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4\r
+#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4\r
\r
#endif // defined (MDE_CPU_IA32)\r
\r
-#if defined (MDE_CPU_IPF)\r
-\r
-///\r
-/// The Itanium architecture context buffer used by SetJump() and LongJump().\r
-///\r
-typedef struct {\r
- UINT64 F2[2];\r
- UINT64 F3[2];\r
- UINT64 F4[2];\r
- UINT64 F5[2];\r
- UINT64 F16[2];\r
- UINT64 F17[2];\r
- UINT64 F18[2];\r
- UINT64 F19[2];\r
- UINT64 F20[2];\r
- UINT64 F21[2];\r
- UINT64 F22[2];\r
- UINT64 F23[2];\r
- UINT64 F24[2];\r
- UINT64 F25[2];\r
- UINT64 F26[2];\r
- UINT64 F27[2];\r
- UINT64 F28[2];\r
- UINT64 F29[2];\r
- UINT64 F30[2];\r
- UINT64 F31[2];\r
- UINT64 R4;\r
- UINT64 R5;\r
- UINT64 R6;\r
- UINT64 R7;\r
- UINT64 SP;\r
- UINT64 BR0;\r
- UINT64 BR1;\r
- UINT64 BR2;\r
- UINT64 BR3;\r
- UINT64 BR4;\r
- UINT64 BR5;\r
- UINT64 InitialUNAT;\r
- UINT64 AfterSpillUNAT;\r
- UINT64 PFS;\r
- UINT64 BSP;\r
- UINT64 Predicates;\r
- UINT64 LoopCount;\r
- UINT64 FPSR;\r
-} BASE_LIBRARY_JUMP_BUFFER;\r
-\r
-#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10\r
-\r
-#endif // defined (MDE_CPU_IPF)\r
-\r
#if defined (MDE_CPU_X64)\r
///\r
/// The x64 architecture context buffer used by SetJump() and LongJump().\r
///\r
typedef struct {\r
- UINT64 Rbx;\r
- UINT64 Rsp;\r
- UINT64 Rbp;\r
- UINT64 Rdi;\r
- UINT64 Rsi;\r
- UINT64 R12;\r
- UINT64 R13;\r
- UINT64 R14;\r
- UINT64 R15;\r
- UINT64 Rip;\r
- UINT64 MxCsr;\r
- UINT8 XmmBuffer[160]; ///< XMM6-XMM15.\r
+ UINT64 Rbx;\r
+ UINT64 Rsp;\r
+ UINT64 Rbp;\r
+ UINT64 Rdi;\r
+ UINT64 Rsi;\r
+ UINT64 R12;\r
+ UINT64 R13;\r
+ UINT64 R14;\r
+ UINT64 R15;\r
+ UINT64 Rip;\r
+ UINT64 MxCsr;\r
+ UINT8 XmmBuffer[160]; ///< XMM6-XMM15.\r
+ UINT64 Ssp;\r
} BASE_LIBRARY_JUMP_BUFFER;\r
\r
-#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r
+#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r
\r
#endif // defined (MDE_CPU_X64)\r
\r
/// The EBC context buffer used by SetJump() and LongJump().\r
///\r
typedef struct {\r
- UINT64 R0;\r
- UINT64 R1;\r
- UINT64 R2;\r
- UINT64 R3;\r
- UINT64 IP;\r
+ UINT64 R0;\r
+ UINT64 R1;\r
+ UINT64 R2;\r
+ UINT64 R3;\r
+ UINT64 IP;\r
} BASE_LIBRARY_JUMP_BUFFER;\r
\r
-#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r
+#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r
\r
#endif // defined (MDE_CPU_EBC)\r
\r
UINT32 R14;\r
} BASE_LIBRARY_JUMP_BUFFER;\r
\r
-#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4\r
+#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4\r
\r
-#endif // defined (MDE_CPU_ARM)\r
+#endif // defined (MDE_CPU_ARM)\r
\r
#if defined (MDE_CPU_AARCH64)\r
typedef struct {\r
UINT64 D15;\r
} BASE_LIBRARY_JUMP_BUFFER;\r
\r
-#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r
+#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r
+\r
+#endif // defined (MDE_CPU_AARCH64)\r
+\r
+#if defined (MDE_CPU_RISCV64)\r
+///\r
+/// The RISC-V architecture context buffer used by SetJump() and LongJump().\r
+///\r
+typedef struct {\r
+ UINT64 RA;\r
+ UINT64 S0;\r
+ UINT64 S1;\r
+ UINT64 S2;\r
+ UINT64 S3;\r
+ UINT64 S4;\r
+ UINT64 S5;\r
+ UINT64 S6;\r
+ UINT64 S7;\r
+ UINT64 S8;\r
+ UINT64 S9;\r
+ UINT64 S10;\r
+ UINT64 S11;\r
+ UINT64 SP;\r
+} BASE_LIBRARY_JUMP_BUFFER;\r
+\r
+#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r
+\r
+VOID\r
+RiscVSetSupervisorScratch (\r
+ IN UINT64\r
+ );\r
+\r
+UINT64\r
+RiscVGetSupervisorScratch (\r
+ VOID\r
+ );\r
+\r
+VOID\r
+RiscVSetSupervisorStvec (\r
+ IN UINT64\r
+ );\r
+\r
+UINT64\r
+RiscVGetSupervisorStvec (\r
+ VOID\r
+ );\r
+\r
+UINT64\r
+RiscVGetSupervisorTrapCause (\r
+ VOID\r
+ );\r
+\r
+VOID\r
+RiscVSetSupervisorAddressTranslationRegister (\r
+ IN UINT64\r
+ );\r
+\r
+UINT64\r
+RiscVReadTimer (\r
+ VOID\r
+ );\r
+\r
+VOID\r
+RiscVEnableTimerInterrupt (\r
+ VOID\r
+ );\r
+\r
+VOID\r
+RiscVDisableTimerInterrupt (\r
+ VOID\r
+ );\r
+\r
+VOID\r
+RiscVClearPendingTimerInterrupt (\r
+ VOID\r
+ );\r
+\r
+#endif // defined (MDE_CPU_RISCV64)\r
+\r
+#if defined (MDE_CPU_LOONGARCH64)\r
+///\r
+/// The LoongArch architecture context buffer used by SetJump() and LongJump()\r
+///\r
+typedef struct {\r
+ UINT64 S0;\r
+ UINT64 S1;\r
+ UINT64 S2;\r
+ UINT64 S3;\r
+ UINT64 S4;\r
+ UINT64 S5;\r
+ UINT64 S6;\r
+ UINT64 S7;\r
+ UINT64 S8;\r
+ UINT64 SP;\r
+ UINT64 FP;\r
+ UINT64 RA;\r
+} BASE_LIBRARY_JUMP_BUFFER;\r
\r
-#endif // defined (MDE_CPU_AARCH64)\r
+#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r
\r
+#endif // defined (MDE_CPU_LOONGARCH64)\r
\r
//\r
// String Services\r
//\r
\r
-\r
/**\r
Returns the length of a Null-terminated Unicode string.\r
\r
UINTN\r
EFIAPI\r
StrnLenS (\r
- IN CONST CHAR16 *String,\r
- IN UINTN MaxSize\r
+ IN CONST CHAR16 *String,\r
+ IN UINTN MaxSize\r
);\r
\r
/**\r
UINTN\r
EFIAPI\r
StrnSizeS (\r
- IN CONST CHAR16 *String,\r
- IN UINTN MaxSize\r
+ IN CONST CHAR16 *String,\r
+ IN UINTN MaxSize\r
);\r
\r
/**\r
\r
If Destination is not aligned on a 16-bit boundary, then ASSERT().\r
If Source is not aligned on a 16-bit boundary, then ASSERT().\r
- If an error would be returned, then the function will also ASSERT().\r
\r
If an error is returned, then the Destination is unmodified.\r
\r
@retval RETURN_INVALID_PARAMETER If Destination is NULL.\r
If Source is NULL.\r
If PcdMaximumUnicodeStringLength is not zero,\r
- and DestMax is greater than \r
+ and DestMax is greater than\r
PcdMaximumUnicodeStringLength.\r
If DestMax is 0.\r
@retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r
RETURN_STATUS\r
EFIAPI\r
StrCpyS (\r
- OUT CHAR16 *Destination,\r
- IN UINTN DestMax,\r
- IN CONST CHAR16 *Source\r
+ OUT CHAR16 *Destination,\r
+ IN UINTN DestMax,\r
+ IN CONST CHAR16 *Source\r
);\r
\r
/**\r
\r
If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r
If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r
- If an error would be returned, then the function will also ASSERT().\r
\r
If an error is returned, then the Destination is unmodified.\r
\r
@param Length The maximum number of Unicode characters to copy.\r
\r
@retval RETURN_SUCCESS String is copied.\r
- @retval RETURN_BUFFER_TOO_SMALL If DestMax is NOT greater than \r
+ @retval RETURN_BUFFER_TOO_SMALL If DestMax is NOT greater than\r
MIN(StrLen(Source), Length).\r
@retval RETURN_INVALID_PARAMETER If Destination is NULL.\r
If Source is NULL.\r
If PcdMaximumUnicodeStringLength is not zero,\r
- and DestMax is greater than \r
+ and DestMax is greater than\r
PcdMaximumUnicodeStringLength.\r
If DestMax is 0.\r
@retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r
RETURN_STATUS\r
EFIAPI\r
StrnCpyS (\r
- OUT CHAR16 *Destination,\r
- IN UINTN DestMax,\r
- IN CONST CHAR16 *Source,\r
- IN UINTN Length\r
+ OUT CHAR16 *Destination,\r
+ IN UINTN DestMax,\r
+ IN CONST CHAR16 *Source,\r
+ IN UINTN Length\r
);\r
\r
/**\r
\r
If Destination is not aligned on a 16-bit boundary, then ASSERT().\r
If Source is not aligned on a 16-bit boundary, then ASSERT().\r
- If an error would be returned, then the function will also ASSERT().\r
\r
If an error is returned, then the Destination is unmodified.\r
\r
@param Source A pointer to a Null-terminated Unicode string.\r
\r
@retval RETURN_SUCCESS String is appended.\r
- @retval RETURN_BAD_BUFFER_SIZE If DestMax is NOT greater than \r
+ @retval RETURN_BAD_BUFFER_SIZE If DestMax is NOT greater than\r
StrLen(Destination).\r
@retval RETURN_BUFFER_TOO_SMALL If (DestMax - StrLen(Destination)) is NOT\r
greater than StrLen(Source).\r
@retval RETURN_INVALID_PARAMETER If Destination is NULL.\r
If Source is NULL.\r
If PcdMaximumUnicodeStringLength is not zero,\r
- and DestMax is greater than \r
+ and DestMax is greater than\r
PcdMaximumUnicodeStringLength.\r
If DestMax is 0.\r
@retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r
RETURN_STATUS\r
EFIAPI\r
StrCatS (\r
- IN OUT CHAR16 *Destination,\r
- IN UINTN DestMax,\r
- IN CONST CHAR16 *Source\r
+ IN OUT CHAR16 *Destination,\r
+ IN UINTN DestMax,\r
+ IN CONST CHAR16 *Source\r
);\r
\r
/**\r
\r
If Destination is not aligned on a 16-bit boundary, then ASSERT().\r
If Source is not aligned on a 16-bit boundary, then ASSERT().\r
- If an error would be returned, then the function will also ASSERT().\r
\r
If an error is returned, then the Destination is unmodified.\r
\r
@retval RETURN_INVALID_PARAMETER If Destination is NULL.\r
If Source is NULL.\r
If PcdMaximumUnicodeStringLength is not zero,\r
- and DestMax is greater than \r
+ and DestMax is greater than\r
PcdMaximumUnicodeStringLength.\r
If DestMax is 0.\r
@retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r
RETURN_STATUS\r
EFIAPI\r
StrnCatS (\r
- IN OUT CHAR16 *Destination,\r
- IN UINTN DestMax,\r
- IN CONST CHAR16 *Source,\r
- IN UINTN Length\r
+ IN OUT CHAR16 *Destination,\r
+ IN UINTN DestMax,\r
+ IN CONST CHAR16 *Source,\r
+ IN UINTN Length\r
);\r
\r
/**\r
be ignored. Then, the function stops at the first character that is a not a\r
valid decimal character or a Null-terminator, whichever one comes first.\r
\r
- If String is NULL, then ASSERT().\r
- If Data is NULL, then ASSERT().\r
If String is not aligned in a 16-bit boundary, then ASSERT().\r
- If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r
- PcdMaximumUnicodeStringLength Unicode characters, not including the\r
- Null-terminator, then ASSERT().\r
\r
If String has no valid decimal digits in the above format, then 0 is stored\r
at the location pointed to by Data.\r
RETURN_STATUS\r
EFIAPI\r
StrDecimalToUintnS (\r
- IN CONST CHAR16 *String,\r
- OUT CHAR16 **EndPointer, OPTIONAL\r
- OUT UINTN *Data\r
+ IN CONST CHAR16 *String,\r
+ OUT CHAR16 **EndPointer OPTIONAL,\r
+ OUT UINTN *Data\r
);\r
\r
/**\r
be ignored. Then, the function stops at the first character that is a not a\r
valid decimal character or a Null-terminator, whichever one comes first.\r
\r
- If String is NULL, then ASSERT().\r
- If Data is NULL, then ASSERT().\r
If String is not aligned in a 16-bit boundary, then ASSERT().\r
- If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r
- PcdMaximumUnicodeStringLength Unicode characters, not including the\r
- Null-terminator, then ASSERT().\r
\r
If String has no valid decimal digits in the above format, then 0 is stored\r
at the location pointed to by Data.\r
RETURN_STATUS\r
EFIAPI\r
StrDecimalToUint64S (\r
- IN CONST CHAR16 *String,\r
- OUT CHAR16 **EndPointer, OPTIONAL\r
- OUT UINT64 *Data\r
+ IN CONST CHAR16 *String,\r
+ OUT CHAR16 **EndPointer OPTIONAL,\r
+ OUT UINT64 *Data\r
);\r
\r
/**\r
the first character that is a not a valid hexadecimal character or NULL,\r
whichever one comes first.\r
\r
- If String is NULL, then ASSERT().\r
- If Data is NULL, then ASSERT().\r
If String is not aligned in a 16-bit boundary, then ASSERT().\r
- If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r
- PcdMaximumUnicodeStringLength Unicode characters, not including the\r
- Null-terminator, then ASSERT().\r
\r
If String has no valid hexadecimal digits in the above format, then 0 is\r
stored at the location pointed to by Data.\r
RETURN_STATUS\r
EFIAPI\r
StrHexToUintnS (\r
- IN CONST CHAR16 *String,\r
- OUT CHAR16 **EndPointer, OPTIONAL\r
- OUT UINTN *Data\r
+ IN CONST CHAR16 *String,\r
+ OUT CHAR16 **EndPointer OPTIONAL,\r
+ OUT UINTN *Data\r
);\r
\r
/**\r
the first character that is a not a valid hexadecimal character or NULL,\r
whichever one comes first.\r
\r
- If String is NULL, then ASSERT().\r
- If Data is NULL, then ASSERT().\r
If String is not aligned in a 16-bit boundary, then ASSERT().\r
- If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r
- PcdMaximumUnicodeStringLength Unicode characters, not including the\r
- Null-terminator, then ASSERT().\r
\r
If String has no valid hexadecimal digits in the above format, then 0 is\r
stored at the location pointed to by Data.\r
RETURN_STATUS\r
EFIAPI\r
StrHexToUint64S (\r
- IN CONST CHAR16 *String,\r
- OUT CHAR16 **EndPointer, OPTIONAL\r
- OUT UINT64 *Data\r
+ IN CONST CHAR16 *String,\r
+ OUT CHAR16 **EndPointer OPTIONAL,\r
+ OUT UINT64 *Data\r
);\r
\r
/**\r
UINTN\r
EFIAPI\r
AsciiStrnLenS (\r
- IN CONST CHAR8 *String,\r
- IN UINTN MaxSize\r
+ IN CONST CHAR8 *String,\r
+ IN UINTN MaxSize\r
);\r
\r
/**\r
UINTN\r
EFIAPI\r
AsciiStrnSizeS (\r
- IN CONST CHAR8 *String,\r
- IN UINTN MaxSize\r
+ IN CONST CHAR8 *String,\r
+ IN UINTN MaxSize\r
);\r
\r
/**\r
\r
This function is similar as strcpy_s defined in C11.\r
\r
- If an error would be returned, then the function will also ASSERT().\r
-\r
If an error is returned, then the Destination is unmodified.\r
\r
@param Destination A pointer to a Null-terminated Ascii string.\r
@retval RETURN_INVALID_PARAMETER If Destination is NULL.\r
If Source is NULL.\r
If PcdMaximumAsciiStringLength is not zero,\r
- and DestMax is greater than \r
+ and DestMax is greater than\r
PcdMaximumAsciiStringLength.\r
If DestMax is 0.\r
@retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r
\r
This function is similar as strncpy_s defined in C11.\r
\r
- If an error would be returned, then the function will also ASSERT().\r
-\r
If an error is returned, then the Destination is unmodified.\r
\r
@param Destination A pointer to a Null-terminated Ascii string.\r
@param Length The maximum number of Ascii characters to copy.\r
\r
@retval RETURN_SUCCESS String is copied.\r
- @retval RETURN_BUFFER_TOO_SMALL If DestMax is NOT greater than \r
+ @retval RETURN_BUFFER_TOO_SMALL If DestMax is NOT greater than\r
MIN(StrLen(Source), Length).\r
@retval RETURN_INVALID_PARAMETER If Destination is NULL.\r
If Source is NULL.\r
If PcdMaximumAsciiStringLength is not zero,\r
- and DestMax is greater than \r
+ and DestMax is greater than\r
PcdMaximumAsciiStringLength.\r
If DestMax is 0.\r
@retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r
\r
This function is similar as strcat_s defined in C11.\r
\r
- If an error would be returned, then the function will also ASSERT().\r
-\r
If an error is returned, then the Destination is unmodified.\r
\r
@param Destination A pointer to a Null-terminated Ascii string.\r
@param Source A pointer to a Null-terminated Ascii string.\r
\r
@retval RETURN_SUCCESS String is appended.\r
- @retval RETURN_BAD_BUFFER_SIZE If DestMax is NOT greater than \r
+ @retval RETURN_BAD_BUFFER_SIZE If DestMax is NOT greater than\r
StrLen(Destination).\r
@retval RETURN_BUFFER_TOO_SMALL If (DestMax - StrLen(Destination)) is NOT\r
greater than StrLen(Source).\r
@retval RETURN_INVALID_PARAMETER If Destination is NULL.\r
If Source is NULL.\r
If PcdMaximumAsciiStringLength is not zero,\r
- and DestMax is greater than \r
+ and DestMax is greater than\r
PcdMaximumAsciiStringLength.\r
If DestMax is 0.\r
@retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r
\r
This function is similar as strncat_s defined in C11.\r
\r
- If an error would be returned, then the function will also ASSERT().\r
-\r
If an error is returned, then the Destination is unmodified.\r
\r
@param Destination A pointer to a Null-terminated Ascii string.\r
@retval RETURN_INVALID_PARAMETER If Destination is NULL.\r
If Source is NULL.\r
If PcdMaximumAsciiStringLength is not zero,\r
- and DestMax is greater than \r
+ and DestMax is greater than\r
PcdMaximumAsciiStringLength.\r
If DestMax is 0.\r
@retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r
be ignored. Then, the function stops at the first character that is a not a\r
valid decimal character or a Null-terminator, whichever one comes first.\r
\r
- If String is NULL, then ASSERT().\r
- If Data is NULL, then ASSERT().\r
- If PcdMaximumAsciiStringLength is not zero, and String contains more than\r
- PcdMaximumAsciiStringLength Ascii characters, not including the\r
- Null-terminator, then ASSERT().\r
-\r
If String has no valid decimal digits in the above format, then 0 is stored\r
at the location pointed to by Data.\r
If the number represented by String exceeds the range defined by UINTN, then\r
RETURN_STATUS\r
EFIAPI\r
AsciiStrDecimalToUintnS (\r
- IN CONST CHAR8 *String,\r
- OUT CHAR8 **EndPointer, OPTIONAL\r
- OUT UINTN *Data\r
+ IN CONST CHAR8 *String,\r
+ OUT CHAR8 **EndPointer OPTIONAL,\r
+ OUT UINTN *Data\r
);\r
\r
/**\r
be ignored. Then, the function stops at the first character that is a not a\r
valid decimal character or a Null-terminator, whichever one comes first.\r
\r
- If String is NULL, then ASSERT().\r
- If Data is NULL, then ASSERT().\r
- If PcdMaximumAsciiStringLength is not zero, and String contains more than\r
- PcdMaximumAsciiStringLength Ascii characters, not including the\r
- Null-terminator, then ASSERT().\r
-\r
If String has no valid decimal digits in the above format, then 0 is stored\r
at the location pointed to by Data.\r
If the number represented by String exceeds the range defined by UINT64, then\r
RETURN_STATUS\r
EFIAPI\r
AsciiStrDecimalToUint64S (\r
- IN CONST CHAR8 *String,\r
- OUT CHAR8 **EndPointer, OPTIONAL\r
- OUT UINT64 *Data\r
+ IN CONST CHAR8 *String,\r
+ OUT CHAR8 **EndPointer OPTIONAL,\r
+ OUT UINT64 *Data\r
);\r
\r
/**\r
character that is a not a valid hexadecimal character or Null-terminator,\r
whichever on comes first.\r
\r
- If String is NULL, then ASSERT().\r
- If Data is NULL, then ASSERT().\r
- If PcdMaximumAsciiStringLength is not zero, and String contains more than\r
- PcdMaximumAsciiStringLength Ascii characters, not including the\r
- Null-terminator, then ASSERT().\r
-\r
If String has no valid hexadecimal digits in the above format, then 0 is\r
stored at the location pointed to by Data.\r
If the number represented by String exceeds the range defined by UINTN, then\r
RETURN_STATUS\r
EFIAPI\r
AsciiStrHexToUintnS (\r
- IN CONST CHAR8 *String,\r
- OUT CHAR8 **EndPointer, OPTIONAL\r
- OUT UINTN *Data\r
+ IN CONST CHAR8 *String,\r
+ OUT CHAR8 **EndPointer OPTIONAL,\r
+ OUT UINTN *Data\r
);\r
\r
/**\r
character that is a not a valid hexadecimal character or Null-terminator,\r
whichever on comes first.\r
\r
- If String is NULL, then ASSERT().\r
- If Data is NULL, then ASSERT().\r
- If PcdMaximumAsciiStringLength is not zero, and String contains more than\r
- PcdMaximumAsciiStringLength Ascii characters, not including the\r
- Null-terminator, then ASSERT().\r
-\r
If String has no valid hexadecimal digits in the above format, then 0 is\r
stored at the location pointed to by Data.\r
If the number represented by String exceeds the range defined by UINT64, then\r
RETURN_STATUS\r
EFIAPI\r
AsciiStrHexToUint64S (\r
- IN CONST CHAR8 *String,\r
- OUT CHAR8 **EndPointer, OPTIONAL\r
- OUT UINT64 *Data\r
- );\r
-\r
-\r
-#ifndef DISABLE_NEW_DEPRECATED_INTERFACES\r
-\r
-/**\r
- [ATTENTION] This function is deprecated for security reason.\r
-\r
- Copies one Null-terminated Unicode string to another Null-terminated Unicode\r
- string and returns the new Unicode string.\r
-\r
- This function copies the contents of the Unicode string Source to the Unicode\r
- string Destination, and returns Destination. If Source and Destination\r
- overlap, then the results are undefined.\r
-\r
- If Destination is NULL, then ASSERT().\r
- If Destination is not aligned on a 16-bit boundary, then ASSERT().\r
- If Source is NULL, then ASSERT().\r
- If Source is not aligned on a 16-bit boundary, then ASSERT().\r
- If Source and Destination overlap, then ASSERT().\r
- If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
- PcdMaximumUnicodeStringLength Unicode characters not including the\r
- Null-terminator, then ASSERT().\r
-\r
- @param Destination The pointer to a Null-terminated Unicode string.\r
- @param Source The pointer to a Null-terminated Unicode string.\r
-\r
- @return Destination.\r
-\r
-**/\r
-CHAR16 *\r
-EFIAPI\r
-StrCpy (\r
- OUT CHAR16 *Destination,\r
- IN CONST CHAR16 *Source\r
- );\r
-\r
-\r
-/**\r
- [ATTENTION] This function is deprecated for security reason.\r
-\r
- Copies up to a specified length from one Null-terminated Unicode string to \r
- another Null-terminated Unicode string and returns the new Unicode string.\r
-\r
- This function copies the contents of the Unicode string Source to the Unicode\r
- string Destination, and returns Destination. At most, Length Unicode\r
- characters are copied from Source to Destination. If Length is 0, then\r
- Destination is returned unmodified. If Length is greater that the number of\r
- Unicode characters in Source, then Destination is padded with Null Unicode\r
- characters. If Source and Destination overlap, then the results are\r
- undefined.\r
-\r
- If Length > 0 and Destination is NULL, then ASSERT().\r
- If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r
- If Length > 0 and Source is NULL, then ASSERT().\r
- If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r
- If Source and Destination overlap, then ASSERT().\r
- If PcdMaximumUnicodeStringLength is not zero, and Length is greater than \r
- PcdMaximumUnicodeStringLength, then ASSERT().\r
- If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
- PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,\r
- then ASSERT().\r
-\r
- @param Destination The pointer to a Null-terminated Unicode string.\r
- @param Source The pointer to a Null-terminated Unicode string.\r
- @param Length The maximum number of Unicode characters to copy.\r
-\r
- @return Destination.\r
-\r
-**/\r
-CHAR16 *\r
-EFIAPI\r
-StrnCpy (\r
- OUT CHAR16 *Destination,\r
- IN CONST CHAR16 *Source,\r
- IN UINTN Length\r
+ IN CONST CHAR8 *String,\r
+ OUT CHAR8 **EndPointer OPTIONAL,\r
+ OUT UINT64 *Data\r
);\r
-#endif\r
\r
/**\r
Returns the length of a Null-terminated Unicode string.\r
UINTN\r
EFIAPI\r
StrLen (\r
- IN CONST CHAR16 *String\r
+ IN CONST CHAR16 *String\r
);\r
\r
-\r
/**\r
Returns the size of a Null-terminated Unicode string in bytes, including the\r
Null terminator.\r
\r
- This function returns the size, in bytes, of the Null-terminated Unicode string \r
+ This function returns the size, in bytes, of the Null-terminated Unicode string\r
specified by String.\r
\r
If String is NULL, then ASSERT().\r
UINTN\r
EFIAPI\r
StrSize (\r
- IN CONST CHAR16 *String\r
+ IN CONST CHAR16 *String\r
);\r
\r
-\r
/**\r
Compares two Null-terminated Unicode strings, and returns the difference\r
between the first mismatched Unicode characters.\r
INTN\r
EFIAPI\r
StrCmp (\r
- IN CONST CHAR16 *FirstString,\r
- IN CONST CHAR16 *SecondString\r
+ IN CONST CHAR16 *FirstString,\r
+ IN CONST CHAR16 *SecondString\r
);\r
\r
-\r
/**\r
Compares up to a specified length the contents of two Null-terminated Unicode strings,\r
and returns the difference between the first mismatched Unicode characters.\r
- \r
+\r
This function compares the Null-terminated Unicode string FirstString to the\r
Null-terminated Unicode string SecondString. At most, Length Unicode\r
characters will be compared. If Length is 0, then 0 is returned. If\r
INTN\r
EFIAPI\r
StrnCmp (\r
- IN CONST CHAR16 *FirstString,\r
- IN CONST CHAR16 *SecondString,\r
- IN UINTN Length\r
- );\r
-\r
-\r
-#ifndef DISABLE_NEW_DEPRECATED_INTERFACES\r
-\r
-/**\r
- [ATTENTION] This function is deprecated for security reason.\r
-\r
- Concatenates one Null-terminated Unicode string to another Null-terminated\r
- Unicode string, and returns the concatenated Unicode string.\r
-\r
- This function concatenates two Null-terminated Unicode strings. The contents\r
- of Null-terminated Unicode string Source are concatenated to the end of\r
- Null-terminated Unicode string Destination. The Null-terminated concatenated\r
- Unicode String is returned. If Source and Destination overlap, then the\r
- results are undefined.\r
-\r
- If Destination is NULL, then ASSERT().\r
- If Destination is not aligned on a 16-bit boundary, then ASSERT().\r
- If Source is NULL, then ASSERT().\r
- If Source is not aligned on a 16-bit boundary, then ASSERT().\r
- If Source and Destination overlap, then ASSERT().\r
- If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r
- than PcdMaximumUnicodeStringLength Unicode characters, not including the\r
- Null-terminator, then ASSERT().\r
- If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
- PcdMaximumUnicodeStringLength Unicode characters, not including the\r
- Null-terminator, then ASSERT().\r
- If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r
- and Source results in a Unicode string with more than\r
- PcdMaximumUnicodeStringLength Unicode characters, not including the\r
- Null-terminator, then ASSERT().\r
-\r
- @param Destination The pointer to a Null-terminated Unicode string.\r
- @param Source The pointer to a Null-terminated Unicode string.\r
-\r
- @return Destination.\r
-\r
-**/\r
-CHAR16 *\r
-EFIAPI\r
-StrCat (\r
- IN OUT CHAR16 *Destination,\r
- IN CONST CHAR16 *Source\r
- );\r
-\r
-\r
-/**\r
- [ATTENTION] This function is deprecated for security reason.\r
-\r
- Concatenates up to a specified length one Null-terminated Unicode to the end \r
- of another Null-terminated Unicode string, and returns the concatenated \r
- Unicode string.\r
-\r
- This function concatenates two Null-terminated Unicode strings. The contents\r
- of Null-terminated Unicode string Source are concatenated to the end of\r
- Null-terminated Unicode string Destination, and Destination is returned. At\r
- most, Length Unicode characters are concatenated from Source to the end of\r
- Destination, and Destination is always Null-terminated. If Length is 0, then\r
- Destination is returned unmodified. If Source and Destination overlap, then\r
- the results are undefined.\r
-\r
- If Destination is NULL, then ASSERT().\r
- If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r
- If Length > 0 and Source is NULL, then ASSERT().\r
- If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r
- If Source and Destination overlap, then ASSERT().\r
- If PcdMaximumUnicodeStringLength is not zero, and Length is greater than \r
- PcdMaximumUnicodeStringLength, then ASSERT().\r
- If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r
- than PcdMaximumUnicodeStringLength Unicode characters, not including the\r
- Null-terminator, then ASSERT().\r
- If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
- PcdMaximumUnicodeStringLength Unicode characters, not including the\r
- Null-terminator, then ASSERT().\r
- If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r
- and Source results in a Unicode string with more than PcdMaximumUnicodeStringLength\r
- Unicode characters, not including the Null-terminator, then ASSERT().\r
-\r
- @param Destination The pointer to a Null-terminated Unicode string.\r
- @param Source The pointer to a Null-terminated Unicode string.\r
- @param Length The maximum number of Unicode characters to concatenate from\r
- Source.\r
-\r
- @return Destination.\r
-\r
-**/\r
-CHAR16 *\r
-EFIAPI\r
-StrnCat (\r
- IN OUT CHAR16 *Destination,\r
- IN CONST CHAR16 *Source,\r
- IN UINTN Length\r
+ IN CONST CHAR16 *FirstString,\r
+ IN CONST CHAR16 *SecondString,\r
+ IN UINTN Length\r
);\r
-#endif\r
\r
/**\r
Returns the first occurrence of a Null-terminated Unicode sub-string\r
CHAR16 *\r
EFIAPI\r
StrStr (\r
- IN CONST CHAR16 *String,\r
- IN CONST CHAR16 *SearchString\r
+ IN CONST CHAR16 *String,\r
+ IN CONST CHAR16 *SearchString\r
);\r
\r
/**\r
UINTN\r
EFIAPI\r
StrDecimalToUintn (\r
- IN CONST CHAR16 *String\r
+ IN CONST CHAR16 *String\r
);\r
\r
/**\r
UINT64\r
EFIAPI\r
StrDecimalToUint64 (\r
- IN CONST CHAR16 *String\r
+ IN CONST CHAR16 *String\r
);\r
- \r
\r
/**\r
Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.\r
The function will ignore the pad space, which includes spaces or tab characters,\r
before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or\r
[hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the\r
- first valid hexadecimal digit. Then, the function stops at the first character \r
+ first valid hexadecimal digit. Then, the function stops at the first character\r
that is a not a valid hexadecimal character or NULL, whichever one comes first.\r
\r
If String is NULL, then ASSERT().\r
UINTN\r
EFIAPI\r
StrHexToUintn (\r
- IN CONST CHAR16 *String\r
+ IN CONST CHAR16 *String\r
);\r
\r
-\r
/**\r
Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.\r
\r
UINT64\r
EFIAPI\r
StrHexToUint64 (\r
- IN CONST CHAR16 *String\r
+ IN CONST CHAR16 *String\r
);\r
\r
/**\r
"::" can be used to compress one or more groups of X when X contains only 0.\r
The "::" can only appear once in the String.\r
\r
- If String is NULL, then ASSERT().\r
-\r
- If Address is NULL, then ASSERT().\r
-\r
If String is not aligned in a 16-bit boundary, then ASSERT().\r
\r
- If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r
- PcdMaximumUnicodeStringLength Unicode characters, not including the\r
- Null-terminator, then ASSERT().\r
-\r
If EndPointer is not NULL and Address is translated from String, a pointer\r
to the character that stopped the scan is stored at the location pointed to\r
by EndPointer.\r
RETURN_STATUS\r
EFIAPI\r
StrToIpv6Address (\r
- IN CONST CHAR16 *String,\r
- OUT CHAR16 **EndPointer, OPTIONAL\r
- OUT IPv6_ADDRESS *Address,\r
- OUT UINT8 *PrefixLength OPTIONAL\r
+ IN CONST CHAR16 *String,\r
+ OUT CHAR16 **EndPointer OPTIONAL,\r
+ OUT IPv6_ADDRESS *Address,\r
+ OUT UINT8 *PrefixLength OPTIONAL\r
);\r
\r
/**\r
When /P is in the String, the function stops at the first character that is not\r
a valid decimal digit character after P is converted.\r
\r
- If String is NULL, then ASSERT().\r
-\r
- If Address is NULL, then ASSERT().\r
-\r
If String is not aligned in a 16-bit boundary, then ASSERT().\r
\r
- If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r
- PcdMaximumUnicodeStringLength Unicode characters, not including the\r
- Null-terminator, then ASSERT().\r
-\r
If EndPointer is not NULL and Address is translated from String, a pointer\r
to the character that stopped the scan is stored at the location pointed to\r
by EndPointer.\r
RETURN_STATUS\r
EFIAPI\r
StrToIpv4Address (\r
- IN CONST CHAR16 *String,\r
- OUT CHAR16 **EndPointer, OPTIONAL\r
- OUT IPv4_ADDRESS *Address,\r
- OUT UINT8 *PrefixLength OPTIONAL\r
+ IN CONST CHAR16 *String,\r
+ OUT CHAR16 **EndPointer OPTIONAL,\r
+ OUT IPv4_ADDRESS *Address,\r
+ OUT UINT8 *PrefixLength OPTIONAL\r
);\r
\r
#define GUID_STRING_LENGTH 36\r
oo Data4[48:55]\r
pp Data4[56:63]\r
\r
- If String is NULL, then ASSERT().\r
- If Guid is NULL, then ASSERT().\r
If String is not aligned in a 16-bit boundary, then ASSERT().\r
\r
@param String Pointer to a Null-terminated Unicode string.\r
RETURN_STATUS\r
EFIAPI\r
StrToGuid (\r
- IN CONST CHAR16 *String,\r
- OUT GUID *Guid\r
+ IN CONST CHAR16 *String,\r
+ OUT GUID *Guid\r
);\r
\r
/**\r
\r
If String is not aligned in a 16-bit boundary, then ASSERT().\r
\r
- If String is NULL, then ASSERT().\r
-\r
- If Buffer is NULL, then ASSERT().\r
-\r
- If Length is not multiple of 2, then ASSERT().\r
-\r
- If PcdMaximumUnicodeStringLength is not zero and Length is greater than\r
- PcdMaximumUnicodeStringLength, then ASSERT().\r
-\r
- If MaxBufferSize is less than (Length / 2), then ASSERT().\r
-\r
@param String Pointer to a Null-terminated Unicode string.\r
@param Length The number of Unicode characters to decode.\r
@param Buffer Pointer to the converted bytes array.\r
RETURN_STATUS\r
EFIAPI\r
StrHexToBytes (\r
- IN CONST CHAR16 *String,\r
- IN UINTN Length,\r
- OUT UINT8 *Buffer,\r
- IN UINTN MaxBufferSize\r
- );\r
-\r
-#ifndef DISABLE_NEW_DEPRECATED_INTERFACES\r
-\r
-/**\r
- [ATTENTION] This function is deprecated for security reason.\r
-\r
- Convert a Null-terminated Unicode string to a Null-terminated\r
- ASCII string and returns the ASCII string.\r
-\r
- This function converts the content of the Unicode string Source\r
- to the ASCII string Destination by copying the lower 8 bits of\r
- each Unicode character. It returns Destination.\r
-\r
- The caller is responsible to make sure Destination points to a buffer with size\r
- equal or greater than ((StrLen (Source) + 1) * sizeof (CHAR8)) in bytes.\r
-\r
- If any Unicode characters in Source contain non-zero value in\r
- the upper 8 bits, then ASSERT().\r
-\r
- If Destination is NULL, then ASSERT().\r
- If Source is NULL, then ASSERT().\r
- If Source is not aligned on a 16-bit boundary, then ASSERT().\r
- If Source and Destination overlap, then ASSERT().\r
-\r
- If PcdMaximumUnicodeStringLength is not zero, and Source contains\r
- more than PcdMaximumUnicodeStringLength Unicode characters not including\r
- the Null-terminator, then ASSERT().\r
-\r
- If PcdMaximumAsciiStringLength is not zero, and Source contains more\r
- than PcdMaximumAsciiStringLength Unicode characters not including the\r
- Null-terminator, then ASSERT().\r
-\r
- @param Source The pointer to a Null-terminated Unicode string.\r
- @param Destination The pointer to a Null-terminated ASCII string.\r
-\r
- @return Destination.\r
-\r
-**/\r
-CHAR8 *\r
-EFIAPI\r
-UnicodeStrToAsciiStr (\r
- IN CONST CHAR16 *Source,\r
- OUT CHAR8 *Destination\r
+ IN CONST CHAR16 *String,\r
+ IN UINTN Length,\r
+ OUT UINT8 *Buffer,\r
+ IN UINTN MaxBufferSize\r
);\r
\r
-#endif\r
-\r
/**\r
Convert a Null-terminated Unicode string to a Null-terminated\r
ASCII string.\r
the upper 8 bits, then ASSERT().\r
\r
If Source is not aligned on a 16-bit boundary, then ASSERT().\r
- If an error would be returned, then the function will also ASSERT().\r
\r
If an error is returned, then the Destination is unmodified.\r
\r
RETURN_STATUS\r
EFIAPI\r
UnicodeStrToAsciiStrS (\r
- IN CONST CHAR16 *Source,\r
- OUT CHAR8 *Destination,\r
- IN UINTN DestMax\r
+ IN CONST CHAR16 *Source,\r
+ OUT CHAR8 *Destination,\r
+ IN UINTN DestMax\r
);\r
\r
/**\r
If any Unicode characters in Source contain non-zero value in the upper 8\r
bits, then ASSERT().\r
If Source is not aligned on a 16-bit boundary, then ASSERT().\r
- If an error would be returned, then the function will also ASSERT().\r
\r
If an error is returned, then the Destination is unmodified.\r
\r
RETURN_STATUS\r
EFIAPI\r
UnicodeStrnToAsciiStrS (\r
- IN CONST CHAR16 *Source,\r
- IN UINTN Length,\r
- OUT CHAR8 *Destination,\r
- IN UINTN DestMax,\r
- OUT UINTN *DestinationLength\r
+ IN CONST CHAR16 *Source,\r
+ IN UINTN Length,\r
+ OUT CHAR8 *Destination,\r
+ IN UINTN DestMax,\r
+ OUT UINTN *DestinationLength\r
);\r
\r
-#ifndef DISABLE_NEW_DEPRECATED_INTERFACES\r
-\r
/**\r
- [ATTENTION] This function is deprecated for security reason.\r
-\r
- Copies one Null-terminated ASCII string to another Null-terminated ASCII\r
- string and returns the new ASCII string.\r
+ Returns the length of a Null-terminated ASCII string.\r
\r
- This function copies the contents of the ASCII string Source to the ASCII\r
- string Destination, and returns Destination. If Source and Destination\r
- overlap, then the results are undefined.\r
+ This function returns the number of ASCII characters in the Null-terminated\r
+ ASCII string specified by String.\r
\r
- If Destination is NULL, then ASSERT().\r
- If Source is NULL, then ASSERT().\r
- If Source and Destination overlap, then ASSERT().\r
- If PcdMaximumAsciiStringLength is not zero and Source contains more than\r
+ If Length > 0 and Destination is NULL, then ASSERT().\r
+ If Length > 0 and Source is NULL, then ASSERT().\r
+ If PcdMaximumAsciiStringLength is not zero and String contains more than\r
PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
then ASSERT().\r
\r
- @param Destination The pointer to a Null-terminated ASCII string.\r
- @param Source The pointer to a Null-terminated ASCII string.\r
-\r
- @return Destination\r
-\r
-**/\r
-CHAR8 *\r
-EFIAPI\r
-AsciiStrCpy (\r
- OUT CHAR8 *Destination,\r
- IN CONST CHAR8 *Source\r
- );\r
-\r
-\r
-/**\r
- [ATTENTION] This function is deprecated for security reason.\r
-\r
- Copies up to a specified length one Null-terminated ASCII string to another \r
- Null-terminated ASCII string and returns the new ASCII string.\r
-\r
- This function copies the contents of the ASCII string Source to the ASCII\r
- string Destination, and returns Destination. At most, Length ASCII characters\r
- are copied from Source to Destination. If Length is 0, then Destination is\r
- returned unmodified. If Length is greater that the number of ASCII characters\r
- in Source, then Destination is padded with Null ASCII characters. If Source\r
- and Destination overlap, then the results are undefined.\r
-\r
- If Destination is NULL, then ASSERT().\r
- If Source is NULL, then ASSERT().\r
- If Source and Destination overlap, then ASSERT().\r
- If PcdMaximumAsciiStringLength is not zero, and Length is greater than \r
- PcdMaximumAsciiStringLength, then ASSERT().\r
- If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r
- PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r
- then ASSERT().\r
-\r
- @param Destination The pointer to a Null-terminated ASCII string.\r
- @param Source The pointer to a Null-terminated ASCII string.\r
- @param Length The maximum number of ASCII characters to copy.\r
-\r
- @return Destination\r
-\r
-**/\r
-CHAR8 *\r
-EFIAPI\r
-AsciiStrnCpy (\r
- OUT CHAR8 *Destination,\r
- IN CONST CHAR8 *Source,\r
- IN UINTN Length\r
- );\r
-#endif\r
-\r
-/**\r
- Returns the length of a Null-terminated ASCII string.\r
-\r
- This function returns the number of ASCII characters in the Null-terminated\r
- ASCII string specified by String.\r
-\r
- If Length > 0 and Destination is NULL, then ASSERT().\r
- If Length > 0 and Source is NULL, then ASSERT().\r
- If PcdMaximumAsciiStringLength is not zero and String contains more than\r
- PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
- then ASSERT().\r
-\r
- @param String The pointer to a Null-terminated ASCII string.\r
+ @param String The pointer to a Null-terminated ASCII string.\r
\r
@return The length of String.\r
\r
UINTN\r
EFIAPI\r
AsciiStrLen (\r
- IN CONST CHAR8 *String\r
+ IN CONST CHAR8 *String\r
);\r
\r
-\r
/**\r
Returns the size of a Null-terminated ASCII string in bytes, including the\r
Null terminator.\r
UINTN\r
EFIAPI\r
AsciiStrSize (\r
- IN CONST CHAR8 *String\r
+ IN CONST CHAR8 *String\r
);\r
\r
-\r
/**\r
Compares two Null-terminated ASCII strings, and returns the difference\r
between the first mismatched ASCII characters.\r
INTN\r
EFIAPI\r
AsciiStrCmp (\r
- IN CONST CHAR8 *FirstString,\r
- IN CONST CHAR8 *SecondString\r
+ IN CONST CHAR8 *FirstString,\r
+ IN CONST CHAR8 *SecondString\r
);\r
\r
-\r
/**\r
Performs a case insensitive comparison of two Null-terminated ASCII strings,\r
and returns the difference between the first mismatched ASCII characters.\r
INTN\r
EFIAPI\r
AsciiStriCmp (\r
- IN CONST CHAR8 *FirstString,\r
- IN CONST CHAR8 *SecondString\r
+ IN CONST CHAR8 *FirstString,\r
+ IN CONST CHAR8 *SecondString\r
);\r
\r
-\r
/**\r
Compares two Null-terminated ASCII strings with maximum lengths, and returns\r
the difference between the first mismatched ASCII characters.\r
\r
If Length > 0 and FirstString is NULL, then ASSERT().\r
If Length > 0 and SecondString is NULL, then ASSERT().\r
- If PcdMaximumAsciiStringLength is not zero, and Length is greater than \r
+ If PcdMaximumAsciiStringLength is not zero, and Length is greater than\r
PcdMaximumAsciiStringLength, then ASSERT().\r
If PcdMaximumAsciiStringLength is not zero, and FirstString contains more than\r
PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r
@param FirstString The pointer to a Null-terminated ASCII string.\r
@param SecondString The pointer to a Null-terminated ASCII string.\r
@param Length The maximum number of ASCII characters for compare.\r
- \r
+\r
@retval ==0 FirstString is identical to SecondString.\r
@retval !=0 FirstString is not identical to SecondString.\r
\r
INTN\r
EFIAPI\r
AsciiStrnCmp (\r
- IN CONST CHAR8 *FirstString,\r
- IN CONST CHAR8 *SecondString,\r
- IN UINTN Length\r
- );\r
-\r
-\r
-#ifndef DISABLE_NEW_DEPRECATED_INTERFACES\r
-\r
-/**\r
- [ATTENTION] This function is deprecated for security reason.\r
-\r
- Concatenates one Null-terminated ASCII string to another Null-terminated\r
- ASCII string, and returns the concatenated ASCII string.\r
-\r
- This function concatenates two Null-terminated ASCII strings. The contents of\r
- Null-terminated ASCII string Source are concatenated to the end of Null-\r
- terminated ASCII string Destination. The Null-terminated concatenated ASCII\r
- String is returned.\r
-\r
- If Destination is NULL, then ASSERT().\r
- If Source is NULL, then ASSERT().\r
- If PcdMaximumAsciiStringLength is not zero and Destination contains more than\r
- PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
- then ASSERT().\r
- If PcdMaximumAsciiStringLength is not zero and Source contains more than\r
- PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
- then ASSERT().\r
- If PcdMaximumAsciiStringLength is not zero and concatenating Destination and\r
- Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r
- ASCII characters, then ASSERT().\r
-\r
- @param Destination The pointer to a Null-terminated ASCII string.\r
- @param Source The pointer to a Null-terminated ASCII string.\r
-\r
- @return Destination\r
-\r
-**/\r
-CHAR8 *\r
-EFIAPI\r
-AsciiStrCat (\r
- IN OUT CHAR8 *Destination,\r
- IN CONST CHAR8 *Source\r
- );\r
-\r
-\r
-/**\r
- [ATTENTION] This function is deprecated for security reason.\r
-\r
- Concatenates up to a specified length one Null-terminated ASCII string to \r
- the end of another Null-terminated ASCII string, and returns the \r
- concatenated ASCII string.\r
-\r
- This function concatenates two Null-terminated ASCII strings. The contents\r
- of Null-terminated ASCII string Source are concatenated to the end of Null-\r
- terminated ASCII string Destination, and Destination is returned. At most,\r
- Length ASCII characters are concatenated from Source to the end of\r
- Destination, and Destination is always Null-terminated. If Length is 0, then\r
- Destination is returned unmodified. If Source and Destination overlap, then\r
- the results are undefined.\r
-\r
- If Length > 0 and Destination is NULL, then ASSERT().\r
- If Length > 0 and Source is NULL, then ASSERT().\r
- If Source and Destination overlap, then ASSERT().\r
- If PcdMaximumAsciiStringLength is not zero, and Length is greater than\r
- PcdMaximumAsciiStringLength, then ASSERT().\r
- If PcdMaximumAsciiStringLength is not zero, and Destination contains more than\r
- PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r
- then ASSERT().\r
- If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r
- PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r
- then ASSERT().\r
- If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and\r
- Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r
- ASCII characters, not including the Null-terminator, then ASSERT().\r
-\r
- @param Destination The pointer to a Null-terminated ASCII string.\r
- @param Source The pointer to a Null-terminated ASCII string.\r
- @param Length The maximum number of ASCII characters to concatenate from\r
- Source.\r
-\r
- @return Destination\r
-\r
-**/\r
-CHAR8 *\r
-EFIAPI\r
-AsciiStrnCat (\r
- IN OUT CHAR8 *Destination,\r
- IN CONST CHAR8 *Source,\r
- IN UINTN Length\r
+ IN CONST CHAR8 *FirstString,\r
+ IN CONST CHAR8 *SecondString,\r
+ IN UINTN Length\r
);\r
-#endif\r
\r
/**\r
Returns the first occurrence of a Null-terminated ASCII sub-string\r
CHAR8 *\r
EFIAPI\r
AsciiStrStr (\r
- IN CONST CHAR8 *String,\r
- IN CONST CHAR8 *SearchString\r
+ IN CONST CHAR8 *String,\r
+ IN CONST CHAR8 *SearchString\r
);\r
\r
-\r
/**\r
Convert a Null-terminated ASCII decimal string to a value of type\r
UINTN.\r
UINTN\r
EFIAPI\r
AsciiStrDecimalToUintn (\r
- IN CONST CHAR8 *String\r
+ IN CONST CHAR8 *String\r
);\r
\r
-\r
/**\r
Convert a Null-terminated ASCII decimal string to a value of type\r
UINT64.\r
UINT64\r
EFIAPI\r
AsciiStrDecimalToUint64 (\r
- IN CONST CHAR8 *String\r
+ IN CONST CHAR8 *String\r
);\r
\r
-\r
/**\r
Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.\r
\r
UINTN\r
EFIAPI\r
AsciiStrHexToUintn (\r
- IN CONST CHAR8 *String\r
+ IN CONST CHAR8 *String\r
);\r
\r
-\r
/**\r
Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.\r
\r
UINT64\r
EFIAPI\r
AsciiStrHexToUint64 (\r
- IN CONST CHAR8 *String\r
+ IN CONST CHAR8 *String\r
);\r
\r
/**\r
"::" can be used to compress one or more groups of X when X contains only 0.\r
The "::" can only appear once in the String.\r
\r
- If String is NULL, then ASSERT().\r
-\r
- If Address is NULL, then ASSERT().\r
-\r
If EndPointer is not NULL and Address is translated from String, a pointer\r
to the character that stopped the scan is stored at the location pointed to\r
by EndPointer.\r
RETURN_STATUS\r
EFIAPI\r
AsciiStrToIpv6Address (\r
- IN CONST CHAR8 *String,\r
- OUT CHAR8 **EndPointer, OPTIONAL\r
- OUT IPv6_ADDRESS *Address,\r
- OUT UINT8 *PrefixLength OPTIONAL\r
+ IN CONST CHAR8 *String,\r
+ OUT CHAR8 **EndPointer OPTIONAL,\r
+ OUT IPv6_ADDRESS *Address,\r
+ OUT UINT8 *PrefixLength OPTIONAL\r
);\r
\r
/**\r
When /P is in the String, the function stops at the first character that is not\r
a valid decimal digit character after P is converted.\r
\r
- If String is NULL, then ASSERT().\r
-\r
- If Address is NULL, then ASSERT().\r
-\r
If EndPointer is not NULL and Address is translated from String, a pointer\r
to the character that stopped the scan is stored at the location pointed to\r
by EndPointer.\r
RETURN_STATUS\r
EFIAPI\r
AsciiStrToIpv4Address (\r
- IN CONST CHAR8 *String,\r
- OUT CHAR8 **EndPointer, OPTIONAL\r
- OUT IPv4_ADDRESS *Address,\r
- OUT UINT8 *PrefixLength OPTIONAL\r
+ IN CONST CHAR8 *String,\r
+ OUT CHAR8 **EndPointer OPTIONAL,\r
+ OUT IPv4_ADDRESS *Address,\r
+ OUT UINT8 *PrefixLength OPTIONAL\r
);\r
\r
/**\r
oo Data4[48:55]\r
pp Data4[56:63]\r
\r
- If String is NULL, then ASSERT().\r
- If Guid is NULL, then ASSERT().\r
-\r
@param String Pointer to a Null-terminated ASCII string.\r
@param Guid Pointer to the converted GUID.\r
\r
RETURN_STATUS\r
EFIAPI\r
AsciiStrToGuid (\r
- IN CONST CHAR8 *String,\r
- OUT GUID *Guid\r
+ IN CONST CHAR8 *String,\r
+ OUT GUID *Guid\r
);\r
\r
/**\r
decoding stops after Length of characters and outputs Buffer containing\r
(Length / 2) bytes.\r
\r
- If String is NULL, then ASSERT().\r
-\r
- If Buffer is NULL, then ASSERT().\r
-\r
- If Length is not multiple of 2, then ASSERT().\r
-\r
- If PcdMaximumAsciiStringLength is not zero and Length is greater than\r
- PcdMaximumAsciiStringLength, then ASSERT().\r
-\r
- If MaxBufferSize is less than (Length / 2), then ASSERT().\r
-\r
@param String Pointer to a Null-terminated ASCII string.\r
@param Length The number of ASCII characters to decode.\r
@param Buffer Pointer to the converted bytes array.\r
RETURN_STATUS\r
EFIAPI\r
AsciiStrHexToBytes (\r
- IN CONST CHAR8 *String,\r
- IN UINTN Length,\r
- OUT UINT8 *Buffer,\r
- IN UINTN MaxBufferSize\r
- );\r
-\r
-#ifndef DISABLE_NEW_DEPRECATED_INTERFACES\r
-\r
-/**\r
- [ATTENTION] This function is deprecated for security reason.\r
-\r
- Convert one Null-terminated ASCII string to a Null-terminated\r
- Unicode string and returns the Unicode string.\r
-\r
- This function converts the contents of the ASCII string Source to the Unicode\r
- string Destination, and returns Destination. The function terminates the\r
- Unicode string Destination by appending a Null-terminator character at the end.\r
- The caller is responsible to make sure Destination points to a buffer with size\r
- equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.\r
-\r
- If Destination is NULL, then ASSERT().\r
- If Destination is not aligned on a 16-bit boundary, then ASSERT().\r
- If Source is NULL, then ASSERT().\r
- If Source and Destination overlap, then ASSERT().\r
- If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r
- PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
- then ASSERT().\r
- If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
- PcdMaximumUnicodeStringLength ASCII characters not including the\r
- Null-terminator, then ASSERT().\r
-\r
- @param Source The pointer to a Null-terminated ASCII string.\r
- @param Destination The pointer to a Null-terminated Unicode string.\r
-\r
- @return Destination.\r
-\r
-**/\r
-CHAR16 *\r
-EFIAPI\r
-AsciiStrToUnicodeStr (\r
- IN CONST CHAR8 *Source,\r
- OUT CHAR16 *Destination\r
+ IN CONST CHAR8 *String,\r
+ IN UINTN Length,\r
+ OUT UINT8 *Buffer,\r
+ IN UINTN MaxBufferSize\r
);\r
\r
-#endif\r
-\r
/**\r
Convert one Null-terminated ASCII string to a Null-terminated\r
Unicode string.\r
equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.\r
\r
If Destination is not aligned on a 16-bit boundary, then ASSERT().\r
- If an error would be returned, then the function will also ASSERT().\r
\r
If an error is returned, then the Destination is unmodified.\r
\r
RETURN_STATUS\r
EFIAPI\r
AsciiStrToUnicodeStrS (\r
- IN CONST CHAR8 *Source,\r
- OUT CHAR16 *Destination,\r
- IN UINTN DestMax\r
+ IN CONST CHAR8 *Source,\r
+ OUT CHAR16 *Destination,\r
+ IN UINTN DestMax\r
);\r
\r
/**\r
((MIN(AsciiStrLen(Source), Length) + 1) * sizeof (CHAR8)) in bytes.\r
\r
If Destination is not aligned on a 16-bit boundary, then ASSERT().\r
- If an error would be returned, then the function will also ASSERT().\r
\r
If an error is returned, then Destination and DestinationLength are\r
unmodified.\r
RETURN_STATUS\r
EFIAPI\r
AsciiStrnToUnicodeStrS (\r
- IN CONST CHAR8 *Source,\r
- IN UINTN Length,\r
- OUT CHAR16 *Destination,\r
- IN UINTN DestMax,\r
- OUT UINTN *DestinationLength\r
+ IN CONST CHAR8 *Source,\r
+ IN UINTN Length,\r
+ OUT CHAR16 *Destination,\r
+ IN UINTN DestMax,\r
+ OUT UINTN *DestinationLength\r
+ );\r
+\r
+/**\r
+ Convert a Unicode character to upper case only if\r
+ it maps to a valid small-case ASCII character.\r
+\r
+ This internal function only deal with Unicode character\r
+ which maps to a valid small-case ASCII character, i.e.\r
+ L'a' to L'z'. For other Unicode character, the input character\r
+ is returned directly.\r
+\r
+ @param Char The character to convert.\r
+\r
+ @retval LowerCharacter If the Char is with range L'a' to L'z'.\r
+ @retval Unchanged Otherwise.\r
+\r
+**/\r
+CHAR16\r
+EFIAPI\r
+CharToUpper (\r
+ IN CHAR16 Char\r
+ );\r
+\r
+/**\r
+ Converts a lowercase Ascii character to upper one.\r
+\r
+ If Chr is lowercase Ascii character, then converts it to upper one.\r
+\r
+ If Value >= 0xA0, then ASSERT().\r
+ If (Value & 0x0F) >= 0x0A, then ASSERT().\r
+\r
+ @param Chr one Ascii character\r
+\r
+ @return The uppercase value of Ascii character\r
+\r
+**/\r
+CHAR8\r
+EFIAPI\r
+AsciiCharToUpper (\r
+ IN CHAR8 Chr\r
+ );\r
+\r
+/**\r
+ Convert binary data to a Base64 encoded ascii string based on RFC4648.\r
+\r
+ Produce a Null-terminated Ascii string in the output buffer specified by Destination and DestinationSize.\r
+ The Ascii string is produced by converting the data string specified by Source and SourceLength.\r
+\r
+ @param Source Input UINT8 data\r
+ @param SourceLength Number of UINT8 bytes of data\r
+ @param Destination Pointer to output string buffer\r
+ @param DestinationSize Size of ascii buffer. Set to 0 to get the size needed.\r
+ Caller is responsible for passing in buffer of DestinationSize\r
+\r
+ @retval RETURN_SUCCESS When ascii buffer is filled in.\r
+ @retval RETURN_INVALID_PARAMETER If Source is NULL or DestinationSize is NULL.\r
+ @retval RETURN_INVALID_PARAMETER If SourceLength or DestinationSize is bigger than (MAX_ADDRESS - (UINTN)Destination).\r
+ @retval RETURN_BUFFER_TOO_SMALL If SourceLength is 0 and DestinationSize is <1.\r
+ @retval RETURN_BUFFER_TOO_SMALL If Destination is NULL or DestinationSize is smaller than required buffersize.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+Base64Encode (\r
+ IN CONST UINT8 *Source,\r
+ IN UINTN SourceLength,\r
+ OUT CHAR8 *Destination OPTIONAL,\r
+ IN OUT UINTN *DestinationSize\r
+ );\r
+\r
+/**\r
+ Decode Base64 ASCII encoded data to 8-bit binary representation, based on\r
+ RFC4648.\r
+\r
+ Decoding occurs according to "Table 1: The Base 64 Alphabet" in RFC4648.\r
+\r
+ Whitespace is ignored at all positions:\r
+ - 0x09 ('\t') horizontal tab\r
+ - 0x0A ('\n') new line\r
+ - 0x0B ('\v') vertical tab\r
+ - 0x0C ('\f') form feed\r
+ - 0x0D ('\r') carriage return\r
+ - 0x20 (' ') space\r
+\r
+ The minimum amount of required padding (with ASCII 0x3D, '=') is tolerated\r
+ and enforced at the end of the Base64 ASCII encoded data, and only there.\r
+\r
+ Other characters outside of the encoding alphabet cause the function to\r
+ reject the Base64 ASCII encoded data.\r
+\r
+ @param[in] Source Array of CHAR8 elements containing the Base64\r
+ ASCII encoding. May be NULL if SourceSize is\r
+ zero.\r
+\r
+ @param[in] SourceSize Number of CHAR8 elements in Source.\r
+\r
+ @param[out] Destination Array of UINT8 elements receiving the decoded\r
+ 8-bit binary representation. Allocated by the\r
+ caller. May be NULL if DestinationSize is\r
+ zero on input. If NULL, decoding is\r
+ performed, but the 8-bit binary\r
+ representation is not stored. If non-NULL and\r
+ the function returns an error, the contents\r
+ of Destination are indeterminate.\r
+\r
+ @param[in,out] DestinationSize On input, the number of UINT8 elements that\r
+ the caller allocated for Destination. On\r
+ output, if the function returns\r
+ RETURN_SUCCESS or RETURN_BUFFER_TOO_SMALL,\r
+ the number of UINT8 elements that are\r
+ required for decoding the Base64 ASCII\r
+ representation. If the function returns a\r
+ value different from both RETURN_SUCCESS and\r
+ RETURN_BUFFER_TOO_SMALL, then DestinationSize\r
+ is indeterminate on output.\r
+\r
+ @retval RETURN_SUCCESS SourceSize CHAR8 elements at Source have\r
+ been decoded to on-output DestinationSize\r
+ UINT8 elements at Destination. Note that\r
+ RETURN_SUCCESS covers the case when\r
+ DestinationSize is zero on input, and\r
+ Source decodes to zero bytes (due to\r
+ containing at most ignored whitespace).\r
+\r
+ @retval RETURN_BUFFER_TOO_SMALL The input value of DestinationSize is not\r
+ large enough for decoding SourceSize CHAR8\r
+ elements at Source. The required number of\r
+ UINT8 elements has been stored to\r
+ DestinationSize.\r
+\r
+ @retval RETURN_INVALID_PARAMETER DestinationSize is NULL.\r
+\r
+ @retval RETURN_INVALID_PARAMETER Source is NULL, but SourceSize is not zero.\r
+\r
+ @retval RETURN_INVALID_PARAMETER Destination is NULL, but DestinationSize is\r
+ not zero on input.\r
+\r
+ @retval RETURN_INVALID_PARAMETER Source is non-NULL, and (Source +\r
+ SourceSize) would wrap around MAX_ADDRESS.\r
+\r
+ @retval RETURN_INVALID_PARAMETER Destination is non-NULL, and (Destination +\r
+ DestinationSize) would wrap around\r
+ MAX_ADDRESS, as specified on input.\r
+\r
+ @retval RETURN_INVALID_PARAMETER None of Source and Destination are NULL,\r
+ and CHAR8[SourceSize] at Source overlaps\r
+ UINT8[DestinationSize] at Destination, as\r
+ specified on input.\r
+\r
+ @retval RETURN_INVALID_PARAMETER Invalid CHAR8 element encountered in\r
+ Source.\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+Base64Decode (\r
+ IN CONST CHAR8 *Source OPTIONAL,\r
+ IN UINTN SourceSize,\r
+ OUT UINT8 *Destination OPTIONAL,\r
+ IN OUT UINTN *DestinationSize\r
);\r
\r
/**\r
UINT8\r
EFIAPI\r
DecimalToBcd8 (\r
- IN UINT8 Value\r
+ IN UINT8 Value\r
);\r
\r
-\r
/**\r
Converts an 8-bit BCD value to an 8-bit value.\r
\r
UINT8\r
EFIAPI\r
BcdToDecimal8 (\r
- IN UINT8 Value\r
+ IN UINT8 Value\r
);\r
\r
//\r
**/\r
BOOLEAN\r
EFIAPI\r
-PathRemoveLastItem(\r
- IN OUT CHAR16 *Path\r
+PathRemoveLastItem (\r
+ IN OUT CHAR16 *Path\r
);\r
\r
/**\r
\r
@return Returns Path, otherwise returns NULL to indicate that an error has occurred.\r
**/\r
-CHAR16*\r
+CHAR16 *\r
EFIAPI\r
-PathCleanUpDirectories(\r
- IN CHAR16 *Path\r
+PathCleanUpDirectories (\r
+ IN CHAR16 *Path\r
);\r
\r
//\r
**/\r
#define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&(ListHead), &(ListHead)}\r
\r
+/**\r
+ Iterates over each node in a doubly linked list using each node's forward link.\r
+\r
+ @param Entry A pointer to a list node used as a loop cursor during iteration\r
+ @param ListHead The head node of the doubly linked list\r
+\r
+**/\r
+#define BASE_LIST_FOR_EACH(Entry, ListHead) \\r
+ for(Entry = (ListHead)->ForwardLink; Entry != (ListHead); Entry = Entry->ForwardLink)\r
+\r
+/**\r
+ Iterates over each node in a doubly linked list using each node's forward link\r
+ with safety against node removal.\r
+\r
+ This macro uses NextEntry to temporarily store the next list node so the node\r
+ pointed to by Entry may be deleted in the current loop iteration step and\r
+ iteration can continue from the node pointed to by NextEntry.\r
+\r
+ @param Entry A pointer to a list node used as a loop cursor during iteration\r
+ @param NextEntry A pointer to a list node used to temporarily store the next node\r
+ @param ListHead The head node of the doubly linked list\r
+\r
+**/\r
+#define BASE_LIST_FOR_EACH_SAFE(Entry, NextEntry, ListHead) \\r
+ for(Entry = (ListHead)->ForwardLink, NextEntry = Entry->ForwardLink;\\r
+ Entry != (ListHead); Entry = NextEntry, NextEntry = Entry->ForwardLink)\r
+\r
+/**\r
+ Checks whether FirstEntry and SecondEntry are part of the same doubly-linked\r
+ list.\r
+\r
+ If FirstEntry is NULL, then ASSERT().\r
+ If FirstEntry->ForwardLink is NULL, then ASSERT().\r
+ If FirstEntry->BackLink is NULL, then ASSERT().\r
+ If SecondEntry is NULL, then ASSERT();\r
+ If PcdMaximumLinkedListLength is not zero, and List contains more than\r
+ PcdMaximumLinkedListLength nodes, then ASSERT().\r
+\r
+ @param FirstEntry A pointer to a node in a linked list.\r
+ @param SecondEntry A pointer to the node to locate.\r
+\r
+ @retval TRUE SecondEntry is in the same doubly-linked list as FirstEntry.\r
+ @retval FALSE SecondEntry isn't in the same doubly-linked list as FirstEntry,\r
+ or FirstEntry is invalid.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+IsNodeInList (\r
+ IN CONST LIST_ENTRY *FirstEntry,\r
+ IN CONST LIST_ENTRY *SecondEntry\r
+ );\r
\r
/**\r
Initializes the head node of a doubly linked list, and returns the pointer to\r
LIST_ENTRY *\r
EFIAPI\r
InitializeListHead (\r
- IN OUT LIST_ENTRY *ListHead\r
+ IN OUT LIST_ENTRY *ListHead\r
);\r
\r
-\r
/**\r
Adds a node to the beginning of a doubly linked list, and returns the pointer\r
to the head node of the doubly linked list.\r
LIST_ENTRY *\r
EFIAPI\r
InsertHeadList (\r
- IN OUT LIST_ENTRY *ListHead,\r
- IN OUT LIST_ENTRY *Entry\r
+ IN OUT LIST_ENTRY *ListHead,\r
+ IN OUT LIST_ENTRY *Entry\r
);\r
\r
-\r
/**\r
Adds a node to the end of a doubly linked list, and returns the pointer to\r
the head node of the doubly linked list.\r
\r
If ListHead is NULL, then ASSERT().\r
If Entry is NULL, then ASSERT().\r
- If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r
+ If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r
InitializeListHead(), then ASSERT().\r
If PcdMaximumLinkedListLength is not zero, and prior to insertion the number\r
of nodes in ListHead, including the ListHead node, is greater than or\r
LIST_ENTRY *\r
EFIAPI\r
InsertTailList (\r
- IN OUT LIST_ENTRY *ListHead,\r
- IN OUT LIST_ENTRY *Entry\r
+ IN OUT LIST_ENTRY *ListHead,\r
+ IN OUT LIST_ENTRY *Entry\r
);\r
\r
-\r
/**\r
Retrieves the first node of a doubly linked list.\r
\r
- Returns the first node of a doubly linked list. List must have been \r
+ Returns the first node of a doubly linked list. List must have been\r
initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r
If List is empty, then List is returned.\r
\r
If List is NULL, then ASSERT().\r
- If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r
+ If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r
InitializeListHead(), then ASSERT().\r
If PcdMaximumLinkedListLength is not zero, and the number of nodes\r
in List, including the List node, is greater than or equal to\r
LIST_ENTRY *\r
EFIAPI\r
GetFirstNode (\r
- IN CONST LIST_ENTRY *List\r
+ IN CONST LIST_ENTRY *List\r
);\r
\r
-\r
/**\r
Retrieves the next node of a doubly linked list.\r
\r
- Returns the node of a doubly linked list that follows Node. \r
+ Returns the node of a doubly linked list that follows Node.\r
List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()\r
or InitializeListHead(). If List is empty, then List is returned.\r
\r
If List is NULL, then ASSERT().\r
If Node is NULL, then ASSERT().\r
- If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r
+ If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r
InitializeListHead(), then ASSERT().\r
If PcdMaximumLinkedListLength is not zero, and List contains more than\r
PcdMaximumLinkedListLength nodes, then ASSERT().\r
LIST_ENTRY *\r
EFIAPI\r
GetNextNode (\r
- IN CONST LIST_ENTRY *List,\r
- IN CONST LIST_ENTRY *Node\r
+ IN CONST LIST_ENTRY *List,\r
+ IN CONST LIST_ENTRY *Node\r
);\r
\r
- \r
/**\r
Retrieves the previous node of a doubly linked list.\r
- \r
- Returns the node of a doubly linked list that precedes Node. \r
+\r
+ Returns the node of a doubly linked list that precedes Node.\r
List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()\r
or InitializeListHead(). If List is empty, then List is returned.\r
- \r
+\r
If List is NULL, then ASSERT().\r
If Node is NULL, then ASSERT().\r
- If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r
+ If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r
InitializeListHead(), then ASSERT().\r
If PcdMaximumLinkedListLength is not zero, and List contains more than\r
PcdMaximumLinkedListLength nodes, then ASSERT().\r
If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().\r
- \r
+\r
@param List A pointer to the head node of a doubly linked list.\r
@param Node A pointer to a node in the doubly linked list.\r
- \r
+\r
@return The pointer to the previous node if one exists. Otherwise List is returned.\r
- \r
+\r
**/\r
LIST_ENTRY *\r
EFIAPI\r
GetPreviousNode (\r
- IN CONST LIST_ENTRY *List,\r
- IN CONST LIST_ENTRY *Node\r
+ IN CONST LIST_ENTRY *List,\r
+ IN CONST LIST_ENTRY *Node\r
);\r
\r
- \r
/**\r
Checks to see if a doubly linked list is empty or not.\r
\r
zero nodes, this function returns TRUE. Otherwise, it returns FALSE.\r
\r
If ListHead is NULL, then ASSERT().\r
- If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r
+ If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r
InitializeListHead(), then ASSERT().\r
If PcdMaximumLinkedListLength is not zero, and the number of nodes\r
in List, including the List node, is greater than or equal to\r
BOOLEAN\r
EFIAPI\r
IsListEmpty (\r
- IN CONST LIST_ENTRY *ListHead\r
+ IN CONST LIST_ENTRY *ListHead\r
);\r
\r
-\r
/**\r
Determines if a node in a doubly linked list is the head node of a the same\r
doubly linked list. This function is typically used to terminate a loop that\r
\r
If List is NULL, then ASSERT().\r
If Node is NULL, then ASSERT().\r
- If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(), \r
+ If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(),\r
then ASSERT().\r
If PcdMaximumLinkedListLength is not zero, and the number of nodes\r
in List, including the List node, is greater than or equal to\r
PcdMaximumLinkedListLength, then ASSERT().\r
- If PcdVerifyNodeInList is TRUE and Node is not a node in List the and Node is not equal \r
+ If PcdVerifyNodeInList is TRUE and Node is not a node in List the and Node is not equal\r
to List, then ASSERT().\r
\r
@param List A pointer to the head node of a doubly linked list.\r
BOOLEAN\r
EFIAPI\r
IsNull (\r
- IN CONST LIST_ENTRY *List,\r
- IN CONST LIST_ENTRY *Node\r
+ IN CONST LIST_ENTRY *List,\r
+ IN CONST LIST_ENTRY *Node\r
);\r
\r
-\r
/**\r
Determines if a node the last node in a doubly linked list.\r
\r
BOOLEAN\r
EFIAPI\r
IsNodeAtEnd (\r
- IN CONST LIST_ENTRY *List,\r
- IN CONST LIST_ENTRY *Node\r
+ IN CONST LIST_ENTRY *List,\r
+ IN CONST LIST_ENTRY *Node\r
);\r
\r
-\r
/**\r
Swaps the location of two nodes in a doubly linked list, and returns the\r
first node after the swap.\r
Otherwise, the location of the FirstEntry node is swapped with the location\r
of the SecondEntry node in a doubly linked list. SecondEntry must be in the\r
same double linked list as FirstEntry and that double linked list must have\r
- been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(). \r
+ been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r
SecondEntry is returned after the nodes are swapped.\r
\r
If FirstEntry is NULL, then ASSERT().\r
If SecondEntry is NULL, then ASSERT().\r
- If PcdVerifyNodeInList is TRUE and SecondEntry and FirstEntry are not in the \r
+ If PcdVerifyNodeInList is TRUE and SecondEntry and FirstEntry are not in the\r
same linked list, then ASSERT().\r
If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r
linked list containing the FirstEntry and SecondEntry nodes, including\r
\r
@param FirstEntry A pointer to a node in a linked list.\r
@param SecondEntry A pointer to another node in the same linked list.\r
- \r
+\r
@return SecondEntry.\r
\r
**/\r
LIST_ENTRY *\r
EFIAPI\r
SwapListEntries (\r
- IN OUT LIST_ENTRY *FirstEntry,\r
- IN OUT LIST_ENTRY *SecondEntry\r
+ IN OUT LIST_ENTRY *FirstEntry,\r
+ IN OUT LIST_ENTRY *SecondEntry\r
);\r
\r
-\r
/**\r
Removes a node from a doubly linked list, and returns the node that follows\r
the removed node.\r
LIST_ENTRY *\r
EFIAPI\r
RemoveEntryList (\r
- IN CONST LIST_ENTRY *Entry\r
+ IN CONST LIST_ENTRY *Entry\r
);\r
\r
//\r
// Math Services\r
//\r
\r
+/**\r
+ Prototype for comparison function for any two element types.\r
+\r
+ @param[in] Buffer1 The pointer to first buffer.\r
+ @param[in] Buffer2 The pointer to second buffer.\r
+\r
+ @retval 0 Buffer1 equal to Buffer2.\r
+ @return <0 Buffer1 is less than Buffer2.\r
+ @return >0 Buffer1 is greater than Buffer2.\r
+**/\r
+typedef\r
+INTN\r
+(EFIAPI *BASE_SORT_COMPARE)(\r
+ IN CONST VOID *Buffer1,\r
+ IN CONST VOID *Buffer2\r
+ );\r
+\r
+/**\r
+ This function is identical to perform QuickSort,\r
+ except that is uses the pre-allocated buffer so the in place sorting does not need to\r
+ allocate and free buffers constantly.\r
+\r
+ Each element must be equal sized.\r
+\r
+ if BufferToSort is NULL, then ASSERT.\r
+ if CompareFunction is NULL, then ASSERT.\r
+ if BufferOneElement is NULL, then ASSERT.\r
+ if ElementSize is < 1, then ASSERT.\r
+\r
+ if Count is < 2 then perform no action.\r
+\r
+ @param[in, out] BufferToSort on call a Buffer of (possibly sorted) elements\r
+ on return a buffer of sorted elements\r
+ @param[in] Count the number of elements in the buffer to sort\r
+ @param[in] ElementSize Size of an element in bytes\r
+ @param[in] CompareFunction The function to call to perform the comparison\r
+ of any 2 elements\r
+ @param[out] BufferOneElement Caller provided buffer whose size equals to ElementSize.\r
+ It's used by QuickSort() for swapping in sorting.\r
+**/\r
+VOID\r
+EFIAPI\r
+QuickSort (\r
+ IN OUT VOID *BufferToSort,\r
+ IN CONST UINTN Count,\r
+ IN CONST UINTN ElementSize,\r
+ IN BASE_SORT_COMPARE CompareFunction,\r
+ OUT VOID *BufferOneElement\r
+ );\r
+\r
/**\r
Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled\r
with zeros. The shifted value is returned.\r
UINT64\r
EFIAPI\r
LShiftU64 (\r
- IN UINT64 Operand,\r
- IN UINTN Count\r
+ IN UINT64 Operand,\r
+ IN UINTN Count\r
);\r
\r
-\r
/**\r
Shifts a 64-bit integer right between 0 and 63 bits. This high bits are\r
filled with zeros. The shifted value is returned.\r
UINT64\r
EFIAPI\r
RShiftU64 (\r
- IN UINT64 Operand,\r
- IN UINTN Count\r
+ IN UINT64 Operand,\r
+ IN UINTN Count\r
);\r
\r
-\r
/**\r
Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled\r
with original integer's bit 63. The shifted value is returned.\r
UINT64\r
EFIAPI\r
ARShiftU64 (\r
- IN UINT64 Operand,\r
- IN UINTN Count\r
+ IN UINT64 Operand,\r
+ IN UINTN Count\r
);\r
\r
-\r
/**\r
Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits\r
with the high bits that were rotated.\r
UINT32\r
EFIAPI\r
LRotU32 (\r
- IN UINT32 Operand,\r
- IN UINTN Count\r
+ IN UINT32 Operand,\r
+ IN UINTN Count\r
);\r
\r
-\r
/**\r
Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits\r
with the low bits that were rotated.\r
UINT32\r
EFIAPI\r
RRotU32 (\r
- IN UINT32 Operand,\r
- IN UINTN Count\r
+ IN UINT32 Operand,\r
+ IN UINTN Count\r
);\r
\r
-\r
/**\r
Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits\r
with the high bits that were rotated.\r
UINT64\r
EFIAPI\r
LRotU64 (\r
- IN UINT64 Operand,\r
- IN UINTN Count\r
+ IN UINT64 Operand,\r
+ IN UINTN Count\r
);\r
\r
-\r
/**\r
Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits\r
with the high low bits that were rotated.\r
UINT64\r
EFIAPI\r
RRotU64 (\r
- IN UINT64 Operand,\r
- IN UINTN Count\r
+ IN UINT64 Operand,\r
+ IN UINTN Count\r
);\r
\r
-\r
/**\r
Returns the bit position of the lowest bit set in a 32-bit value.\r
\r
INTN\r
EFIAPI\r
LowBitSet32 (\r
- IN UINT32 Operand\r
+ IN UINT32 Operand\r
);\r
\r
-\r
/**\r
Returns the bit position of the lowest bit set in a 64-bit value.\r
\r
INTN\r
EFIAPI\r
LowBitSet64 (\r
- IN UINT64 Operand\r
+ IN UINT64 Operand\r
);\r
\r
-\r
/**\r
Returns the bit position of the highest bit set in a 32-bit value. Equivalent\r
to log2(x).\r
INTN\r
EFIAPI\r
HighBitSet32 (\r
- IN UINT32 Operand\r
+ IN UINT32 Operand\r
);\r
\r
-\r
/**\r
Returns the bit position of the highest bit set in a 64-bit value. Equivalent\r
to log2(x).\r
INTN\r
EFIAPI\r
HighBitSet64 (\r
- IN UINT64 Operand\r
+ IN UINT64 Operand\r
);\r
\r
-\r
/**\r
Returns the value of the highest bit set in a 32-bit value. Equivalent to\r
1 << log2(x).\r
UINT32\r
EFIAPI\r
GetPowerOfTwo32 (\r
- IN UINT32 Operand\r
+ IN UINT32 Operand\r
);\r
\r
-\r
/**\r
Returns the value of the highest bit set in a 64-bit value. Equivalent to\r
1 << log2(x).\r
UINT64\r
EFIAPI\r
GetPowerOfTwo64 (\r
- IN UINT64 Operand\r
+ IN UINT64 Operand\r
);\r
\r
-\r
/**\r
Switches the endianness of a 16-bit integer.\r
\r
UINT16\r
EFIAPI\r
SwapBytes16 (\r
- IN UINT16 Value\r
+ IN UINT16 Value\r
);\r
\r
-\r
/**\r
Switches the endianness of a 32-bit integer.\r
\r
UINT32\r
EFIAPI\r
SwapBytes32 (\r
- IN UINT32 Value\r
+ IN UINT32 Value\r
);\r
\r
-\r
/**\r
Switches the endianness of a 64-bit integer.\r
\r
UINT64\r
EFIAPI\r
SwapBytes64 (\r
- IN UINT64 Value\r
+ IN UINT64 Value\r
);\r
\r
-\r
/**\r
Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and\r
generates a 64-bit unsigned result.\r
UINT64\r
EFIAPI\r
MultU64x32 (\r
- IN UINT64 Multiplicand,\r
- IN UINT32 Multiplier\r
+ IN UINT64 Multiplicand,\r
+ IN UINT32 Multiplier\r
);\r
\r
-\r
/**\r
Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and\r
generates a 64-bit unsigned result.\r
UINT64\r
EFIAPI\r
MultU64x64 (\r
- IN UINT64 Multiplicand,\r
- IN UINT64 Multiplier\r
+ IN UINT64 Multiplicand,\r
+ IN UINT64 Multiplier\r
);\r
\r
-\r
/**\r
Multiples a 64-bit signed integer by a 64-bit signed integer and generates a\r
64-bit signed result.\r
INT64\r
EFIAPI\r
MultS64x64 (\r
- IN INT64 Multiplicand,\r
- IN INT64 Multiplier\r
+ IN INT64 Multiplicand,\r
+ IN INT64 Multiplier\r
);\r
\r
-\r
/**\r
Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r
a 64-bit unsigned result.\r
UINT64\r
EFIAPI\r
DivU64x32 (\r
- IN UINT64 Dividend,\r
- IN UINT32 Divisor\r
+ IN UINT64 Dividend,\r
+ IN UINT32 Divisor\r
);\r
\r
-\r
/**\r
Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r
a 32-bit unsigned remainder.\r
UINT32\r
EFIAPI\r
ModU64x32 (\r
- IN UINT64 Dividend,\r
- IN UINT32 Divisor\r
+ IN UINT64 Dividend,\r
+ IN UINT32 Divisor\r
);\r
\r
-\r
/**\r
Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r
a 64-bit unsigned result and an optional 32-bit unsigned remainder.\r
UINT64\r
EFIAPI\r
DivU64x32Remainder (\r
- IN UINT64 Dividend,\r
- IN UINT32 Divisor,\r
- OUT UINT32 *Remainder OPTIONAL\r
+ IN UINT64 Dividend,\r
+ IN UINT32 Divisor,\r
+ OUT UINT32 *Remainder OPTIONAL\r
);\r
\r
-\r
/**\r
Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates\r
a 64-bit unsigned result and an optional 64-bit unsigned remainder.\r
UINT64\r
EFIAPI\r
DivU64x64Remainder (\r
- IN UINT64 Dividend,\r
- IN UINT64 Divisor,\r
- OUT UINT64 *Remainder OPTIONAL\r
+ IN UINT64 Dividend,\r
+ IN UINT64 Divisor,\r
+ OUT UINT64 *Remainder OPTIONAL\r
);\r
\r
-\r
/**\r
Divides a 64-bit signed integer by a 64-bit signed integer and generates a\r
64-bit signed result and a optional 64-bit signed remainder.\r
function returns the 64-bit signed quotient.\r
\r
It is the caller's responsibility to not call this function with a Divisor of 0.\r
- If Divisor is 0, then the quotient and remainder should be assumed to be \r
+ If Divisor is 0, then the quotient and remainder should be assumed to be\r
the largest negative integer.\r
\r
If Divisor is 0, then ASSERT().\r
INT64\r
EFIAPI\r
DivS64x64Remainder (\r
- IN INT64 Dividend,\r
- IN INT64 Divisor,\r
- OUT INT64 *Remainder OPTIONAL\r
+ IN INT64 Dividend,\r
+ IN INT64 Divisor,\r
+ OUT INT64 *Remainder OPTIONAL\r
);\r
\r
-\r
/**\r
Reads a 16-bit value from memory that may be unaligned.\r
\r
UINT16\r
EFIAPI\r
ReadUnaligned16 (\r
- IN CONST UINT16 *Buffer\r
+ IN CONST UINT16 *Buffer\r
);\r
\r
-\r
/**\r
Writes a 16-bit value to memory that may be unaligned.\r
\r
UINT16\r
EFIAPI\r
WriteUnaligned16 (\r
- OUT UINT16 *Buffer,\r
- IN UINT16 Value\r
+ OUT UINT16 *Buffer,\r
+ IN UINT16 Value\r
);\r
\r
-\r
/**\r
Reads a 24-bit value from memory that may be unaligned.\r
\r
UINT32\r
EFIAPI\r
ReadUnaligned24 (\r
- IN CONST UINT32 *Buffer\r
+ IN CONST UINT32 *Buffer\r
);\r
\r
-\r
/**\r
Writes a 24-bit value to memory that may be unaligned.\r
\r
UINT32\r
EFIAPI\r
WriteUnaligned24 (\r
- OUT UINT32 *Buffer,\r
- IN UINT32 Value\r
+ OUT UINT32 *Buffer,\r
+ IN UINT32 Value\r
);\r
\r
-\r
/**\r
Reads a 32-bit value from memory that may be unaligned.\r
\r
UINT32\r
EFIAPI\r
ReadUnaligned32 (\r
- IN CONST UINT32 *Buffer\r
+ IN CONST UINT32 *Buffer\r
);\r
\r
-\r
/**\r
Writes a 32-bit value to memory that may be unaligned.\r
\r
UINT32\r
EFIAPI\r
WriteUnaligned32 (\r
- OUT UINT32 *Buffer,\r
- IN UINT32 Value\r
+ OUT UINT32 *Buffer,\r
+ IN UINT32 Value\r
);\r
\r
-\r
/**\r
Reads a 64-bit value from memory that may be unaligned.\r
\r
UINT64\r
EFIAPI\r
ReadUnaligned64 (\r
- IN CONST UINT64 *Buffer\r
+ IN CONST UINT64 *Buffer\r
);\r
\r
-\r
/**\r
Writes a 64-bit value to memory that may be unaligned.\r
\r
UINT64\r
EFIAPI\r
WriteUnaligned64 (\r
- OUT UINT64 *Buffer,\r
- IN UINT64 Value\r
+ OUT UINT64 *Buffer,\r
+ IN UINT64 Value\r
);\r
\r
-\r
//\r
// Bit Field Functions\r
//\r
UINT8\r
EFIAPI\r
BitFieldRead8 (\r
- IN UINT8 Operand,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit\r
+ IN UINT8 Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
);\r
\r
-\r
/**\r
Writes a bit field to an 8-bit value, and returns the result.\r
\r
UINT8\r
EFIAPI\r
BitFieldWrite8 (\r
- IN UINT8 Operand,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT8 Value\r
+ IN UINT8 Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 Value\r
);\r
\r
-\r
/**\r
Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the\r
result.\r
UINT8\r
EFIAPI\r
BitFieldOr8 (\r
- IN UINT8 Operand,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT8 OrData\r
+ IN UINT8 Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 OrData\r
);\r
\r
-\r
/**\r
Reads a bit field from an 8-bit value, performs a bitwise AND, and returns\r
the result.\r
UINT8\r
EFIAPI\r
BitFieldAnd8 (\r
- IN UINT8 Operand,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT8 AndData\r
+ IN UINT8 Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 AndData\r
);\r
\r
-\r
/**\r
Reads a bit field from an 8-bit value, performs a bitwise AND followed by a\r
bitwise OR, and returns the result.\r
\r
Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
- in Operand and the value specified by AndData, followed by a bitwise \r
+ in Operand and the value specified by AndData, followed by a bitwise\r
OR with value specified by OrData. All other bits in Operand are\r
preserved. The new 8-bit value is returned.\r
\r
UINT8\r
EFIAPI\r
BitFieldAndThenOr8 (\r
- IN UINT8 Operand,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT8 AndData,\r
- IN UINT8 OrData\r
+ IN UINT8 Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 AndData,\r
+ IN UINT8 OrData\r
);\r
\r
-\r
/**\r
Returns a bit field from a 16-bit value.\r
\r
UINT16\r
EFIAPI\r
BitFieldRead16 (\r
- IN UINT16 Operand,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit\r
+ IN UINT16 Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
);\r
\r
-\r
/**\r
Writes a bit field to a 16-bit value, and returns the result.\r
\r
UINT16\r
EFIAPI\r
BitFieldWrite16 (\r
- IN UINT16 Operand,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT16 Value\r
+ IN UINT16 Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 Value\r
);\r
\r
-\r
/**\r
Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the\r
result.\r
UINT16\r
EFIAPI\r
BitFieldOr16 (\r
- IN UINT16 Operand,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT16 OrData\r
+ IN UINT16 Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 OrData\r
);\r
\r
-\r
/**\r
Reads a bit field from a 16-bit value, performs a bitwise AND, and returns\r
the result.\r
UINT16\r
EFIAPI\r
BitFieldAnd16 (\r
- IN UINT16 Operand,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT16 AndData\r
+ IN UINT16 Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 AndData\r
);\r
\r
-\r
/**\r
Reads a bit field from a 16-bit value, performs a bitwise AND followed by a\r
bitwise OR, and returns the result.\r
\r
Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
- in Operand and the value specified by AndData, followed by a bitwise \r
+ in Operand and the value specified by AndData, followed by a bitwise\r
OR with value specified by OrData. All other bits in Operand are\r
preserved. The new 16-bit value is returned.\r
\r
UINT16\r
EFIAPI\r
BitFieldAndThenOr16 (\r
- IN UINT16 Operand,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT16 AndData,\r
- IN UINT16 OrData\r
+ IN UINT16 Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 AndData,\r
+ IN UINT16 OrData\r
);\r
\r
-\r
/**\r
Returns a bit field from a 32-bit value.\r
\r
UINT32\r
EFIAPI\r
BitFieldRead32 (\r
- IN UINT32 Operand,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit\r
+ IN UINT32 Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
);\r
\r
-\r
/**\r
Writes a bit field to a 32-bit value, and returns the result.\r
\r
UINT32\r
EFIAPI\r
BitFieldWrite32 (\r
- IN UINT32 Operand,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT32 Value\r
+ IN UINT32 Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 Value\r
);\r
\r
-\r
/**\r
Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the\r
result.\r
UINT32\r
EFIAPI\r
BitFieldOr32 (\r
- IN UINT32 Operand,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT32 OrData\r
+ IN UINT32 Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 OrData\r
);\r
\r
-\r
/**\r
Reads a bit field from a 32-bit value, performs a bitwise AND, and returns\r
the result.\r
UINT32\r
EFIAPI\r
BitFieldAnd32 (\r
- IN UINT32 Operand,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT32 AndData\r
+ IN UINT32 Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData\r
);\r
\r
-\r
/**\r
Reads a bit field from a 32-bit value, performs a bitwise AND followed by a\r
bitwise OR, and returns the result.\r
\r
Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
- in Operand and the value specified by AndData, followed by a bitwise \r
+ in Operand and the value specified by AndData, followed by a bitwise\r
OR with value specified by OrData. All other bits in Operand are\r
preserved. The new 32-bit value is returned.\r
\r
UINT32\r
EFIAPI\r
BitFieldAndThenOr32 (\r
- IN UINT32 Operand,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT32 AndData,\r
- IN UINT32 OrData\r
+ IN UINT32 Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
);\r
\r
-\r
/**\r
Returns a bit field from a 64-bit value.\r
\r
UINT64\r
EFIAPI\r
BitFieldRead64 (\r
- IN UINT64 Operand,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit\r
+ IN UINT64 Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
);\r
\r
-\r
/**\r
Writes a bit field to a 64-bit value, and returns the result.\r
\r
UINT64\r
EFIAPI\r
BitFieldWrite64 (\r
- IN UINT64 Operand,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT64 Value\r
+ IN UINT64 Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT64 Value\r
);\r
\r
-\r
/**\r
Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the\r
result.\r
UINT64\r
EFIAPI\r
BitFieldOr64 (\r
- IN UINT64 Operand,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT64 OrData\r
+ IN UINT64 Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT64 OrData\r
);\r
\r
-\r
/**\r
Reads a bit field from a 64-bit value, performs a bitwise AND, and returns\r
the result.\r
UINT64\r
EFIAPI\r
BitFieldAnd64 (\r
- IN UINT64 Operand,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT64 AndData\r
+ IN UINT64 Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT64 AndData\r
);\r
\r
-\r
/**\r
Reads a bit field from a 64-bit value, performs a bitwise AND followed by a\r
bitwise OR, and returns the result.\r
\r
Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
- in Operand and the value specified by AndData, followed by a bitwise \r
+ in Operand and the value specified by AndData, followed by a bitwise\r
OR with value specified by OrData. All other bits in Operand are\r
preserved. The new 64-bit value is returned.\r
\r
UINT64\r
EFIAPI\r
BitFieldAndThenOr64 (\r
- IN UINT64 Operand,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT64 AndData,\r
- IN UINT64 OrData\r
+ IN UINT64 Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT64 AndData,\r
+ IN UINT64 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field from a 32-bit value, counts and returns\r
+ the number of set bits.\r
+\r
+ Counts the number of set bits in the bit field specified by\r
+ StartBit and EndBit in Operand. The count is returned.\r
+\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Operand Operand on which to perform the bitfield operation.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+\r
+ @return The number of bits set between StartBit and EndBit.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+BitFieldCountOnes32 (\r
+ IN UINT32 Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ );\r
+\r
+/**\r
+ Reads a bit field from a 64-bit value, counts and returns\r
+ the number of set bits.\r
+\r
+ Counts the number of set bits in the bit field specified by\r
+ StartBit and EndBit in Operand. The count is returned.\r
+\r
+ If StartBit is greater than 63, then ASSERT().\r
+ If EndBit is greater than 63, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Operand Operand on which to perform the bitfield operation.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..63.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..63.\r
+\r
+ @return The number of bits set between StartBit and EndBit.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+BitFieldCountOnes64 (\r
+ IN UINT64 Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
);\r
\r
//\r
UINT8\r
EFIAPI\r
CalculateSum8 (\r
- IN CONST UINT8 *Buffer,\r
- IN UINTN Length\r
+ IN CONST UINT8 *Buffer,\r
+ IN UINTN Length\r
);\r
\r
-\r
/**\r
Returns the two's complement checksum of all elements in a buffer\r
of 8-bit values.\r
UINT8\r
EFIAPI\r
CalculateCheckSum8 (\r
- IN CONST UINT8 *Buffer,\r
- IN UINTN Length\r
+ IN CONST UINT8 *Buffer,\r
+ IN UINTN Length\r
);\r
\r
-\r
/**\r
Returns the sum of all elements in a buffer of 16-bit values. During\r
calculation, the carry bits are dropped.\r
UINT16\r
EFIAPI\r
CalculateSum16 (\r
- IN CONST UINT16 *Buffer,\r
- IN UINTN Length\r
+ IN CONST UINT16 *Buffer,\r
+ IN UINTN Length\r
);\r
\r
-\r
/**\r
Returns the two's complement checksum of all elements in a buffer of\r
16-bit values.\r
UINT16\r
EFIAPI\r
CalculateCheckSum16 (\r
- IN CONST UINT16 *Buffer,\r
- IN UINTN Length\r
+ IN CONST UINT16 *Buffer,\r
+ IN UINTN Length\r
);\r
\r
-\r
/**\r
Returns the sum of all elements in a buffer of 32-bit values. During\r
calculation, the carry bits are dropped.\r
UINT32\r
EFIAPI\r
CalculateSum32 (\r
- IN CONST UINT32 *Buffer,\r
- IN UINTN Length\r
+ IN CONST UINT32 *Buffer,\r
+ IN UINTN Length\r
);\r
\r
-\r
/**\r
Returns the two's complement checksum of all elements in a buffer of\r
32-bit values.\r
UINT32\r
EFIAPI\r
CalculateCheckSum32 (\r
- IN CONST UINT32 *Buffer,\r
- IN UINTN Length\r
+ IN CONST UINT32 *Buffer,\r
+ IN UINTN Length\r
);\r
\r
-\r
/**\r
Returns the sum of all elements in a buffer of 64-bit values. During\r
calculation, the carry bits are dropped.\r
UINT64\r
EFIAPI\r
CalculateSum64 (\r
- IN CONST UINT64 *Buffer,\r
- IN UINTN Length\r
+ IN CONST UINT64 *Buffer,\r
+ IN UINTN Length\r
);\r
\r
-\r
/**\r
Returns the two's complement checksum of all elements in a buffer of\r
64-bit values.\r
UINT64\r
EFIAPI\r
CalculateCheckSum64 (\r
- IN CONST UINT64 *Buffer,\r
- IN UINTN Length\r
+ IN CONST UINT64 *Buffer,\r
+ IN UINTN Length\r
+ );\r
+\r
+/**\r
+ Computes and returns a 32-bit CRC for a data buffer.\r
+ CRC32 value bases on ITU-T V.42.\r
+\r
+ If Buffer is NULL, then ASSERT().\r
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+\r
+ @param[in] Buffer A pointer to the buffer on which the 32-bit CRC is to be computed.\r
+ @param[in] Length The number of bytes in the buffer Data.\r
+\r
+ @retval Crc32 The 32-bit CRC was computed for the data buffer.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+CalculateCrc32 (\r
+ IN VOID *Buffer,\r
+ IN UINTN Length\r
+ );\r
+\r
+/**\r
+ Calculates the CRC16-ANSI checksum of the given buffer.\r
+\r
+ @param[in] Buffer Pointer to the buffer.\r
+ @param[in] Length Length of the buffer, in bytes.\r
+ @param[in] InitialValue Initial value of the CRC.\r
+\r
+ @return The CRC16-ANSI checksum.\r
+**/\r
+UINT16\r
+EFIAPI\r
+CalculateCrc16Ansi (\r
+ IN CONST VOID *Buffer,\r
+ IN UINTN Length,\r
+ IN UINT16 InitialValue\r
);\r
\r
+/**\r
+ Calculates the CRC32c checksum of the given buffer.\r
+\r
+ @param[in] Buffer Pointer to the buffer.\r
+ @param[in] Length Length of the buffer, in bytes.\r
+ @param[in] InitialValue Initial value of the CRC.\r
+\r
+ @return The CRC32c checksum.\r
+**/\r
+UINT32\r
+EFIAPI\r
+CalculateCrc32c (\r
+ IN CONST VOID *Buffer,\r
+ IN UINTN Length,\r
+ IN UINT32 InitialValue\r
+ );\r
\r
//\r
// Base Library CPU Functions\r
\r
@param Context1 Context1 parameter passed into SwitchStack().\r
@param Context2 Context2 parameter passed into SwitchStack().\r
-\r
**/\r
typedef\r
VOID\r
(EFIAPI *SWITCH_STACK_ENTRY_POINT)(\r
- IN VOID *Context1, OPTIONAL\r
+ IN VOID *Context1 OPTIONAL,\r
IN VOID *Context2 OPTIONAL\r
);\r
\r
-\r
/**\r
Used to serialize load and store operations.\r
\r
VOID\r
);\r
\r
-\r
/**\r
Saves the current CPU context that can be restored with a call to LongJump()\r
and returns 0.\r
\r
If JumpBuffer is NULL, then ASSERT().\r
For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r
- \r
+\r
NOTE: The structure BASE_LIBRARY_JUMP_BUFFER is CPU architecture specific.\r
The same structure must never be used for more than one CPU architecture context.\r
- For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module. \r
- SetJump()/LongJump() is not currently supported for the EBC processor type. \r
+ For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module.\r
+ SetJump()/LongJump() is not currently supported for the EBC processor type.\r
\r
@param JumpBuffer A pointer to CPU context buffer.\r
\r
@retval 0 Indicates a return from SetJump().\r
\r
**/\r
+RETURNS_TWICE\r
UINTN\r
EFIAPI\r
SetJump (\r
OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer\r
);\r
\r
-\r
/**\r
Restores the CPU context that was saved with SetJump().\r
\r
IN UINTN Value\r
);\r
\r
-\r
/**\r
Enables CPU interrupts.\r
\r
VOID\r
);\r
\r
-\r
/**\r
Disables CPU interrupts.\r
\r
VOID\r
);\r
\r
-\r
/**\r
Disables CPU interrupts and returns the interrupt state prior to the disable\r
operation.\r
VOID\r
);\r
\r
-\r
/**\r
Enables CPU interrupts for the smallest window required to capture any\r
pending interrupts.\r
VOID\r
);\r
\r
-\r
/**\r
Retrieves the current CPU interrupt state.\r
\r
VOID\r
);\r
\r
-\r
/**\r
Set the current CPU interrupt state.\r
\r
BOOLEAN\r
EFIAPI\r
SetInterruptState (\r
- IN BOOLEAN InterruptState\r
+ IN BOOLEAN InterruptState\r
);\r
\r
-\r
/**\r
Requests CPU to pause for a short period of time.\r
\r
VOID\r
);\r
\r
-\r
/**\r
Transfers control to a function starting with a new stack.\r
\r
function.\r
@param NewStack A pointer to the new stack to use for the EntryPoint\r
function.\r
- @param ... This variable argument list is ignored for IA-32, x64, and \r
- EBC architectures. For Itanium processors, this variable \r
- argument list is expected to contain a single parameter of \r
+ @param ... This variable argument list is ignored for IA-32, x64, and\r
+ EBC architectures. For Itanium processors, this variable\r
+ argument list is expected to contain a single parameter of\r
type VOID * that specifies the new backing store pointer.\r
\r
\r
EFIAPI\r
SwitchStack (\r
IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r
- IN VOID *Context1, OPTIONAL\r
- IN VOID *Context2, OPTIONAL\r
+ IN VOID *Context1 OPTIONAL,\r
+ IN VOID *Context2 OPTIONAL,\r
IN VOID *NewStack,\r
...\r
);\r
\r
-\r
-/**\r
- Generates a breakpoint on the CPU.\r
-\r
- Generates a breakpoint on the CPU. The breakpoint must be implemented such\r
- that code can resume normal execution after the breakpoint.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-CpuBreakpoint (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Executes an infinite loop.\r
-\r
- Forces the CPU to execute an infinite loop. A debugger may be used to skip\r
- past the loop and the code that follows the loop must execute properly. This\r
- implies that the infinite loop must not cause the code that follow it to be\r
- optimized away.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-CpuDeadLoop (\r
- VOID\r
- );\r
- \r
-#if defined (MDE_CPU_IPF)\r
-\r
-/**\r
- Flush a range of cache lines in the cache coherency domain of the calling\r
- CPU.\r
-\r
- Flushes the cache lines specified by Address and Length. If Address is not aligned \r
- on a cache line boundary, then entire cache line containing Address is flushed. \r
- If Address + Length is not aligned on a cache line boundary, then the entire cache \r
- line containing Address + Length - 1 is flushed. This function may choose to flush \r
- the entire cache if that is more efficient than flushing the specified range. If \r
- Length is 0, the no cache lines are flushed. Address is returned. \r
- This function is only available on Itanium processors.\r
-\r
- If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
-\r
- @param Address The base address of the instruction lines to invalidate. If\r
- the CPU is in a physical addressing mode, then Address is a\r
- physical address. If the CPU is in a virtual addressing mode,\r
- then Address is a virtual address.\r
-\r
- @param Length The number of bytes to invalidate from the instruction cache.\r
-\r
- @return Address.\r
-\r
-**/\r
-VOID *\r
-EFIAPI\r
-AsmFlushCacheRange (\r
- IN VOID *Address,\r
- IN UINTN Length\r
- );\r
-\r
-\r
-/**\r
- Executes an FC instruction.\r
- Executes an FC instruction on the cache line specified by Address.\r
- The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r
- An implementation may flush a larger region. This function is only available on Itanium processors.\r
-\r
- @param Address The Address of cache line to be flushed.\r
-\r
- @return The address of FC instruction executed.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmFc (\r
- IN UINT64 Address\r
- );\r
-\r
-\r
-/**\r
- Executes an FC.I instruction.\r
- Executes an FC.I instruction on the cache line specified by Address.\r
- The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r
- An implementation may flush a larger region. This function is only available on Itanium processors.\r
-\r
- @param Address The Address of cache line to be flushed.\r
-\r
- @return The address of the FC.I instruction executed.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmFci (\r
- IN UINT64 Address\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of a Processor Identifier Register (CPUID).\r
- \r
- Reads and returns the current value of Processor Identifier Register specified by Index. \r
- The Index of largest implemented CPUID (One less than the number of implemented CPUID\r
- registers) is determined by CPUID [3] bits {7:0}.\r
- No parameter checking is performed on Index. If the Index value is beyond the\r
- implemented CPUID register range, a Reserved Register/Field fault may occur. The caller\r
- must either guarantee that Index is valid, or the caller must set up fault handlers to\r
- catch the faults. This function is only available on Itanium processors.\r
-\r
- @param Index The 8-bit Processor Identifier Register index to read.\r
-\r
- @return The current value of Processor Identifier Register specified by Index.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadCpuid (\r
- IN UINT8 Index\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of 64-bit Processor Status Register (PSR).\r
- This function is only available on Itanium processors.\r
-\r
- @return The current value of PSR.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadPsr (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Writes the current value of 64-bit Processor Status Register (PSR).\r
-\r
- No parameter checking is performed on Value. All bits of Value corresponding to\r
- reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur.\r
- The caller must either guarantee that Value is valid, or the caller must set up\r
- fault handlers to catch the faults. This function is only available on Itanium processors.\r
-\r
- @param Value The 64-bit value to write to PSR.\r
-\r
- @return The 64-bit value written to the PSR.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWritePsr (\r
- IN UINT64 Value\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of 64-bit Kernel Register #0 (KR0).\r
- \r
- Reads and returns the current value of KR0. \r
- This function is only available on Itanium processors.\r
-\r
- @return The current value of KR0.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadKr0 (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of 64-bit Kernel Register #1 (KR1).\r
-\r
- Reads and returns the current value of KR1. \r
- This function is only available on Itanium processors.\r
-\r
- @return The current value of KR1.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadKr1 (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of 64-bit Kernel Register #2 (KR2).\r
-\r
- Reads and returns the current value of KR2. \r
- This function is only available on Itanium processors.\r
-\r
- @return The current value of KR2.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadKr2 (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of 64-bit Kernel Register #3 (KR3).\r
-\r
- Reads and returns the current value of KR3. \r
- This function is only available on Itanium processors.\r
-\r
- @return The current value of KR3.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadKr3 (\r
- VOID\r
- );\r
-\r
-\r
/**\r
- Reads the current value of 64-bit Kernel Register #4 (KR4).\r
-\r
- Reads and returns the current value of KR4. \r
- This function is only available on Itanium processors.\r
- \r
- @return The current value of KR4.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadKr4 (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of 64-bit Kernel Register #5 (KR5).\r
-\r
- Reads and returns the current value of KR5. \r
- This function is only available on Itanium processors.\r
-\r
- @return The current value of KR5.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadKr5 (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of 64-bit Kernel Register #6 (KR6).\r
-\r
- Reads and returns the current value of KR6. \r
- This function is only available on Itanium processors.\r
-\r
- @return The current value of KR6.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadKr6 (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of 64-bit Kernel Register #7 (KR7).\r
-\r
- Reads and returns the current value of KR7. \r
- This function is only available on Itanium processors.\r
-\r
- @return The current value of KR7.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadKr7 (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Write the current value of 64-bit Kernel Register #0 (KR0).\r
- \r
- Writes the current value of KR0. The 64-bit value written to \r
- the KR0 is returned. This function is only available on Itanium processors.\r
-\r
- @param Value The 64-bit value to write to KR0.\r
-\r
- @return The 64-bit value written to the KR0.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWriteKr0 (\r
- IN UINT64 Value\r
- );\r
-\r
-\r
-/**\r
- Write the current value of 64-bit Kernel Register #1 (KR1).\r
-\r
- Writes the current value of KR1. The 64-bit value written to \r
- the KR1 is returned. This function is only available on Itanium processors.\r
-\r
- @param Value The 64-bit value to write to KR1.\r
-\r
- @return The 64-bit value written to the KR1.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWriteKr1 (\r
- IN UINT64 Value\r
- );\r
-\r
-\r
-/**\r
- Write the current value of 64-bit Kernel Register #2 (KR2).\r
-\r
- Writes the current value of KR2. The 64-bit value written to \r
- the KR2 is returned. This function is only available on Itanium processors.\r
-\r
- @param Value The 64-bit value to write to KR2.\r
-\r
- @return The 64-bit value written to the KR2.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWriteKr2 (\r
- IN UINT64 Value\r
- );\r
-\r
-\r
-/**\r
- Write the current value of 64-bit Kernel Register #3 (KR3).\r
-\r
- Writes the current value of KR3. The 64-bit value written to \r
- the KR3 is returned. This function is only available on Itanium processors.\r
-\r
- @param Value The 64-bit value to write to KR3.\r
-\r
- @return The 64-bit value written to the KR3.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWriteKr3 (\r
- IN UINT64 Value\r
- );\r
-\r
-\r
-/**\r
- Write the current value of 64-bit Kernel Register #4 (KR4).\r
-\r
- Writes the current value of KR4. The 64-bit value written to \r
- the KR4 is returned. This function is only available on Itanium processors.\r
-\r
- @param Value The 64-bit value to write to KR4.\r
-\r
- @return The 64-bit value written to the KR4.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWriteKr4 (\r
- IN UINT64 Value\r
- );\r
-\r
-\r
-/**\r
- Write the current value of 64-bit Kernel Register #5 (KR5).\r
-\r
- Writes the current value of KR5. The 64-bit value written to \r
- the KR5 is returned. This function is only available on Itanium processors.\r
-\r
- @param Value The 64-bit value to write to KR5.\r
-\r
- @return The 64-bit value written to the KR5.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWriteKr5 (\r
- IN UINT64 Value\r
- );\r
-\r
-\r
-/**\r
- Write the current value of 64-bit Kernel Register #6 (KR6).\r
-\r
- Writes the current value of KR6. The 64-bit value written to \r
- the KR6 is returned. This function is only available on Itanium processors.\r
-\r
- @param Value The 64-bit value to write to KR6.\r
-\r
- @return The 64-bit value written to the KR6.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWriteKr6 (\r
- IN UINT64 Value\r
- );\r
-\r
-\r
-/**\r
- Write the current value of 64-bit Kernel Register #7 (KR7).\r
-\r
- Writes the current value of KR7. The 64-bit value written to \r
- the KR7 is returned. This function is only available on Itanium processors.\r
-\r
- @param Value The 64-bit value to write to KR7.\r
-\r
- @return The 64-bit value written to the KR7.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWriteKr7 (\r
- IN UINT64 Value\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of Interval Timer Counter Register (ITC).\r
- \r
- Reads and returns the current value of ITC.\r
- This function is only available on Itanium processors.\r
-\r
- @return The current value of ITC.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadItc (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of Interval Timer Vector Register (ITV).\r
- \r
- Reads and returns the current value of ITV. \r
- This function is only available on Itanium processors.\r
-\r
- @return The current value of ITV.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadItv (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of Interval Timer Match Register (ITM).\r
- \r
- Reads and returns the current value of ITM.\r
- This function is only available on Itanium processors.\r
-\r
- @return The current value of ITM.\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadItm (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Writes the current value of 64-bit Interval Timer Counter Register (ITC).\r
- \r
- Writes the current value of ITC. The 64-bit value written to the ITC is returned. \r
- This function is only available on Itanium processors.\r
-\r
- @param Value The 64-bit value to write to ITC.\r
-\r
- @return The 64-bit value written to the ITC.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWriteItc (\r
- IN UINT64 Value\r
- );\r
-\r
-\r
-/**\r
- Writes the current value of 64-bit Interval Timer Match Register (ITM).\r
- \r
- Writes the current value of ITM. The 64-bit value written to the ITM is returned. \r
- This function is only available on Itanium processors.\r
-\r
- @param Value The 64-bit value to write to ITM.\r
-\r
- @return The 64-bit value written to the ITM.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWriteItm (\r
- IN UINT64 Value\r
- );\r
-\r
-\r
-/**\r
- Writes the current value of 64-bit Interval Timer Vector Register (ITV).\r
- \r
- Writes the current value of ITV. The 64-bit value written to the ITV is returned. \r
- No parameter checking is performed on Value. All bits of Value corresponding to\r
- reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.\r
- The caller must either guarantee that Value is valid, or the caller must set up\r
- fault handlers to catch the faults.\r
- This function is only available on Itanium processors.\r
-\r
- @param Value The 64-bit value to write to ITV.\r
-\r
- @return The 64-bit value written to the ITV.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWriteItv (\r
- IN UINT64 Value\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of Default Control Register (DCR).\r
- \r
- Reads and returns the current value of DCR. This function is only available on Itanium processors.\r
-\r
- @return The current value of DCR.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadDcr (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of Interruption Vector Address Register (IVA).\r
- \r
- Reads and returns the current value of IVA. This function is only available on Itanium processors.\r
-\r
- @return The current value of IVA.\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadIva (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of Page Table Address Register (PTA).\r
- \r
- Reads and returns the current value of PTA. This function is only available on Itanium processors.\r
-\r
- @return The current value of PTA.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadPta (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Writes the current value of 64-bit Default Control Register (DCR).\r
- \r
- Writes the current value of DCR. The 64-bit value written to the DCR is returned. \r
- No parameter checking is performed on Value. All bits of Value corresponding to\r
- reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r
- The caller must either guarantee that Value is valid, or the caller must set up\r
- fault handlers to catch the faults.\r
- This function is only available on Itanium processors.\r
-\r
- @param Value The 64-bit value to write to DCR.\r
-\r
- @return The 64-bit value written to the DCR.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWriteDcr (\r
- IN UINT64 Value\r
- );\r
-\r
-\r
-/**\r
- Writes the current value of 64-bit Interruption Vector Address Register (IVA).\r
- \r
- Writes the current value of IVA. The 64-bit value written to the IVA is returned. \r
- The size of vector table is 32 K bytes and is 32 K bytes aligned\r
- the low 15 bits of Value is ignored when written.\r
- This function is only available on Itanium processors.\r
-\r
- @param Value The 64-bit value to write to IVA.\r
-\r
- @return The 64-bit value written to the IVA.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWriteIva (\r
- IN UINT64 Value\r
- );\r
-\r
-\r
-/**\r
- Writes the current value of 64-bit Page Table Address Register (PTA).\r
- \r
- Writes the current value of PTA. The 64-bit value written to the PTA is returned. \r
- No parameter checking is performed on Value. All bits of Value corresponding to\r
- reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r
- The caller must either guarantee that Value is valid, or the caller must set up\r
- fault handlers to catch the faults.\r
- This function is only available on Itanium processors.\r
-\r
- @param Value The 64-bit value to write to PTA.\r
-\r
- @return The 64-bit value written to the PTA.\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWritePta (\r
- IN UINT64 Value\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of Local Interrupt ID Register (LID).\r
- \r
- Reads and returns the current value of LID. This function is only available on Itanium processors.\r
-\r
- @return The current value of LID.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadLid (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of External Interrupt Vector Register (IVR).\r
- \r
- Reads and returns the current value of IVR. This function is only available on Itanium processors. \r
-\r
- @return The current value of IVR.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadIvr (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of Task Priority Register (TPR).\r
- \r
- Reads and returns the current value of TPR. This function is only available on Itanium processors. \r
-\r
- @return The current value of TPR.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadTpr (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of External Interrupt Request Register #0 (IRR0).\r
- \r
- Reads and returns the current value of IRR0. This function is only available on Itanium processors. \r
-\r
- @return The current value of IRR0.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadIrr0 (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of External Interrupt Request Register #1 (IRR1).\r
- \r
- Reads and returns the current value of IRR1. This function is only available on Itanium processors. \r
-\r
- @return The current value of IRR1.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadIrr1 (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of External Interrupt Request Register #2 (IRR2).\r
- \r
- Reads and returns the current value of IRR2. This function is only available on Itanium processors.\r
-\r
- @return The current value of IRR2.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadIrr2 (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of External Interrupt Request Register #3 (IRR3).\r
- \r
- Reads and returns the current value of IRR3. This function is only available on Itanium processors. \r
-\r
- @return The current value of IRR3.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadIrr3 (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of Performance Monitor Vector Register (PMV).\r
- \r
- Reads and returns the current value of PMV. This function is only available on Itanium processors. \r
-\r
- @return The current value of PMV.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadPmv (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of Corrected Machine Check Vector Register (CMCV).\r
- \r
- Reads and returns the current value of CMCV. This function is only available on Itanium processors.\r
-\r
- @return The current value of CMCV.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadCmcv (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of Local Redirection Register #0 (LRR0).\r
- \r
- Reads and returns the current value of LRR0. This function is only available on Itanium processors. \r
-\r
- @return The current value of LRR0.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadLrr0 (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of Local Redirection Register #1 (LRR1).\r
- \r
- Reads and returns the current value of LRR1. This function is only available on Itanium processors.\r
-\r
- @return The current value of LRR1.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadLrr1 (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Writes the current value of 64-bit Page Local Interrupt ID Register (LID).\r
- \r
- Writes the current value of LID. The 64-bit value written to the LID is returned. \r
- No parameter checking is performed on Value. All bits of Value corresponding to\r
- reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.\r
- The caller must either guarantee that Value is valid, or the caller must set up\r
- fault handlers to catch the faults.\r
- This function is only available on Itanium processors.\r
-\r
- @param Value The 64-bit value to write to LID.\r
-\r
- @return The 64-bit value written to the LID.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWriteLid (\r
- IN UINT64 Value\r
- );\r
-\r
-\r
-/**\r
- Writes the current value of 64-bit Task Priority Register (TPR).\r
- \r
- Writes the current value of TPR. The 64-bit value written to the TPR is returned. \r
- No parameter checking is performed on Value. All bits of Value corresponding to\r
- reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.\r
- The caller must either guarantee that Value is valid, or the caller must set up\r
- fault handlers to catch the faults.\r
- This function is only available on Itanium processors.\r
-\r
- @param Value The 64-bit value to write to TPR.\r
-\r
- @return The 64-bit value written to the TPR.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWriteTpr (\r
- IN UINT64 Value\r
- );\r
-\r
-\r
-/**\r
- Performs a write operation on End OF External Interrupt Register (EOI).\r
- \r
- Writes a value of 0 to the EOI Register. This function is only available on Itanium processors.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-AsmWriteEoi (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Writes the current value of 64-bit Performance Monitor Vector Register (PMV).\r
- \r
- Writes the current value of PMV. The 64-bit value written to the PMV is returned. \r
- No parameter checking is performed on Value. All bits of Value corresponding\r
- to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.\r
- The caller must either guarantee that Value is valid, or the caller must set up\r
- fault handlers to catch the faults.\r
- This function is only available on Itanium processors.\r
-\r
- @param Value The 64-bit value to write to PMV.\r
-\r
- @return The 64-bit value written to the PMV.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWritePmv (\r
- IN UINT64 Value\r
- );\r
-\r
-\r
-/**\r
- Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).\r
- \r
- Writes the current value of CMCV. The 64-bit value written to the CMCV is returned. \r
- No parameter checking is performed on Value. All bits of Value corresponding\r
- to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.\r
- The caller must either guarantee that Value is valid, or the caller must set up\r
- fault handlers to catch the faults.\r
- This function is only available on Itanium processors.\r
-\r
- @param Value The 64-bit value to write to CMCV.\r
-\r
- @return The 64-bit value written to the CMCV.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWriteCmcv (\r
- IN UINT64 Value\r
- );\r
-\r
-\r
-/**\r
- Writes the current value of 64-bit Local Redirection Register #0 (LRR0).\r
- \r
- Writes the current value of LRR0. The 64-bit value written to the LRR0 is returned. \r
- No parameter checking is performed on Value. All bits of Value corresponding\r
- to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.\r
- The caller must either guarantee that Value is valid, or the caller must set up\r
- fault handlers to catch the faults.\r
- This function is only available on Itanium processors.\r
-\r
- @param Value The 64-bit value to write to LRR0.\r
-\r
- @return The 64-bit value written to the LRR0.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWriteLrr0 (\r
- IN UINT64 Value\r
- );\r
-\r
-\r
-/**\r
- Writes the current value of 64-bit Local Redirection Register #1 (LRR1).\r
- \r
- Writes the current value of LRR1. The 64-bit value written to the LRR1 is returned. \r
- No parameter checking is performed on Value. All bits of Value corresponding\r
- to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.\r
- The caller must either guarantee that Value is valid, or the caller must\r
- set up fault handlers to catch the faults.\r
- This function is only available on Itanium processors.\r
-\r
- @param Value The 64-bit value to write to LRR1.\r
-\r
- @return The 64-bit value written to the LRR1.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWriteLrr1 (\r
- IN UINT64 Value\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of Instruction Breakpoint Register (IBR).\r
- \r
- The Instruction Breakpoint Registers are used in pairs. The even numbered\r
- registers contain breakpoint addresses, and the odd numbered registers contain\r
- breakpoint mask conditions. At least four instruction registers pairs are implemented\r
- on all processor models. Implemented registers are contiguous starting with\r
- register 0. No parameter checking is performed on Index, and if the Index value\r
- is beyond the implemented IBR register range, a Reserved Register/Field fault may\r
- occur. The caller must either guarantee that Index is valid, or the caller must\r
- set up fault handlers to catch the faults.\r
- This function is only available on Itanium processors.\r
-\r
- @param Index The 8-bit Instruction Breakpoint Register index to read.\r
-\r
- @return The current value of Instruction Breakpoint Register specified by Index.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadIbr (\r
- IN UINT8 Index\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of Data Breakpoint Register (DBR).\r
-\r
- The Data Breakpoint Registers are used in pairs. The even numbered registers\r
- contain breakpoint addresses, and odd numbered registers contain breakpoint\r
- mask conditions. At least four data registers pairs are implemented on all processor\r
- models. Implemented registers are contiguous starting with register 0.\r
- No parameter checking is performed on Index. If the Index value is beyond\r
- the implemented DBR register range, a Reserved Register/Field fault may occur.\r
- The caller must either guarantee that Index is valid, or the caller must set up\r
- fault handlers to catch the faults.\r
- This function is only available on Itanium processors.\r
-\r
- @param Index The 8-bit Data Breakpoint Register index to read.\r
-\r
- @return The current value of Data Breakpoint Register specified by Index.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadDbr (\r
- IN UINT8 Index\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of Performance Monitor Configuration Register (PMC).\r
-\r
- All processor implementations provide at least four performance counters\r
- (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow\r
- status registers (PMC [0]... PMC [3]). Processor implementations may provide\r
- additional implementation-dependent PMC and PMD to increase the number of\r
- 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD\r
- register set is implementation dependent. No parameter checking is performed\r
- on Index. If the Index value is beyond the implemented PMC register range,\r
- zero value will be returned.\r
- This function is only available on Itanium processors.\r
-\r
- @param Index The 8-bit Performance Monitor Configuration Register index to read.\r
-\r
- @return The current value of Performance Monitor Configuration Register\r
- specified by Index.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadPmc (\r
- IN UINT8 Index\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of Performance Monitor Data Register (PMD).\r
-\r
- All processor implementations provide at least 4 performance counters\r
- (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter\r
- overflow status registers (PMC [0]... PMC [3]). Processor implementations may\r
- provide additional implementation-dependent PMC and PMD to increase the number\r
- of 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD\r
- register set is implementation dependent. No parameter checking is performed\r
- on Index. If the Index value is beyond the implemented PMD register range,\r
- zero value will be returned.\r
- This function is only available on Itanium processors.\r
-\r
- @param Index The 8-bit Performance Monitor Data Register index to read.\r
-\r
- @return The current value of Performance Monitor Data Register specified by Index.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadPmd (\r
- IN UINT8 Index\r
- );\r
-\r
-\r
-/**\r
- Writes the current value of 64-bit Instruction Breakpoint Register (IBR).\r
-\r
- Writes current value of Instruction Breakpoint Register specified by Index.\r
- The Instruction Breakpoint Registers are used in pairs. The even numbered\r
- registers contain breakpoint addresses, and odd numbered registers contain\r
- breakpoint mask conditions. At least four instruction registers pairs are implemented\r
- on all processor models. Implemented registers are contiguous starting with\r
- register 0. No parameter checking is performed on Index. If the Index value\r
- is beyond the implemented IBR register range, a Reserved Register/Field fault may\r
- occur. The caller must either guarantee that Index is valid, or the caller must\r
- set up fault handlers to catch the faults.\r
- This function is only available on Itanium processors.\r
-\r
- @param Index The 8-bit Instruction Breakpoint Register index to write.\r
- @param Value The 64-bit value to write to IBR.\r
-\r
- @return The 64-bit value written to the IBR.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWriteIbr (\r
- IN UINT8 Index,\r
- IN UINT64 Value\r
- );\r
-\r
-\r
-/**\r
- Writes the current value of 64-bit Data Breakpoint Register (DBR).\r
-\r
- Writes current value of Data Breakpoint Register specified by Index.\r
- The Data Breakpoint Registers are used in pairs. The even numbered registers\r
- contain breakpoint addresses, and odd numbered registers contain breakpoint\r
- mask conditions. At least four data registers pairs are implemented on all processor\r
- models. Implemented registers are contiguous starting with register 0. No parameter\r
- checking is performed on Index. If the Index value is beyond the implemented\r
- DBR register range, a Reserved Register/Field fault may occur. The caller must\r
- either guarantee that Index is valid, or the caller must set up fault handlers to\r
- catch the faults.\r
- This function is only available on Itanium processors.\r
-\r
- @param Index The 8-bit Data Breakpoint Register index to write.\r
- @param Value The 64-bit value to write to DBR.\r
-\r
- @return The 64-bit value written to the DBR.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWriteDbr (\r
- IN UINT8 Index,\r
- IN UINT64 Value\r
- );\r
-\r
-\r
-/**\r
- Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).\r
-\r
- Writes current value of Performance Monitor Configuration Register specified by Index.\r
- All processor implementations provide at least four performance counters\r
- (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow status\r
- registers (PMC [0]... PMC [3]). Processor implementations may provide additional\r
- implementation-dependent PMC and PMD to increase the number of 'generic' performance\r
- counters (PMC/PMD pairs). The remainder of PMC and PMD register set is implementation\r
- dependent. No parameter checking is performed on Index. If the Index value is\r
- beyond the implemented PMC register range, the write is ignored.\r
- This function is only available on Itanium processors.\r
-\r
- @param Index The 8-bit Performance Monitor Configuration Register index to write.\r
- @param Value The 64-bit value to write to PMC.\r
-\r
- @return The 64-bit value written to the PMC.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWritePmc (\r
- IN UINT8 Index,\r
- IN UINT64 Value\r
- );\r
-\r
-\r
-/**\r
- Writes the current value of 64-bit Performance Monitor Data Register (PMD).\r
-\r
- Writes current value of Performance Monitor Data Register specified by Index.\r
- All processor implementations provide at least four performance counters\r
- (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow\r
- status registers (PMC [0]... PMC [3]). Processor implementations may provide\r
- additional implementation-dependent PMC and PMD to increase the number of 'generic'\r
- performance counters (PMC/PMD pairs). The remainder of PMC and PMD register set\r
- is implementation dependent. No parameter checking is performed on Index. If the\r
- Index value is beyond the implemented PMD register range, the write is ignored.\r
- This function is only available on Itanium processors.\r
-\r
- @param Index The 8-bit Performance Monitor Data Register index to write.\r
- @param Value The 64-bit value to write to PMD.\r
-\r
- @return The 64-bit value written to the PMD.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWritePmd (\r
- IN UINT8 Index,\r
- IN UINT64 Value\r
- );\r
-\r
-\r
-/**\r
- Reads the current value of 64-bit Global Pointer (GP).\r
-\r
- Reads and returns the current value of GP.\r
- This function is only available on Itanium processors.\r
-\r
- @return The current value of GP.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadGp (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- Write the current value of 64-bit Global Pointer (GP).\r
-\r
- Writes the current value of GP. The 64-bit value written to the GP is returned.\r
- No parameter checking is performed on Value.\r
- This function is only available on Itanium processors.\r
-\r
- @param Value The 64-bit value to write to GP.\r
+ Generates a breakpoint on the CPU.\r
\r
- @return The 64-bit value written to the GP.\r
+ Generates a breakpoint on the CPU. The breakpoint must be implemented such\r
+ that code can resume normal execution after the breakpoint.\r
\r
**/\r
-UINT64\r
+VOID\r
EFIAPI\r
-AsmWriteGp (\r
- IN UINT64 Value\r
+CpuBreakpoint (\r
+ VOID\r
);\r
\r
-\r
/**\r
- Reads the current value of 64-bit Stack Pointer (SP).\r
-\r
- Reads and returns the current value of SP.\r
- This function is only available on Itanium processors.\r
+ Executes an infinite loop.\r
\r
- @return The current value of SP.\r
+ Forces the CPU to execute an infinite loop. A debugger may be used to skip\r
+ past the loop and the code that follows the loop must execute properly. This\r
+ implies that the infinite loop must not cause the code that follow it to be\r
+ optimized away.\r
\r
**/\r
-UINT64\r
+VOID\r
EFIAPI\r
-AsmReadSp (\r
+CpuDeadLoop (\r
VOID\r
);\r
\r
+/**\r
+ Uses as a barrier to stop speculative execution.\r
\r
-///\r
-/// Valid Index value for AsmReadControlRegister().\r
-///\r
-#define IPF_CONTROL_REGISTER_DCR 0\r
-#define IPF_CONTROL_REGISTER_ITM 1\r
-#define IPF_CONTROL_REGISTER_IVA 2\r
-#define IPF_CONTROL_REGISTER_PTA 8\r
-#define IPF_CONTROL_REGISTER_IPSR 16\r
-#define IPF_CONTROL_REGISTER_ISR 17\r
-#define IPF_CONTROL_REGISTER_IIP 19\r
-#define IPF_CONTROL_REGISTER_IFA 20\r
-#define IPF_CONTROL_REGISTER_ITIR 21\r
-#define IPF_CONTROL_REGISTER_IIPA 22\r
-#define IPF_CONTROL_REGISTER_IFS 23\r
-#define IPF_CONTROL_REGISTER_IIM 24\r
-#define IPF_CONTROL_REGISTER_IHA 25\r
-#define IPF_CONTROL_REGISTER_LID 64\r
-#define IPF_CONTROL_REGISTER_IVR 65\r
-#define IPF_CONTROL_REGISTER_TPR 66\r
-#define IPF_CONTROL_REGISTER_EOI 67\r
-#define IPF_CONTROL_REGISTER_IRR0 68\r
-#define IPF_CONTROL_REGISTER_IRR1 69\r
-#define IPF_CONTROL_REGISTER_IRR2 70\r
-#define IPF_CONTROL_REGISTER_IRR3 71\r
-#define IPF_CONTROL_REGISTER_ITV 72\r
-#define IPF_CONTROL_REGISTER_PMV 73\r
-#define IPF_CONTROL_REGISTER_CMCV 74\r
-#define IPF_CONTROL_REGISTER_LRR0 80\r
-#define IPF_CONTROL_REGISTER_LRR1 81\r
-\r
-/**\r
- Reads a 64-bit control register.\r
-\r
- Reads and returns the control register specified by Index. The valid Index valued \r
- are defined above in "Related Definitions".\r
- If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only \r
- available on Itanium processors.\r
-\r
- @param Index The index of the control register to read.\r
-\r
- @return The control register specified by Index.\r
+ Ensures that no later instruction will execute speculatively, until all prior\r
+ instructions have completed.\r
\r
**/\r
-UINT64\r
+VOID\r
EFIAPI\r
-AsmReadControlRegister (\r
- IN UINT64 Index\r
+SpeculationBarrier (\r
+ VOID\r
);\r
\r
+#if defined (MDE_CPU_X64) || defined (MDE_CPU_IA32)\r
\r
-///\r
-/// Valid Index value for AsmReadApplicationRegister().\r
-///\r
-#define IPF_APPLICATION_REGISTER_K0 0\r
-#define IPF_APPLICATION_REGISTER_K1 1\r
-#define IPF_APPLICATION_REGISTER_K2 2\r
-#define IPF_APPLICATION_REGISTER_K3 3\r
-#define IPF_APPLICATION_REGISTER_K4 4\r
-#define IPF_APPLICATION_REGISTER_K5 5\r
-#define IPF_APPLICATION_REGISTER_K6 6\r
-#define IPF_APPLICATION_REGISTER_K7 7\r
-#define IPF_APPLICATION_REGISTER_RSC 16\r
-#define IPF_APPLICATION_REGISTER_BSP 17\r
-#define IPF_APPLICATION_REGISTER_BSPSTORE 18\r
-#define IPF_APPLICATION_REGISTER_RNAT 19\r
-#define IPF_APPLICATION_REGISTER_FCR 21\r
-#define IPF_APPLICATION_REGISTER_EFLAG 24\r
-#define IPF_APPLICATION_REGISTER_CSD 25\r
-#define IPF_APPLICATION_REGISTER_SSD 26\r
-#define IPF_APPLICATION_REGISTER_CFLG 27\r
-#define IPF_APPLICATION_REGISTER_FSR 28\r
-#define IPF_APPLICATION_REGISTER_FIR 29\r
-#define IPF_APPLICATION_REGISTER_FDR 30\r
-#define IPF_APPLICATION_REGISTER_CCV 32\r
-#define IPF_APPLICATION_REGISTER_UNAT 36\r
-#define IPF_APPLICATION_REGISTER_FPSR 40\r
-#define IPF_APPLICATION_REGISTER_ITC 44\r
-#define IPF_APPLICATION_REGISTER_PFS 64\r
-#define IPF_APPLICATION_REGISTER_LC 65\r
-#define IPF_APPLICATION_REGISTER_EC 66\r
-\r
-/**\r
- Reads a 64-bit application register.\r
-\r
- Reads and returns the application register specified by Index. The valid Index \r
- valued are defined above in "Related Definitions".\r
- If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only \r
- available on Itanium processors.\r
-\r
- @param Index The index of the application register to read.\r
-\r
- @return The application register specified by Index.\r
+/**\r
+ The TDCALL instruction causes a VM exit to the Intel TDX module. It is\r
+ used to call guest-side Intel TDX functions, either local or a TD exit\r
+ to the host VMM, as selected by Leaf.\r
+\r
+ @param[in] Leaf Leaf number of TDCALL instruction\r
+ @param[in] Arg1 Arg1\r
+ @param[in] Arg2 Arg2\r
+ @param[in] Arg3 Arg3\r
+ @param[in,out] Results Returned result of the Leaf function\r
\r
+ @return 0 A successful call\r
+ @return Other See individual leaf functions\r
**/\r
-UINT64\r
+UINTN\r
EFIAPI\r
-AsmReadApplicationRegister (\r
- IN UINT64 Index\r
+TdCall (\r
+ IN UINT64 Leaf,\r
+ IN UINT64 Arg1,\r
+ IN UINT64 Arg2,\r
+ IN UINT64 Arg3,\r
+ IN OUT VOID *Results\r
);\r
\r
-\r
/**\r
- Reads the current value of a Machine Specific Register (MSR).\r
-\r
- Reads and returns the current value of the Machine Specific Register specified by Index. No\r
- parameter checking is performed on Index, and if the Index value is beyond the implemented MSR\r
- register range, a Reserved Register/Field fault may occur. The caller must either guarantee that\r
- Index is valid, or the caller must set up fault handlers to catch the faults. This function is\r
- only available on Itanium processors.\r
+ TDVMALL is a leaf function 0 for TDCALL. It helps invoke services from the\r
+ host VMM to pass/receive information.\r
\r
- @param Index The 8-bit Machine Specific Register index to read.\r
+ @param[in] Leaf Number of sub-functions\r
+ @param[in] Arg1 Arg1\r
+ @param[in] Arg2 Arg2\r
+ @param[in] Arg3 Arg3\r
+ @param[in] Arg4 Arg4\r
+ @param[in,out] Results Returned result of the sub-function\r
\r
- @return The current value of the Machine Specific Register specified by Index. \r
+ @return 0 A successful call\r
+ @return Other See individual sub-functions\r
\r
**/\r
-UINT64\r
+UINTN\r
EFIAPI\r
-AsmReadMsr (\r
- IN UINT8 Index \r
+TdVmCall (\r
+ IN UINT64 Leaf,\r
+ IN UINT64 Arg1,\r
+ IN UINT64 Arg2,\r
+ IN UINT64 Arg3,\r
+ IN UINT64 Arg4,\r
+ IN OUT VOID *Results\r
);\r
\r
-\r
/**\r
- Writes the current value of a Machine Specific Register (MSR).\r
-\r
- Writes Value to the Machine Specific Register specified by Index. Value is returned. No\r
- parameter checking is performed on Index, and if the Index value is beyond the implemented MSR\r
- register range, a Reserved Register/Field fault may occur. The caller must either guarantee that\r
- Index is valid, or the caller must set up fault handlers to catch the faults. This function is\r
- only available on Itanium processors.\r
-\r
- @param Index The 8-bit Machine Specific Register index to write.\r
- @param Value The 64-bit value to write to the Machine Specific Register.\r
-\r
- @return The 64-bit value to write to the Machine Specific Register. \r
+ Probe if TD is enabled.\r
\r
+ @return TRUE TD is enabled.\r
+ @return FALSE TD is not enabled.\r
**/\r
-UINT64\r
+BOOLEAN\r
EFIAPI\r
-AsmWriteMsr (\r
- IN UINT8 Index, \r
- IN UINT64 Value \r
+TdIsEnabled (\r
+ VOID\r
);\r
\r
+#endif\r
+\r
+#if defined (MDE_CPU_X64)\r
+//\r
+// The page size for the PVALIDATE instruction\r
+//\r
+typedef enum {\r
+ PvalidatePageSize4K = 0,\r
+ PvalidatePageSize2MB,\r
+} PVALIDATE_PAGE_SIZE;\r
+\r
+//\r
+// PVALIDATE Return Code.\r
+//\r
+#define PVALIDATE_RET_SUCCESS 0\r
+#define PVALIDATE_RET_FAIL_INPUT 1\r
+#define PVALIDATE_RET_SIZE_MISMATCH 6\r
+\r
+//\r
+// The PVALIDATE instruction did not make any changes to the RMP entry.\r
+//\r
+#define PVALIDATE_RET_NO_RMPUPDATE 255\r
\r
/**\r
- Determines if the CPU is currently executing in virtual, physical, or mixed mode.\r
+ Execute a PVALIDATE instruction to validate or to rescinds validation of a guest\r
+ page's RMP entry.\r
\r
- Determines the current execution mode of the CPU.\r
- If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.\r
- If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.\r
- If the CPU is not in physical mode or virtual mode, then it is in mixed mode,\r
- and -1 is returned.\r
- This function is only available on Itanium processors.\r
+ The instruction is available only when CPUID Fn8000_001F_EAX[SNP]=1.\r
\r
- @retval 1 The CPU is in virtual mode.\r
- @retval 0 The CPU is in physical mode.\r
- @retval -1 The CPU is in mixed mode.\r
+ The function is available on X64.\r
\r
+ @param[in] PageSize The page size to use.\r
+ @param[in] Validate If TRUE, validate the guest virtual address\r
+ otherwise invalidate the guest virtual address.\r
+ @param[in] Address The guest virtual address.\r
+\r
+ @retval PVALIDATE_RET_SUCCESS The PVALIDATE instruction succeeded, and\r
+ updated the RMP entry.\r
+ @retval PVALIDATE_RET_NO_RMPUPDATE The PVALIDATE instruction succeeded, but\r
+ did not update the RMP entry.\r
+ @return Failure code from the PVALIDATE\r
+ instruction.\r
**/\r
-INT64\r
+UINT32\r
EFIAPI\r
-AsmCpuVirtual (\r
- VOID\r
+AsmPvalidate (\r
+ IN PVALIDATE_PAGE_SIZE PageSize,\r
+ IN BOOLEAN Validate,\r
+ IN PHYSICAL_ADDRESS Address\r
);\r
\r
+//\r
+// RDX settings for RMPADJUST\r
+//\r
+#define RMPADJUST_VMPL_MAX 3\r
+#define RMPADJUST_VMPL_MASK 0xFF\r
+#define RMPADJUST_VMPL_SHIFT 0\r
+#define RMPADJUST_PERMISSION_MASK_MASK 0xFF\r
+#define RMPADJUST_PERMISSION_MASK_SHIFT 8\r
+#define RMPADJUST_VMSA_PAGE_BIT BIT16\r
\r
/**\r
- Makes a PAL procedure call.\r
+ Adjusts the permissions of an SEV-SNP guest page.\r
\r
- This is a wrapper function to make a PAL procedure call. Based on the Index\r
- value this API will make static or stacked PAL call. The following table\r
- describes the usage of PAL Procedure Index Assignment. Architected procedures\r
- may be designated as required or optional. If a PAL procedure is specified\r
- as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the\r
- Status field of the PAL_CALL_RETURN structure.\r
- This indicates that the procedure is not present in this PAL implementation.\r
- It is the caller's responsibility to check for this return code after calling\r
- any optional PAL procedure.\r
- No parameter checking is performed on the 5 input parameters, but there are\r
- some common rules that the caller should follow when making a PAL call. Any\r
- address passed to PAL as buffers for return parameters must be 8-byte aligned.\r
- Unaligned addresses may cause undefined results. For those parameters defined\r
- as reserved or some fields defined as reserved must be zero filled or the invalid\r
- argument return value may be returned or undefined result may occur during the\r
- execution of the procedure. If the PalEntryPoint does not point to a valid\r
- PAL entry point then the system behavior is undefined. This function is only\r
- available on Itanium processors.\r
+ Executes a RMPADJUST instruction with the register state specified by Rax,\r
+ Rcx, and Rdx. Returns Eax. This function is only available on X64.\r
\r
- @param PalEntryPoint The PAL procedure calls entry point.\r
- @param Index The PAL procedure Index number.\r
- @param Arg2 The 2nd parameter for PAL procedure calls.\r
- @param Arg3 The 3rd parameter for PAL procedure calls.\r
- @param Arg4 The 4th parameter for PAL procedure calls.\r
+ The instruction is available only when CPUID Fn8000_001F_EAX[SNP]=1.\r
\r
- @return structure returned from the PAL Call procedure, including the status and return value.\r
+ @param[in] Rax The value to load into RAX before executing the RMPADJUST\r
+ instruction.\r
+ @param[in] Rcx The value to load into RCX before executing the RMPADJUST\r
+ instruction.\r
+ @param[in] Rdx The value to load into RDX before executing the RMPADJUST\r
+ instruction.\r
\r
+ @return Eax\r
**/\r
-PAL_CALL_RETURN\r
+UINT32\r
EFIAPI\r
-AsmPalCall (\r
- IN UINT64 PalEntryPoint,\r
- IN UINT64 Index,\r
- IN UINT64 Arg2,\r
- IN UINT64 Arg3,\r
- IN UINT64 Arg4\r
+AsmRmpAdjust (\r
+ IN UINT64 Rax,\r
+ IN UINT64 Rcx,\r
+ IN UINT64 Rdx\r
);\r
+\r
#endif\r
\r
#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)\r
///\r
typedef union {\r
struct {\r
- UINT32 CF:1; ///< Carry Flag.\r
- UINT32 Reserved_0:1; ///< Reserved.\r
- UINT32 PF:1; ///< Parity Flag.\r
- UINT32 Reserved_1:1; ///< Reserved.\r
- UINT32 AF:1; ///< Auxiliary Carry Flag.\r
- UINT32 Reserved_2:1; ///< Reserved.\r
- UINT32 ZF:1; ///< Zero Flag.\r
- UINT32 SF:1; ///< Sign Flag.\r
- UINT32 TF:1; ///< Trap Flag.\r
- UINT32 IF:1; ///< Interrupt Enable Flag.\r
- UINT32 DF:1; ///< Direction Flag.\r
- UINT32 OF:1; ///< Overflow Flag.\r
- UINT32 IOPL:2; ///< I/O Privilege Level.\r
- UINT32 NT:1; ///< Nested Task.\r
- UINT32 Reserved_3:1; ///< Reserved.\r
+ UINT32 CF : 1; ///< Carry Flag.\r
+ UINT32 Reserved_0 : 1; ///< Reserved.\r
+ UINT32 PF : 1; ///< Parity Flag.\r
+ UINT32 Reserved_1 : 1; ///< Reserved.\r
+ UINT32 AF : 1; ///< Auxiliary Carry Flag.\r
+ UINT32 Reserved_2 : 1; ///< Reserved.\r
+ UINT32 ZF : 1; ///< Zero Flag.\r
+ UINT32 SF : 1; ///< Sign Flag.\r
+ UINT32 TF : 1; ///< Trap Flag.\r
+ UINT32 IF : 1; ///< Interrupt Enable Flag.\r
+ UINT32 DF : 1; ///< Direction Flag.\r
+ UINT32 OF : 1; ///< Overflow Flag.\r
+ UINT32 IOPL : 2; ///< I/O Privilege Level.\r
+ UINT32 NT : 1; ///< Nested Task.\r
+ UINT32 Reserved_3 : 1; ///< Reserved.\r
} Bits;\r
UINT16 Uint16;\r
} IA32_FLAGS16;\r
///\r
typedef union {\r
struct {\r
- UINT32 CF:1; ///< Carry Flag.\r
- UINT32 Reserved_0:1; ///< Reserved.\r
- UINT32 PF:1; ///< Parity Flag.\r
- UINT32 Reserved_1:1; ///< Reserved.\r
- UINT32 AF:1; ///< Auxiliary Carry Flag.\r
- UINT32 Reserved_2:1; ///< Reserved.\r
- UINT32 ZF:1; ///< Zero Flag.\r
- UINT32 SF:1; ///< Sign Flag.\r
- UINT32 TF:1; ///< Trap Flag.\r
- UINT32 IF:1; ///< Interrupt Enable Flag.\r
- UINT32 DF:1; ///< Direction Flag.\r
- UINT32 OF:1; ///< Overflow Flag.\r
- UINT32 IOPL:2; ///< I/O Privilege Level.\r
- UINT32 NT:1; ///< Nested Task.\r
- UINT32 Reserved_3:1; ///< Reserved.\r
- UINT32 RF:1; ///< Resume Flag.\r
- UINT32 VM:1; ///< Virtual 8086 Mode.\r
- UINT32 AC:1; ///< Alignment Check.\r
- UINT32 VIF:1; ///< Virtual Interrupt Flag.\r
- UINT32 VIP:1; ///< Virtual Interrupt Pending.\r
- UINT32 ID:1; ///< ID Flag.\r
- UINT32 Reserved_4:10; ///< Reserved.\r
+ UINT32 CF : 1; ///< Carry Flag.\r
+ UINT32 Reserved_0 : 1; ///< Reserved.\r
+ UINT32 PF : 1; ///< Parity Flag.\r
+ UINT32 Reserved_1 : 1; ///< Reserved.\r
+ UINT32 AF : 1; ///< Auxiliary Carry Flag.\r
+ UINT32 Reserved_2 : 1; ///< Reserved.\r
+ UINT32 ZF : 1; ///< Zero Flag.\r
+ UINT32 SF : 1; ///< Sign Flag.\r
+ UINT32 TF : 1; ///< Trap Flag.\r
+ UINT32 IF : 1; ///< Interrupt Enable Flag.\r
+ UINT32 DF : 1; ///< Direction Flag.\r
+ UINT32 OF : 1; ///< Overflow Flag.\r
+ UINT32 IOPL : 2; ///< I/O Privilege Level.\r
+ UINT32 NT : 1; ///< Nested Task.\r
+ UINT32 Reserved_3 : 1; ///< Reserved.\r
+ UINT32 RF : 1; ///< Resume Flag.\r
+ UINT32 VM : 1; ///< Virtual 8086 Mode.\r
+ UINT32 AC : 1; ///< Alignment Check.\r
+ UINT32 VIF : 1; ///< Virtual Interrupt Flag.\r
+ UINT32 VIP : 1; ///< Virtual Interrupt Pending.\r
+ UINT32 ID : 1; ///< ID Flag.\r
+ UINT32 Reserved_4 : 10; ///< Reserved.\r
} Bits;\r
- UINTN UintN;\r
+ UINTN UintN;\r
} IA32_EFLAGS32;\r
\r
///\r
///\r
typedef union {\r
struct {\r
- UINT32 PE:1; ///< Protection Enable.\r
- UINT32 MP:1; ///< Monitor Coprocessor.\r
- UINT32 EM:1; ///< Emulation.\r
- UINT32 TS:1; ///< Task Switched.\r
- UINT32 ET:1; ///< Extension Type.\r
- UINT32 NE:1; ///< Numeric Error.\r
- UINT32 Reserved_0:10; ///< Reserved.\r
- UINT32 WP:1; ///< Write Protect.\r
- UINT32 Reserved_1:1; ///< Reserved.\r
- UINT32 AM:1; ///< Alignment Mask.\r
- UINT32 Reserved_2:10; ///< Reserved.\r
- UINT32 NW:1; ///< Mot Write-through.\r
- UINT32 CD:1; ///< Cache Disable.\r
- UINT32 PG:1; ///< Paging.\r
+ UINT32 PE : 1; ///< Protection Enable.\r
+ UINT32 MP : 1; ///< Monitor Coprocessor.\r
+ UINT32 EM : 1; ///< Emulation.\r
+ UINT32 TS : 1; ///< Task Switched.\r
+ UINT32 ET : 1; ///< Extension Type.\r
+ UINT32 NE : 1; ///< Numeric Error.\r
+ UINT32 Reserved_0 : 10; ///< Reserved.\r
+ UINT32 WP : 1; ///< Write Protect.\r
+ UINT32 Reserved_1 : 1; ///< Reserved.\r
+ UINT32 AM : 1; ///< Alignment Mask.\r
+ UINT32 Reserved_2 : 10; ///< Reserved.\r
+ UINT32 NW : 1; ///< Mot Write-through.\r
+ UINT32 CD : 1; ///< Cache Disable.\r
+ UINT32 PG : 1; ///< Paging.\r
} Bits;\r
- UINTN UintN;\r
+ UINTN UintN;\r
} IA32_CR0;\r
\r
///\r
///\r
typedef union {\r
struct {\r
- UINT32 VME:1; ///< Virtual-8086 Mode Extensions.\r
- UINT32 PVI:1; ///< Protected-Mode Virtual Interrupts.\r
- UINT32 TSD:1; ///< Time Stamp Disable.\r
- UINT32 DE:1; ///< Debugging Extensions.\r
- UINT32 PSE:1; ///< Page Size Extensions.\r
- UINT32 PAE:1; ///< Physical Address Extension.\r
- UINT32 MCE:1; ///< Machine Check Enable.\r
- UINT32 PGE:1; ///< Page Global Enable.\r
- UINT32 PCE:1; ///< Performance Monitoring Counter\r
- ///< Enable.\r
- UINT32 OSFXSR:1; ///< Operating System Support for\r
- ///< FXSAVE and FXRSTOR instructions\r
- UINT32 OSXMMEXCPT:1; ///< Operating System Support for\r
- ///< Unmasked SIMD Floating Point\r
- ///< Exceptions.\r
- UINT32 Reserved_0:2; ///< Reserved.\r
- UINT32 VMXE:1; ///< VMX Enable\r
- UINT32 Reserved_1:18; ///< Reserved.\r
+ UINT32 VME : 1; ///< Virtual-8086 Mode Extensions.\r
+ UINT32 PVI : 1; ///< Protected-Mode Virtual Interrupts.\r
+ UINT32 TSD : 1; ///< Time Stamp Disable.\r
+ UINT32 DE : 1; ///< Debugging Extensions.\r
+ UINT32 PSE : 1; ///< Page Size Extensions.\r
+ UINT32 PAE : 1; ///< Physical Address Extension.\r
+ UINT32 MCE : 1; ///< Machine Check Enable.\r
+ UINT32 PGE : 1; ///< Page Global Enable.\r
+ UINT32 PCE : 1; ///< Performance Monitoring Counter\r
+ ///< Enable.\r
+ UINT32 OSFXSR : 1; ///< Operating System Support for\r
+ ///< FXSAVE and FXRSTOR instructions\r
+ UINT32 OSXMMEXCPT : 1; ///< Operating System Support for\r
+ ///< Unmasked SIMD Floating Point\r
+ ///< Exceptions.\r
+ UINT32 UMIP : 1; ///< User-Mode Instruction Prevention.\r
+ UINT32 LA57 : 1; ///< Linear Address 57bit.\r
+ UINT32 VMXE : 1; ///< VMX Enable.\r
+ UINT32 SMXE : 1; ///< SMX Enable.\r
+ UINT32 Reserved_3 : 1; ///< Reserved.\r
+ UINT32 FSGSBASE : 1; ///< FSGSBASE Enable.\r
+ UINT32 PCIDE : 1; ///< PCID Enable.\r
+ UINT32 OSXSAVE : 1; ///< XSAVE and Processor Extended States Enable.\r
+ UINT32 Reserved_4 : 1; ///< Reserved.\r
+ UINT32 SMEP : 1; ///< SMEP Enable.\r
+ UINT32 SMAP : 1; ///< SMAP Enable.\r
+ UINT32 PKE : 1; ///< Protection-Key Enable.\r
+ UINT32 Reserved_5 : 9; ///< Reserved.\r
} Bits;\r
- UINTN UintN;\r
+ UINTN UintN;\r
} IA32_CR4;\r
\r
///\r
///\r
typedef union {\r
struct {\r
- UINT32 LimitLow:16;\r
- UINT32 BaseLow:16;\r
- UINT32 BaseMid:8;\r
- UINT32 Type:4;\r
- UINT32 S:1;\r
- UINT32 DPL:2;\r
- UINT32 P:1;\r
- UINT32 LimitHigh:4;\r
- UINT32 AVL:1;\r
- UINT32 L:1;\r
- UINT32 DB:1;\r
- UINT32 G:1;\r
- UINT32 BaseHigh:8;\r
+ UINT32 LimitLow : 16;\r
+ UINT32 BaseLow : 16;\r
+ UINT32 BaseMid : 8;\r
+ UINT32 Type : 4;\r
+ UINT32 S : 1;\r
+ UINT32 DPL : 2;\r
+ UINT32 P : 1;\r
+ UINT32 LimitHigh : 4;\r
+ UINT32 AVL : 1;\r
+ UINT32 L : 1;\r
+ UINT32 DB : 1;\r
+ UINT32 G : 1;\r
+ UINT32 BaseHigh : 8;\r
} Bits;\r
- UINT64 Uint64;\r
+ UINT64 Uint64;\r
} IA32_SEGMENT_DESCRIPTOR;\r
\r
///\r
/// Byte packed structure for an IDTR, GDTR, LDTR descriptor.\r
///\r
-#pragma pack (1)\r
+ #pragma pack (1)\r
typedef struct {\r
- UINT16 Limit;\r
- UINTN Base;\r
+ UINT16 Limit;\r
+ UINTN Base;\r
} IA32_DESCRIPTOR;\r
-#pragma pack ()\r
+ #pragma pack ()\r
\r
#define IA32_IDT_GATE_TYPE_TASK 0x85\r
#define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86\r
#define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E\r
#define IA32_IDT_GATE_TYPE_TRAP_32 0x8F\r
\r
+#define IA32_GDT_TYPE_TSS 0x9\r
+#define IA32_GDT_ALIGNMENT 8\r
\r
-#if defined (MDE_CPU_IA32)\r
+ #if defined (MDE_CPU_IA32)\r
///\r
/// Byte packed structure for an IA-32 Interrupt Gate Descriptor.\r
///\r
typedef union {\r
struct {\r
- UINT32 OffsetLow:16; ///< Offset bits 15..0.\r
- UINT32 Selector:16; ///< Selector.\r
- UINT32 Reserved_0:8; ///< Reserved.\r
- UINT32 GateType:8; ///< Gate Type. See #defines above.\r
- UINT32 OffsetHigh:16; ///< Offset bits 31..16.\r
+ UINT32 OffsetLow : 16; ///< Offset bits 15..0.\r
+ UINT32 Selector : 16; ///< Selector.\r
+ UINT32 Reserved_0 : 8; ///< Reserved.\r
+ UINT32 GateType : 8; ///< Gate Type. See #defines above.\r
+ UINT32 OffsetHigh : 16; ///< Offset bits 31..16.\r
} Bits;\r
- UINT64 Uint64;\r
+ UINT64 Uint64;\r
} IA32_IDT_GATE_DESCRIPTOR;\r
\r
-#endif\r
+ #pragma pack (1)\r
+//\r
+// IA32 Task-State Segment Definition\r
+//\r
+typedef struct {\r
+ UINT16 PreviousTaskLink;\r
+ UINT16 Reserved_2;\r
+ UINT32 ESP0;\r
+ UINT16 SS0;\r
+ UINT16 Reserved_10;\r
+ UINT32 ESP1;\r
+ UINT16 SS1;\r
+ UINT16 Reserved_18;\r
+ UINT32 ESP2;\r
+ UINT16 SS2;\r
+ UINT16 Reserved_26;\r
+ UINT32 CR3;\r
+ UINT32 EIP;\r
+ UINT32 EFLAGS;\r
+ UINT32 EAX;\r
+ UINT32 ECX;\r
+ UINT32 EDX;\r
+ UINT32 EBX;\r
+ UINT32 ESP;\r
+ UINT32 EBP;\r
+ UINT32 ESI;\r
+ UINT32 EDI;\r
+ UINT16 ES;\r
+ UINT16 Reserved_74;\r
+ UINT16 CS;\r
+ UINT16 Reserved_78;\r
+ UINT16 SS;\r
+ UINT16 Reserved_82;\r
+ UINT16 DS;\r
+ UINT16 Reserved_86;\r
+ UINT16 FS;\r
+ UINT16 Reserved_90;\r
+ UINT16 GS;\r
+ UINT16 Reserved_94;\r
+ UINT16 LDTSegmentSelector;\r
+ UINT16 Reserved_98;\r
+ UINT16 T;\r
+ UINT16 IOMapBaseAddress;\r
+} IA32_TASK_STATE_SEGMENT;\r
\r
-#if defined (MDE_CPU_X64)\r
+typedef union {\r
+ struct {\r
+ UINT32 LimitLow : 16; ///< Segment Limit 15..00\r
+ UINT32 BaseLow : 16; ///< Base Address 15..00\r
+ UINT32 BaseMid : 8; ///< Base Address 23..16\r
+ UINT32 Type : 4; ///< Type (1 0 B 1)\r
+ UINT32 Reserved_43 : 1; ///< 0\r
+ UINT32 DPL : 2; ///< Descriptor Privilege Level\r
+ UINT32 P : 1; ///< Segment Present\r
+ UINT32 LimitHigh : 4; ///< Segment Limit 19..16\r
+ UINT32 AVL : 1; ///< Available for use by system software\r
+ UINT32 Reserved_52 : 2; ///< 0 0\r
+ UINT32 G : 1; ///< Granularity\r
+ UINT32 BaseHigh : 8; ///< Base Address 31..24\r
+ } Bits;\r
+ UINT64 Uint64;\r
+} IA32_TSS_DESCRIPTOR;\r
+ #pragma pack ()\r
+\r
+ #endif // defined (MDE_CPU_IA32)\r
+\r
+ #if defined (MDE_CPU_X64)\r
///\r
/// Byte packed structure for an x64 Interrupt Gate Descriptor.\r
///\r
typedef union {\r
struct {\r
- UINT32 OffsetLow:16; ///< Offset bits 15..0.\r
- UINT32 Selector:16; ///< Selector.\r
- UINT32 Reserved_0:8; ///< Reserved.\r
- UINT32 GateType:8; ///< Gate Type. See #defines above.\r
- UINT32 OffsetHigh:16; ///< Offset bits 31..16.\r
- UINT32 OffsetUpper:32; ///< Offset bits 63..32.\r
- UINT32 Reserved_1:32; ///< Reserved.\r
+ UINT32 OffsetLow : 16; ///< Offset bits 15..0.\r
+ UINT32 Selector : 16; ///< Selector.\r
+ UINT32 Reserved_0 : 8; ///< Reserved.\r
+ UINT32 GateType : 8; ///< Gate Type. See #defines above.\r
+ UINT32 OffsetHigh : 16; ///< Offset bits 31..16.\r
+ UINT32 OffsetUpper : 32; ///< Offset bits 63..32.\r
+ UINT32 Reserved_1 : 32; ///< Reserved.\r
} Bits;\r
struct {\r
- UINT64 Uint64;\r
- UINT64 Uint64_1;\r
- } Uint128; \r
+ UINT64 Uint64;\r
+ UINT64 Uint64_1;\r
+ } Uint128;\r
} IA32_IDT_GATE_DESCRIPTOR;\r
\r
-#endif\r
+ #pragma pack (1)\r
+//\r
+// IA32 Task-State Segment Definition\r
+//\r
+typedef struct {\r
+ UINT32 Reserved_0;\r
+ UINT64 RSP0;\r
+ UINT64 RSP1;\r
+ UINT64 RSP2;\r
+ UINT64 Reserved_28;\r
+ UINT64 IST[7];\r
+ UINT64 Reserved_92;\r
+ UINT16 Reserved_100;\r
+ UINT16 IOMapBaseAddress;\r
+} IA32_TASK_STATE_SEGMENT;\r
+\r
+typedef union {\r
+ struct {\r
+ UINT32 LimitLow : 16; ///< Segment Limit 15..00\r
+ UINT32 BaseLow : 16; ///< Base Address 15..00\r
+ UINT32 BaseMidl : 8; ///< Base Address 23..16\r
+ UINT32 Type : 4; ///< Type (1 0 B 1)\r
+ UINT32 Reserved_43 : 1; ///< 0\r
+ UINT32 DPL : 2; ///< Descriptor Privilege Level\r
+ UINT32 P : 1; ///< Segment Present\r
+ UINT32 LimitHigh : 4; ///< Segment Limit 19..16\r
+ UINT32 AVL : 1; ///< Available for use by system software\r
+ UINT32 Reserved_52 : 2; ///< 0 0\r
+ UINT32 G : 1; ///< Granularity\r
+ UINT32 BaseMidh : 8; ///< Base Address 31..24\r
+ UINT32 BaseHigh : 32; ///< Base Address 63..32\r
+ UINT32 Reserved_96 : 32; ///< Reserved\r
+ } Bits;\r
+ struct {\r
+ UINT64 Uint64;\r
+ UINT64 Uint64_1;\r
+ } Uint128;\r
+} IA32_TSS_DESCRIPTOR;\r
+ #pragma pack ()\r
+\r
+ #endif // defined (MDE_CPU_X64)\r
\r
///\r
/// Byte packed structure for an FP/SSE/SSE2 context.\r
///\r
typedef struct {\r
- UINT8 Buffer[512];\r
+ UINT8 Buffer[512];\r
} IA32_FX_BUFFER;\r
\r
///\r
/// Structures for the 16-bit real mode thunks.\r
///\r
typedef struct {\r
- UINT32 Reserved1;\r
- UINT32 Reserved2;\r
- UINT32 Reserved3;\r
- UINT32 Reserved4;\r
- UINT8 BL;\r
- UINT8 BH;\r
- UINT16 Reserved5;\r
- UINT8 DL;\r
- UINT8 DH;\r
- UINT16 Reserved6;\r
- UINT8 CL;\r
- UINT8 CH;\r
- UINT16 Reserved7;\r
- UINT8 AL;\r
- UINT8 AH;\r
- UINT16 Reserved8;\r
+ UINT32 Reserved1;\r
+ UINT32 Reserved2;\r
+ UINT32 Reserved3;\r
+ UINT32 Reserved4;\r
+ UINT8 BL;\r
+ UINT8 BH;\r
+ UINT16 Reserved5;\r
+ UINT8 DL;\r
+ UINT8 DH;\r
+ UINT16 Reserved6;\r
+ UINT8 CL;\r
+ UINT8 CH;\r
+ UINT16 Reserved7;\r
+ UINT8 AL;\r
+ UINT8 AH;\r
+ UINT16 Reserved8;\r
} IA32_BYTE_REGS;\r
\r
typedef struct {\r
- UINT16 DI;\r
- UINT16 Reserved1;\r
- UINT16 SI;\r
- UINT16 Reserved2;\r
- UINT16 BP;\r
- UINT16 Reserved3;\r
- UINT16 SP;\r
- UINT16 Reserved4;\r
- UINT16 BX;\r
- UINT16 Reserved5;\r
- UINT16 DX;\r
- UINT16 Reserved6;\r
- UINT16 CX;\r
- UINT16 Reserved7;\r
- UINT16 AX;\r
- UINT16 Reserved8;\r
+ UINT16 DI;\r
+ UINT16 Reserved1;\r
+ UINT16 SI;\r
+ UINT16 Reserved2;\r
+ UINT16 BP;\r
+ UINT16 Reserved3;\r
+ UINT16 SP;\r
+ UINT16 Reserved4;\r
+ UINT16 BX;\r
+ UINT16 Reserved5;\r
+ UINT16 DX;\r
+ UINT16 Reserved6;\r
+ UINT16 CX;\r
+ UINT16 Reserved7;\r
+ UINT16 AX;\r
+ UINT16 Reserved8;\r
} IA32_WORD_REGS;\r
\r
typedef struct {\r
- UINT32 EDI;\r
- UINT32 ESI;\r
- UINT32 EBP;\r
- UINT32 ESP;\r
- UINT32 EBX;\r
- UINT32 EDX;\r
- UINT32 ECX;\r
- UINT32 EAX;\r
- UINT16 DS;\r
- UINT16 ES;\r
- UINT16 FS;\r
- UINT16 GS;\r
- IA32_EFLAGS32 EFLAGS;\r
- UINT32 Eip;\r
- UINT16 CS;\r
- UINT16 SS;\r
+ UINT32 EDI;\r
+ UINT32 ESI;\r
+ UINT32 EBP;\r
+ UINT32 ESP;\r
+ UINT32 EBX;\r
+ UINT32 EDX;\r
+ UINT32 ECX;\r
+ UINT32 EAX;\r
+ UINT16 DS;\r
+ UINT16 ES;\r
+ UINT16 FS;\r
+ UINT16 GS;\r
+ IA32_EFLAGS32 EFLAGS;\r
+ UINT32 Eip;\r
+ UINT16 CS;\r
+ UINT16 SS;\r
} IA32_DWORD_REGS;\r
\r
typedef union {\r
- IA32_DWORD_REGS E;\r
- IA32_WORD_REGS X;\r
- IA32_BYTE_REGS H;\r
+ IA32_DWORD_REGS E;\r
+ IA32_WORD_REGS X;\r
+ IA32_BYTE_REGS H;\r
} IA32_REGISTER_SET;\r
\r
///\r
/// Byte packed structure for an 16-bit real mode thunks.\r
///\r
typedef struct {\r
- IA32_REGISTER_SET *RealModeState;\r
- VOID *RealModeBuffer;\r
- UINT32 RealModeBufferSize;\r
- UINT32 ThunkAttributes;\r
+ IA32_REGISTER_SET *RealModeState;\r
+ VOID *RealModeBuffer;\r
+ UINT32 RealModeBufferSize;\r
+ UINT32 ThunkAttributes;\r
} THUNK_CONTEXT;\r
\r
-#define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001\r
-#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002\r
-#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004\r
+#define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001\r
+#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002\r
+#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004\r
+\r
+///\r
+/// Type definition for representing labels in NASM source code that allow for\r
+/// the patching of immediate operands of IA32 and X64 instructions.\r
+///\r
+/// While the type is technically defined as a function type (note: not a\r
+/// pointer-to-function type), such labels in NASM source code never stand for\r
+/// actual functions, and identifiers declared with this function type should\r
+/// never be called. This is also why the EFIAPI calling convention specifier\r
+/// is missing from the typedef, and why the typedef does not follow the usual\r
+/// edk2 coding style for function (or pointer-to-function) typedefs. The VOID\r
+/// return type and the VOID argument list are merely artifacts.\r
+///\r
+typedef VOID (X86_ASSEMBLY_PATCH_LABEL) (\r
+ VOID\r
+ );\r
\r
/**\r
Retrieves CPUID information.\r
UINT32\r
EFIAPI\r
AsmCpuid (\r
- IN UINT32 Index,\r
- OUT UINT32 *Eax, OPTIONAL\r
- OUT UINT32 *Ebx, OPTIONAL\r
- OUT UINT32 *Ecx, OPTIONAL\r
- OUT UINT32 *Edx OPTIONAL\r
+ IN UINT32 Index,\r
+ OUT UINT32 *Eax OPTIONAL,\r
+ OUT UINT32 *Ebx OPTIONAL,\r
+ OUT UINT32 *Ecx OPTIONAL,\r
+ OUT UINT32 *Edx OPTIONAL\r
);\r
\r
-\r
/**\r
Retrieves CPUID information using an extended leaf identifier.\r
\r
UINT32\r
EFIAPI\r
AsmCpuidEx (\r
- IN UINT32 Index,\r
- IN UINT32 SubIndex,\r
- OUT UINT32 *Eax, OPTIONAL\r
- OUT UINT32 *Ebx, OPTIONAL\r
- OUT UINT32 *Ecx, OPTIONAL\r
- OUT UINT32 *Edx OPTIONAL\r
+ IN UINT32 Index,\r
+ IN UINT32 SubIndex,\r
+ OUT UINT32 *Eax OPTIONAL,\r
+ OUT UINT32 *Ebx OPTIONAL,\r
+ OUT UINT32 *Ecx OPTIONAL,\r
+ OUT UINT32 *Edx OPTIONAL\r
);\r
\r
-\r
/**\r
Set CD bit and clear NW bit of CR0 followed by a WBINVD.\r
\r
VOID\r
);\r
\r
-\r
/**\r
Perform a WBINVD and clear both the CD and NW bits of CR0.\r
\r
VOID\r
);\r
\r
-\r
/**\r
Returns the lower 32-bits of a Machine Specific Register(MSR).\r
\r
UINT32\r
EFIAPI\r
AsmReadMsr32 (\r
- IN UINT32 Index\r
+ IN UINT32 Index\r
);\r
\r
-\r
/**\r
Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.\r
The upper 32-bits of the MSR are set to zero.\r
UINT32\r
EFIAPI\r
AsmWriteMsr32 (\r
- IN UINT32 Index,\r
- IN UINT32 Value\r
+ IN UINT32 Index,\r
+ IN UINT32 Value\r
);\r
\r
-\r
/**\r
Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and\r
writes the result back to the 64-bit MSR.\r
UINT32\r
EFIAPI\r
AsmMsrOr32 (\r
- IN UINT32 Index,\r
- IN UINT32 OrData\r
+ IN UINT32 Index,\r
+ IN UINT32 OrData\r
);\r
\r
-\r
/**\r
Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes\r
the result back to the 64-bit MSR.\r
UINT32\r
EFIAPI\r
AsmMsrAnd32 (\r
- IN UINT32 Index,\r
- IN UINT32 AndData\r
+ IN UINT32 Index,\r
+ IN UINT32 AndData\r
);\r
\r
-\r
/**\r
Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR\r
on the lower 32-bits, and writes the result back to the 64-bit MSR.\r
UINT32\r
EFIAPI\r
AsmMsrAndThenOr32 (\r
- IN UINT32 Index,\r
- IN UINT32 AndData,\r
- IN UINT32 OrData\r
+ IN UINT32 Index,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
);\r
\r
-\r
/**\r
Reads a bit field of an MSR.\r
\r
UINT32\r
EFIAPI\r
AsmMsrBitFieldRead32 (\r
- IN UINT32 Index,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit\r
+ IN UINT32 Index,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
);\r
\r
-\r
/**\r
Writes a bit field to an MSR.\r
\r
Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit\r
field is specified by the StartBit and the EndBit. All other bits in the\r
destination MSR are preserved. The lower 32-bits of the MSR written is\r
- returned. The caller must either guarantee that Index and the data written \r
- is valid, or the caller must set up exception handlers to catch the exceptions. \r
+ returned. The caller must either guarantee that Index and the data written\r
+ is valid, or the caller must set up exception handlers to catch the exceptions.\r
This function is only available on IA-32 and x64.\r
\r
If StartBit is greater than 31, then ASSERT().\r
UINT32\r
EFIAPI\r
AsmMsrBitFieldWrite32 (\r
- IN UINT32 Index,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT32 Value\r
+ IN UINT32 Index,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 Value\r
);\r
\r
-\r
/**\r
Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the\r
result back to the bit field in the 64-bit MSR.\r
UINT32\r
EFIAPI\r
AsmMsrBitFieldOr32 (\r
- IN UINT32 Index,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT32 OrData\r
+ IN UINT32 Index,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 OrData\r
);\r
\r
-\r
/**\r
Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r
result back to the bit field in the 64-bit MSR.\r
UINT32\r
EFIAPI\r
AsmMsrBitFieldAnd32 (\r
- IN UINT32 Index,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT32 AndData\r
+ IN UINT32 Index,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData\r
);\r
\r
-\r
/**\r
Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r
bitwise OR, and writes the result back to the bit field in the\r
UINT32\r
EFIAPI\r
AsmMsrBitFieldAndThenOr32 (\r
- IN UINT32 Index,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT32 AndData,\r
- IN UINT32 OrData\r
+ IN UINT32 Index,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
);\r
\r
-\r
/**\r
Returns a 64-bit Machine Specific Register(MSR).\r
\r
UINT64\r
EFIAPI\r
AsmReadMsr64 (\r
- IN UINT32 Index\r
+ IN UINT32 Index\r
);\r
\r
-\r
/**\r
Writes a 64-bit value to a Machine Specific Register(MSR), and returns the\r
value.\r
UINT64\r
EFIAPI\r
AsmWriteMsr64 (\r
- IN UINT32 Index,\r
- IN UINT64 Value\r
+ IN UINT32 Index,\r
+ IN UINT64 Value\r
);\r
\r
-\r
/**\r
Reads a 64-bit MSR, performs a bitwise OR, and writes the result\r
back to the 64-bit MSR.\r
UINT64\r
EFIAPI\r
AsmMsrOr64 (\r
- IN UINT32 Index,\r
- IN UINT64 OrData\r
+ IN UINT32 Index,\r
+ IN UINT64 OrData\r
);\r
\r
-\r
/**\r
Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the\r
64-bit MSR.\r
UINT64\r
EFIAPI\r
AsmMsrAnd64 (\r
- IN UINT32 Index,\r
- IN UINT64 AndData\r
+ IN UINT32 Index,\r
+ IN UINT64 AndData\r
);\r
\r
-\r
/**\r
- Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise \r
+ Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise\r
OR, and writes the result back to the 64-bit MSR.\r
\r
Reads the 64-bit MSR specified by Index, performs a bitwise AND between read\r
UINT64\r
EFIAPI\r
AsmMsrAndThenOr64 (\r
- IN UINT32 Index,\r
- IN UINT64 AndData,\r
- IN UINT64 OrData\r
+ IN UINT32 Index,\r
+ IN UINT64 AndData,\r
+ IN UINT64 OrData\r
);\r
\r
-\r
/**\r
Reads a bit field of an MSR.\r
\r
UINT64\r
EFIAPI\r
AsmMsrBitFieldRead64 (\r
- IN UINT32 Index,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit\r
+ IN UINT32 Index,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
);\r
\r
-\r
/**\r
Writes a bit field to an MSR.\r
\r
Writes Value to a bit field in a 64-bit MSR. The bit field is specified by\r
the StartBit and the EndBit. All other bits in the destination MSR are\r
- preserved. The MSR written is returned. The caller must either guarantee \r
- that Index and the data written is valid, or the caller must set up exception \r
+ preserved. The MSR written is returned. The caller must either guarantee\r
+ that Index and the data written is valid, or the caller must set up exception\r
handlers to catch the exceptions. This function is only available on IA-32 and x64.\r
\r
If StartBit is greater than 63, then ASSERT().\r
UINT64\r
EFIAPI\r
AsmMsrBitFieldWrite64 (\r
- IN UINT32 Index,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT64 Value\r
+ IN UINT32 Index,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT64 Value\r
);\r
\r
-\r
/**\r
Reads a bit field in a 64-bit MSR, performs a bitwise OR, and\r
writes the result back to the bit field in the 64-bit MSR.\r
UINT64\r
EFIAPI\r
AsmMsrBitFieldOr64 (\r
- IN UINT32 Index,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT64 OrData\r
+ IN UINT32 Index,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT64 OrData\r
);\r
\r
-\r
/**\r
Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r
result back to the bit field in the 64-bit MSR.\r
UINT64\r
EFIAPI\r
AsmMsrBitFieldAnd64 (\r
- IN UINT32 Index,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT64 AndData\r
+ IN UINT32 Index,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT64 AndData\r
);\r
\r
-\r
/**\r
Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r
bitwise OR, and writes the result back to the bit field in the\r
UINT64\r
EFIAPI\r
AsmMsrBitFieldAndThenOr64 (\r
- IN UINT32 Index,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN UINT64 AndData,\r
- IN UINT64 OrData\r
+ IN UINT32 Index,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT64 AndData,\r
+ IN UINT64 OrData\r
);\r
\r
-\r
/**\r
Reads the current value of the EFLAGS register.\r
\r
VOID\r
);\r
\r
-\r
/**\r
Reads the current value of the Control Register 0 (CR0).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Reads the current value of the Control Register 2 (CR2).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Reads the current value of the Control Register 3 (CR3).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Reads the current value of the Control Register 4 (CR4).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Writes a value to Control Register 0 (CR0).\r
\r
UINTN Cr0\r
);\r
\r
-\r
/**\r
Writes a value to Control Register 2 (CR2).\r
\r
UINTN Cr2\r
);\r
\r
-\r
/**\r
Writes a value to Control Register 3 (CR3).\r
\r
UINTN Cr3\r
);\r
\r
-\r
/**\r
Writes a value to Control Register 4 (CR4).\r
\r
UINTN Cr4\r
);\r
\r
-\r
/**\r
Reads the current value of Debug Register 0 (DR0).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Reads the current value of Debug Register 1 (DR1).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Reads the current value of Debug Register 2 (DR2).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Reads the current value of Debug Register 3 (DR3).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Reads the current value of Debug Register 4 (DR4).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Reads the current value of Debug Register 5 (DR5).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Reads the current value of Debug Register 6 (DR6).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Reads the current value of Debug Register 7 (DR7).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Writes a value to Debug Register 0 (DR0).\r
\r
UINTN Dr0\r
);\r
\r
-\r
/**\r
Writes a value to Debug Register 1 (DR1).\r
\r
UINTN Dr1\r
);\r
\r
-\r
/**\r
Writes a value to Debug Register 2 (DR2).\r
\r
UINTN Dr2\r
);\r
\r
-\r
/**\r
Writes a value to Debug Register 3 (DR3).\r
\r
UINTN Dr3\r
);\r
\r
-\r
/**\r
Writes a value to Debug Register 4 (DR4).\r
\r
UINTN Dr4\r
);\r
\r
-\r
/**\r
Writes a value to Debug Register 5 (DR5).\r
\r
UINTN Dr5\r
);\r
\r
-\r
/**\r
Writes a value to Debug Register 6 (DR6).\r
\r
UINTN Dr6\r
);\r
\r
-\r
/**\r
Writes a value to Debug Register 7 (DR7).\r
\r
UINTN Dr7\r
);\r
\r
-\r
/**\r
Reads the current value of Code Segment Register (CS).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Reads the current value of Data Segment Register (DS).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Reads the current value of Extra Segment Register (ES).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Reads the current value of FS Data Segment Register (FS).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Reads the current value of GS Data Segment Register (GS).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Reads the current value of Stack Segment Register (SS).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Reads the current value of Task Register (TR).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Reads the current Global Descriptor Table Register(GDTR) descriptor.\r
\r
VOID\r
EFIAPI\r
AsmReadGdtr (\r
- OUT IA32_DESCRIPTOR *Gdtr\r
+ OUT IA32_DESCRIPTOR *Gdtr\r
);\r
\r
-\r
/**\r
Writes the current Global Descriptor Table Register (GDTR) descriptor.\r
\r
VOID\r
EFIAPI\r
AsmWriteGdtr (\r
- IN CONST IA32_DESCRIPTOR *Gdtr\r
+ IN CONST IA32_DESCRIPTOR *Gdtr\r
);\r
\r
-\r
/**\r
Reads the current Interrupt Descriptor Table Register(IDTR) descriptor.\r
\r
VOID\r
EFIAPI\r
AsmReadIdtr (\r
- OUT IA32_DESCRIPTOR *Idtr\r
+ OUT IA32_DESCRIPTOR *Idtr\r
);\r
\r
-\r
/**\r
Writes the current Interrupt Descriptor Table Register(IDTR) descriptor.\r
\r
VOID\r
EFIAPI\r
AsmWriteIdtr (\r
- IN CONST IA32_DESCRIPTOR *Idtr\r
+ IN CONST IA32_DESCRIPTOR *Idtr\r
);\r
\r
-\r
/**\r
Reads the current Local Descriptor Table Register(LDTR) selector.\r
\r
VOID\r
);\r
\r
-\r
/**\r
Writes the current Local Descriptor Table Register (LDTR) selector.\r
\r
VOID\r
EFIAPI\r
AsmWriteLdtr (\r
- IN UINT16 Ldtr\r
+ IN UINT16 Ldtr\r
);\r
\r
-\r
/**\r
Save the current floating point/SSE/SSE2 context to a buffer.\r
\r
VOID\r
EFIAPI\r
AsmFxSave (\r
- OUT IA32_FX_BUFFER *Buffer\r
+ OUT IA32_FX_BUFFER *Buffer\r
);\r
\r
-\r
/**\r
Restores the current floating point/SSE/SSE2 context from a buffer.\r
\r
VOID\r
EFIAPI\r
AsmFxRestore (\r
- IN CONST IA32_FX_BUFFER *Buffer\r
+ IN CONST IA32_FX_BUFFER *Buffer\r
);\r
\r
-\r
/**\r
Reads the current value of 64-bit MMX Register #0 (MM0).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Reads the current value of 64-bit MMX Register #1 (MM1).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Reads the current value of 64-bit MMX Register #2 (MM2).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Reads the current value of 64-bit MMX Register #3 (MM3).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Reads the current value of 64-bit MMX Register #4 (MM4).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Reads the current value of 64-bit MMX Register #5 (MM5).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Reads the current value of 64-bit MMX Register #6 (MM6).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Reads the current value of 64-bit MMX Register #7 (MM7).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Writes the current value of 64-bit MMX Register #0 (MM0).\r
\r
VOID\r
EFIAPI\r
AsmWriteMm0 (\r
- IN UINT64 Value\r
+ IN UINT64 Value\r
);\r
\r
-\r
/**\r
Writes the current value of 64-bit MMX Register #1 (MM1).\r
\r
VOID\r
EFIAPI\r
AsmWriteMm1 (\r
- IN UINT64 Value\r
+ IN UINT64 Value\r
);\r
\r
-\r
/**\r
Writes the current value of 64-bit MMX Register #2 (MM2).\r
\r
VOID\r
EFIAPI\r
AsmWriteMm2 (\r
- IN UINT64 Value\r
+ IN UINT64 Value\r
);\r
\r
-\r
/**\r
Writes the current value of 64-bit MMX Register #3 (MM3).\r
\r
VOID\r
EFIAPI\r
AsmWriteMm3 (\r
- IN UINT64 Value\r
+ IN UINT64 Value\r
);\r
\r
-\r
/**\r
Writes the current value of 64-bit MMX Register #4 (MM4).\r
\r
VOID\r
EFIAPI\r
AsmWriteMm4 (\r
- IN UINT64 Value\r
+ IN UINT64 Value\r
);\r
\r
-\r
/**\r
Writes the current value of 64-bit MMX Register #5 (MM5).\r
\r
VOID\r
EFIAPI\r
AsmWriteMm5 (\r
- IN UINT64 Value\r
+ IN UINT64 Value\r
);\r
\r
-\r
/**\r
Writes the current value of 64-bit MMX Register #6 (MM6).\r
\r
VOID\r
EFIAPI\r
AsmWriteMm6 (\r
- IN UINT64 Value\r
+ IN UINT64 Value\r
);\r
\r
-\r
/**\r
Writes the current value of 64-bit MMX Register #7 (MM7).\r
\r
VOID\r
EFIAPI\r
AsmWriteMm7 (\r
- IN UINT64 Value\r
+ IN UINT64 Value\r
);\r
\r
-\r
/**\r
Reads the current value of Time Stamp Counter (TSC).\r
\r
VOID\r
);\r
\r
-\r
/**\r
Reads the current value of a Performance Counter (PMC).\r
\r
UINT64\r
EFIAPI\r
AsmReadPmc (\r
- IN UINT32 Index\r
+ IN UINT32 Index\r
);\r
\r
-\r
/**\r
Sets up a monitor buffer that is used by AsmMwait().\r
\r
UINTN\r
EFIAPI\r
AsmMonitor (\r
- IN UINTN Eax,\r
- IN UINTN Ecx,\r
- IN UINTN Edx\r
+ IN UINTN Eax,\r
+ IN UINTN Ecx,\r
+ IN UINTN Edx\r
);\r
\r
-\r
/**\r
Executes an MWAIT instruction.\r
\r
UINTN\r
EFIAPI\r
AsmMwait (\r
- IN UINTN Eax,\r
- IN UINTN Ecx\r
+ IN UINTN Eax,\r
+ IN UINTN Ecx\r
);\r
\r
-\r
/**\r
Executes a WBINVD instruction.\r
\r
VOID\r
);\r
\r
-\r
/**\r
Executes a INVD instruction.\r
\r
VOID\r
);\r
\r
-\r
/**\r
Flushes a cache line from all the instruction and data caches within the\r
coherency domain of the CPU.\r
VOID *\r
EFIAPI\r
AsmFlushCacheLine (\r
- IN VOID *LinearAddress\r
+ IN VOID *LinearAddress\r
);\r
\r
-\r
/**\r
Enables the 32-bit paging mode on the CPU.\r
\r
EFIAPI\r
AsmEnablePaging32 (\r
IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r
- IN VOID *Context1, OPTIONAL\r
- IN VOID *Context2, OPTIONAL\r
+ IN VOID *Context1 OPTIONAL,\r
+ IN VOID *Context2 OPTIONAL,\r
IN VOID *NewStack\r
);\r
\r
-\r
/**\r
Disables the 32-bit paging mode on the CPU.\r
\r
EFIAPI\r
AsmDisablePaging32 (\r
IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r
- IN VOID *Context1, OPTIONAL\r
- IN VOID *Context2, OPTIONAL\r
+ IN VOID *Context1 OPTIONAL,\r
+ IN VOID *Context2 OPTIONAL,\r
IN VOID *NewStack\r
);\r
\r
-\r
/**\r
Enables the 64-bit paging mode on the CPU.\r
\r
VOID\r
EFIAPI\r
AsmEnablePaging64 (\r
- IN UINT16 Cs,\r
- IN UINT64 EntryPoint,\r
- IN UINT64 Context1, OPTIONAL\r
- IN UINT64 Context2, OPTIONAL\r
- IN UINT64 NewStack\r
+ IN UINT16 Cs,\r
+ IN UINT64 EntryPoint,\r
+ IN UINT64 Context1 OPTIONAL,\r
+ IN UINT64 Context2 OPTIONAL,\r
+ IN UINT64 NewStack\r
);\r
\r
-\r
/**\r
Disables the 64-bit paging mode on the CPU.\r
\r
VOID\r
EFIAPI\r
AsmDisablePaging64 (\r
- IN UINT16 Cs,\r
- IN UINT32 EntryPoint,\r
- IN UINT32 Context1, OPTIONAL\r
- IN UINT32 Context2, OPTIONAL\r
- IN UINT32 NewStack\r
+ IN UINT16 Cs,\r
+ IN UINT32 EntryPoint,\r
+ IN UINT32 Context1 OPTIONAL,\r
+ IN UINT32 Context2 OPTIONAL,\r
+ IN UINT32 NewStack\r
);\r
\r
-\r
//\r
// 16-bit thunking services\r
//\r
in ExtraStackSize. If parameters are passed to the 16-bit real mode code,\r
then the actual minimum stack size is ExtraStackSize plus the maximum number\r
of bytes that need to be passed to the 16-bit real mode code.\r
- \r
+\r
If RealModeBufferSize is NULL, then ASSERT().\r
If ExtraStackSize is NULL, then ASSERT().\r
\r
VOID\r
EFIAPI\r
AsmGetThunk16Properties (\r
- OUT UINT32 *RealModeBufferSize,\r
- OUT UINT32 *ExtraStackSize\r
+ OUT UINT32 *RealModeBufferSize,\r
+ OUT UINT32 *ExtraStackSize\r
);\r
\r
-\r
/**\r
Prepares all structures a code required to use AsmThunk16().\r
\r
Prepares all structures and code required to use AsmThunk16().\r
- \r
+\r
This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r
virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.\r
\r
VOID\r
EFIAPI\r
AsmPrepareThunk16 (\r
- IN OUT THUNK_CONTEXT *ThunkContext\r
+ IN OUT THUNK_CONTEXT *ThunkContext\r
);\r
\r
-\r
/**\r
Transfers control to a 16-bit real mode entry point and returns the results.\r
\r
AsmPrepareThunk16() must be called with ThunkContext before this function is used.\r
This function must be called with interrupts disabled.\r
\r
- The register state from the RealModeState field of ThunkContext is restored just prior \r
- to calling the 16-bit real mode entry point. This includes the EFLAGS field of RealModeState, \r
+ The register state from the RealModeState field of ThunkContext is restored just prior\r
+ to calling the 16-bit real mode entry point. This includes the EFLAGS field of RealModeState,\r
which is used to set the interrupt state when a 16-bit real mode entry point is called.\r
Control is transferred to the 16-bit real mode entry point specified by the CS and Eip fields of RealModeState.\r
- The stack is initialized to the SS and ESP fields of RealModeState. Any parameters passed to \r
- the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function. \r
+ The stack is initialized to the SS and ESP fields of RealModeState. Any parameters passed to\r
+ the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function.\r
The 16-bit real mode entry point is invoked with a 16-bit CALL FAR instruction,\r
- so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment \r
- and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry \r
- point must exit with a RETF instruction. The register state is captured into RealModeState immediately \r
+ so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment\r
+ and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry\r
+ point must exit with a RETF instruction. The register state is captured into RealModeState immediately\r
after the RETF instruction is executed.\r
- \r
- If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, \r
- or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure \r
- the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode. \r
- \r
- If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, \r
- then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode. \r
+\r
+ If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,\r
+ or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure\r
+ the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode.\r
+\r
+ If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,\r
+ then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode.\r
This includes the base vectors, the interrupt masks, and the edge/level trigger mode.\r
- \r
- If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code \r
+\r
+ If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code\r
is invoked in big real mode. Otherwise, the user code is invoked in 16-bit real mode with 64KB segment limits.\r
- \r
- If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in \r
- ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to \r
+\r
+ If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in\r
+ ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to\r
disable the A20 mask.\r
- \r
- If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in \r
- ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask. If this INT 15 call fails, \r
+\r
+ If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in\r
+ ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask. If this INT 15 call fails,\r
then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.\r
- \r
- If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in \r
+\r
+ If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in\r
ThunkAttributes, then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.\r
- \r
+\r
If ThunkContext is NULL, then ASSERT().\r
If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().\r
- If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in \r
+ If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in\r
ThunkAttributes, then ASSERT().\r
\r
This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r
VOID\r
EFIAPI\r
AsmThunk16 (\r
- IN OUT THUNK_CONTEXT *ThunkContext\r
+ IN OUT THUNK_CONTEXT *ThunkContext\r
);\r
\r
-\r
/**\r
Prepares all structures and code for a 16-bit real mode thunk, transfers\r
control to a 16-bit real mode entry point, and returns the results.\r
VOID\r
EFIAPI\r
AsmPrepareAndThunk16 (\r
- IN OUT THUNK_CONTEXT *ThunkContext\r
+ IN OUT THUNK_CONTEXT *ThunkContext\r
);\r
\r
/**\r
BOOLEAN\r
EFIAPI\r
AsmRdRand16 (\r
- OUT UINT16 *Rand\r
+ OUT UINT16 *Rand\r
);\r
\r
/**\r
BOOLEAN\r
EFIAPI\r
AsmRdRand32 (\r
- OUT UINT32 *Rand\r
+ OUT UINT32 *Rand\r
);\r
\r
/**\r
BOOLEAN\r
EFIAPI\r
AsmRdRand64 (\r
- OUT UINT64 *Rand\r
+ OUT UINT64 *Rand\r
);\r
\r
-#endif\r
-#endif\r
+/**\r
+ Load given selector into TR register.\r
+\r
+ @param[in] Selector Task segment selector\r
+**/\r
+VOID\r
+EFIAPI\r
+AsmWriteTr (\r
+ IN UINT16 Selector\r
+ );\r
+\r
+/**\r
+ Performs a serializing operation on all load-from-memory instructions that\r
+ were issued prior the AsmLfence function.\r
+\r
+ Executes a LFENCE instruction. This function is only available on IA-32 and x64.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+AsmLfence (\r
+ VOID\r
+ );\r
+\r
+/**\r
+ Executes a XGETBV instruction\r
+\r
+ Executes a XGETBV instruction. This function is only available on IA-32 and\r
+ x64.\r
+\r
+ @param[in] Index Extended control register index\r
+\r
+ @return The current value of the extended control register\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmXGetBv (\r
+ IN UINT32 Index\r
+ );\r
+\r
+/**\r
+ Executes a XSETBV instruction to write a 64-bit value to a Extended Control\r
+ Register(XCR), and returns the value.\r
+\r
+ Writes the 64-bit value specified by Value to the XCR specified by Index. The\r
+ 64-bit value written to the XCR is returned. No parameter checking is\r
+ performed on Index or Value, and some of these may cause CPU exceptions. The\r
+ caller must either guarantee that Index and Value are valid, or the caller\r
+ must establish proper exception handlers. This function is only available on\r
+ IA-32 and x64.\r
\r
+ @param Index The 32-bit XCR index to write.\r
+ @param Value The 64-bit value to write to the XCR.\r
+\r
+ @return Value\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmXSetBv (\r
+ IN UINT32 Index,\r
+ IN UINT64 Value\r
+ );\r
+\r
+/**\r
+ Executes a VMGEXIT instruction (VMMCALL with a REP prefix)\r
+\r
+ Executes a VMGEXIT instruction. This function is only available on IA-32 and\r
+ x64.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+AsmVmgExit (\r
+ VOID\r
+ );\r
+\r
+/**\r
+ Patch the immediate operand of an IA32 or X64 instruction such that the byte,\r
+ word, dword or qword operand is encoded at the end of the instruction's\r
+ binary representation.\r
+\r
+ This function should be used to update object code that was compiled with\r
+ NASM from assembly source code. Example:\r
+\r
+ NASM source code:\r
+\r
+ mov eax, strict dword 0 ; the imm32 zero operand will be patched\r
+ ASM_PFX(gPatchCr3):\r
+ mov cr3, eax\r
+\r
+ C source code:\r
+\r
+ X86_ASSEMBLY_PATCH_LABEL gPatchCr3;\r
+ PatchInstructionX86 (gPatchCr3, AsmReadCr3 (), 4);\r
+\r
+ @param[out] InstructionEnd Pointer right past the instruction to patch. The\r
+ immediate operand to patch is expected to\r
+ comprise the trailing bytes of the instruction.\r
+ If InstructionEnd is closer to address 0 than\r
+ ValueSize permits, then ASSERT().\r
+\r
+ @param[in] PatchValue The constant to write to the immediate operand.\r
+ The caller is responsible for ensuring that\r
+ PatchValue can be represented in the byte, word,\r
+ dword or qword operand (as indicated through\r
+ ValueSize); otherwise ASSERT().\r
+\r
+ @param[in] ValueSize The size of the operand in bytes; must be 1, 2,\r
+ 4, or 8. ASSERT() otherwise.\r
+**/\r
+VOID\r
+EFIAPI\r
+PatchInstructionX86 (\r
+ OUT X86_ASSEMBLY_PATCH_LABEL *InstructionEnd,\r
+ IN UINT64 PatchValue,\r
+ IN UINTN ValueSize\r
+ );\r
\r
+#endif // defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)\r
+#endif // !defined (__BASE_LIB__)\r
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