MdePkg: Replace BSD License with BSD+Patent License

[mirror_edk2.git] / MdePkg / Include / Library / CpuLib.h

diff --git a/MdePkg/Include/Library/CpuLib.h b/MdePkg/Include/Library/CpuLib.h
index d79c002cc0d28c4f6aeb204912068939c6cb6fef..3187d736b72e4f3033085f18b8f2ef3d2f6fe9ba 100644 (file)
--- a/MdePkg/Include/Library/CpuLib.h
+++ b/MdePkg/Include/Library/CpuLib.h
@@ -1,20 +1,45 @@
 /** @file\r
-       Library that provides processor specific library services\r
+  Provides CPU architecture specific functions that can not be defined\r
+  in the Base Library due to dependencies on the PAL Library\r
 \r
-       Copyright (c) 2006, Intel Corporation                                                         \r
-       All rights reserved. This program and the accompanying materials                          \r
-       are licensed and made available under the terms and conditions of the BSD License         \r
-       which accompanies this distribution.  The full text of the license may be found at        \r
-       http://opensource.org/licenses/bsd-license.php                                            \r
+  The CPU Library provides services to flush CPU TLBs and place the CPU in a sleep state.\r
+  The implementation of these services on Itanium processors requires the use of PAL Calls.\r
+  PAL Calls require PEI and DXE specific mechanisms to look up PAL Entry Point.\r
+  As a result, these services could not be defined in the Base Library.\r
 \r
-       THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
-       WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
-\r
-       Module Name:    CpuLib.h\r
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
+SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
 \r
 #ifndef __CPU_LIB_H__\r
 #define __CPU_LIB_H__\r
 \r
-#endif
\ No newline at end of file
+/**\r
+  Places the CPU in a sleep state until an interrupt is received.\r
+\r
+  Places the CPU in a sleep state until an interrupt is received. If interrupts\r
+  are disabled prior to calling this function, then the CPU will be placed in a\r
+  sleep state indefinitely.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+CpuSleep (\r
+  VOID\r
+  );\r
+\r
+/**\r
+  Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.\r
+\r
+  Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+CpuFlushTlb (\r
+  VOID\r
+  );\r
+\r
+\r
+#endif\r