UefiCpuPkg: Move AsmRelocateApLoopStart from Mpfuncs.nasm to AmdSev.nasm

[mirror_edk2.git] / MdePkg / Include / Library / PciCf8Lib.h

diff --git a/MdePkg/Include/Library/PciCf8Lib.h b/MdePkg/Include/Library/PciCf8Lib.h
index 3aafe5a9bb7dfb284d98db97029a235f3652177b..05b5fddef508341efad4f2db7b1705dae3922753 100644 (file)
--- a/MdePkg/Include/Library/PciCf8Lib.h
+++ b/MdePkg/Include/Library/PciCf8Lib.h
@@ -6,20 +6,13 @@
   access to PCI Segment #0.\r
 \r
 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution.  The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
 \r
 #ifndef __PCI_CF8_LIB_H__\r
 #define __PCI_CF8_LIB_H__\r
 \r
-\r
 /**\r
   Macro that converts PCI Bus, PCI Device, PCI Function and PCI Register to an\r
   address that can be passed to the PCI Library functions.\r
@@ -36,7 +29,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
   @return The encode PCI address.\r
 \r
 **/\r
-#define PCI_CF8_LIB_ADDRESS(Bus,Device,Function,Offset) \\r
+#define PCI_CF8_LIB_ADDRESS(Bus, Device, Function, Offset) \\r
   (((Offset) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20))\r
 \r
 /**\r
@@ -86,7 +79,7 @@ PciCf8RegisterForRuntimeAccess (
 UINT8\r
 EFIAPI\r
 PciCf8Read8 (\r
-  IN      UINTN                     Address\r
+  IN      UINTN  Address\r
   );\r
 \r
 /**\r
@@ -109,8 +102,8 @@ PciCf8Read8 (
 UINT8\r
 EFIAPI\r
 PciCf8Write8 (\r
-  IN      UINTN                     Address,\r
-  IN      UINT8                     Value\r
+  IN      UINTN  Address,\r
+  IN      UINT8  Value\r
   );\r
 \r
 /**\r
@@ -137,8 +130,8 @@ PciCf8Write8 (
 UINT8\r
 EFIAPI\r
 PciCf8Or8 (\r
-  IN      UINTN                     Address,\r
-  IN      UINT8                     OrData\r
+  IN      UINTN  Address,\r
+  IN      UINT8  OrData\r
   );\r
 \r
 /**\r
@@ -165,8 +158,8 @@ PciCf8Or8 (
 UINT8\r
 EFIAPI\r
 PciCf8And8 (\r
-  IN      UINTN                     Address,\r
-  IN      UINT8                     AndData\r
+  IN      UINTN  Address,\r
+  IN      UINT8  AndData\r
   );\r
 \r
 /**\r
@@ -195,9 +188,9 @@ PciCf8And8 (
 UINT8\r
 EFIAPI\r
 PciCf8AndThenOr8 (\r
-  IN      UINTN                     Address,\r
-  IN      UINT8                     AndData,\r
-  IN      UINT8                     OrData\r
+  IN      UINTN  Address,\r
+  IN      UINT8  AndData,\r
+  IN      UINT8  OrData\r
   );\r
 \r
 /**\r
@@ -225,9 +218,9 @@ PciCf8AndThenOr8 (
 UINT8\r
 EFIAPI\r
 PciCf8BitFieldRead8 (\r
-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit\r
+  IN      UINTN  Address,\r
+  IN      UINTN  StartBit,\r
+  IN      UINTN  EndBit\r
   );\r
 \r
 /**\r
@@ -258,10 +251,10 @@ PciCf8BitFieldRead8 (
 UINT8\r
 EFIAPI\r
 PciCf8BitFieldWrite8 (\r
-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit,\r
-  IN      UINT8                     Value\r
+  IN      UINTN  Address,\r
+  IN      UINTN  StartBit,\r
+  IN      UINTN  EndBit,\r
+  IN      UINT8  Value\r
   );\r
 \r
 /**\r
@@ -295,10 +288,10 @@ PciCf8BitFieldWrite8 (
 UINT8\r
 EFIAPI\r
 PciCf8BitFieldOr8 (\r
-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit,\r
-  IN      UINT8                     OrData\r
+  IN      UINTN  Address,\r
+  IN      UINTN  StartBit,\r
+  IN      UINTN  EndBit,\r
+  IN      UINT8  OrData\r
   );\r
 \r
 /**\r
@@ -332,10 +325,10 @@ PciCf8BitFieldOr8 (
 UINT8\r
 EFIAPI\r
 PciCf8BitFieldAnd8 (\r
-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit,\r
-  IN      UINT8                     AndData\r
+  IN      UINTN  Address,\r
+  IN      UINTN  StartBit,\r
+  IN      UINTN  EndBit,\r
+  IN      UINT8  AndData\r
   );\r
 \r
 /**\r
@@ -373,11 +366,11 @@ PciCf8BitFieldAnd8 (
 UINT8\r
 EFIAPI\r
 PciCf8BitFieldAndThenOr8 (\r
-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit,\r
-  IN      UINT8                     AndData,\r
-  IN      UINT8                     OrData\r
+  IN      UINTN  Address,\r
+  IN      UINTN  StartBit,\r
+  IN      UINTN  EndBit,\r
+  IN      UINT8  AndData,\r
+  IN      UINT8  OrData\r
   );\r
 \r
 /**\r
@@ -400,7 +393,7 @@ PciCf8BitFieldAndThenOr8 (
 UINT16\r
 EFIAPI\r
 PciCf8Read16 (\r
-  IN      UINTN                     Address\r
+  IN      UINTN  Address\r
   );\r
 \r
 /**\r
@@ -424,8 +417,8 @@ PciCf8Read16 (
 UINT16\r
 EFIAPI\r
 PciCf8Write16 (\r
-  IN      UINTN                     Address,\r
-  IN      UINT16                    Value\r
+  IN      UINTN   Address,\r
+  IN      UINT16  Value\r
   );\r
 \r
 /**\r
@@ -453,8 +446,8 @@ PciCf8Write16 (
 UINT16\r
 EFIAPI\r
 PciCf8Or16 (\r
-  IN      UINTN                     Address,\r
-  IN      UINT16                    OrData\r
+  IN      UINTN   Address,\r
+  IN      UINT16  OrData\r
   );\r
 \r
 /**\r
@@ -482,8 +475,8 @@ PciCf8Or16 (
 UINT16\r
 EFIAPI\r
 PciCf8And16 (\r
-  IN      UINTN                     Address,\r
-  IN      UINT16                    AndData\r
+  IN      UINTN   Address,\r
+  IN      UINT16  AndData\r
   );\r
 \r
 /**\r
@@ -513,9 +506,9 @@ PciCf8And16 (
 UINT16\r
 EFIAPI\r
 PciCf8AndThenOr16 (\r
-  IN      UINTN                     Address,\r
-  IN      UINT16                    AndData,\r
-  IN      UINT16                    OrData\r
+  IN      UINTN   Address,\r
+  IN      UINT16  AndData,\r
+  IN      UINT16  OrData\r
   );\r
 \r
 /**\r
@@ -544,9 +537,9 @@ PciCf8AndThenOr16 (
 UINT16\r
 EFIAPI\r
 PciCf8BitFieldRead16 (\r
-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit\r
+  IN      UINTN  Address,\r
+  IN      UINTN  StartBit,\r
+  IN      UINTN  EndBit\r
   );\r
 \r
 /**\r
@@ -578,10 +571,10 @@ PciCf8BitFieldRead16 (
 UINT16\r
 EFIAPI\r
 PciCf8BitFieldWrite16 (\r
-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit,\r
-  IN      UINT16                    Value\r
+  IN      UINTN   Address,\r
+  IN      UINTN   StartBit,\r
+  IN      UINTN   EndBit,\r
+  IN      UINT16  Value\r
   );\r
 \r
 /**\r
@@ -616,10 +609,10 @@ PciCf8BitFieldWrite16 (
 UINT16\r
 EFIAPI\r
 PciCf8BitFieldOr16 (\r
-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit,\r
-  IN      UINT16                    OrData\r
+  IN      UINTN   Address,\r
+  IN      UINTN   StartBit,\r
+  IN      UINTN   EndBit,\r
+  IN      UINT16  OrData\r
   );\r
 \r
 /**\r
@@ -654,10 +647,10 @@ PciCf8BitFieldOr16 (
 UINT16\r
 EFIAPI\r
 PciCf8BitFieldAnd16 (\r
-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit,\r
-  IN      UINT16                    AndData\r
+  IN      UINTN   Address,\r
+  IN      UINTN   StartBit,\r
+  IN      UINTN   EndBit,\r
+  IN      UINT16  AndData\r
   );\r
 \r
 /**\r
@@ -696,11 +689,11 @@ PciCf8BitFieldAnd16 (
 UINT16\r
 EFIAPI\r
 PciCf8BitFieldAndThenOr16 (\r
-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit,\r
-  IN      UINT16                    AndData,\r
-  IN      UINT16                    OrData\r
+  IN      UINTN   Address,\r
+  IN      UINTN   StartBit,\r
+  IN      UINTN   EndBit,\r
+  IN      UINT16  AndData,\r
+  IN      UINT16  OrData\r
   );\r
 \r
 /**\r
@@ -723,7 +716,7 @@ PciCf8BitFieldAndThenOr16 (
 UINT32\r
 EFIAPI\r
 PciCf8Read32 (\r
-  IN      UINTN                     Address\r
+  IN      UINTN  Address\r
   );\r
 \r
 /**\r
@@ -747,8 +740,8 @@ PciCf8Read32 (
 UINT32\r
 EFIAPI\r
 PciCf8Write32 (\r
-  IN      UINTN                     Address,\r
-  IN      UINT32                    Value\r
+  IN      UINTN   Address,\r
+  IN      UINT32  Value\r
   );\r
 \r
 /**\r
@@ -776,8 +769,8 @@ PciCf8Write32 (
 UINT32\r
 EFIAPI\r
 PciCf8Or32 (\r
-  IN      UINTN                     Address,\r
-  IN      UINT32                    OrData\r
+  IN      UINTN   Address,\r
+  IN      UINT32  OrData\r
   );\r
 \r
 /**\r
@@ -805,8 +798,8 @@ PciCf8Or32 (
 UINT32\r
 EFIAPI\r
 PciCf8And32 (\r
-  IN      UINTN                     Address,\r
-  IN      UINT32                    AndData\r
+  IN      UINTN   Address,\r
+  IN      UINT32  AndData\r
   );\r
 \r
 /**\r
@@ -836,9 +829,9 @@ PciCf8And32 (
 UINT32\r
 EFIAPI\r
 PciCf8AndThenOr32 (\r
-  IN      UINTN                     Address,\r
-  IN      UINT32                    AndData,\r
-  IN      UINT32                    OrData\r
+  IN      UINTN   Address,\r
+  IN      UINT32  AndData,\r
+  IN      UINT32  OrData\r
   );\r
 \r
 /**\r
@@ -867,9 +860,9 @@ PciCf8AndThenOr32 (
 UINT32\r
 EFIAPI\r
 PciCf8BitFieldRead32 (\r
-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit\r
+  IN      UINTN  Address,\r
+  IN      UINTN  StartBit,\r
+  IN      UINTN  EndBit\r
   );\r
 \r
 /**\r
@@ -901,10 +894,10 @@ PciCf8BitFieldRead32 (
 UINT32\r
 EFIAPI\r
 PciCf8BitFieldWrite32 (\r
-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit,\r
-  IN      UINT32                    Value\r
+  IN      UINTN   Address,\r
+  IN      UINTN   StartBit,\r
+  IN      UINTN   EndBit,\r
+  IN      UINT32  Value\r
   );\r
 \r
 /**\r
@@ -939,10 +932,10 @@ PciCf8BitFieldWrite32 (
 UINT32\r
 EFIAPI\r
 PciCf8BitFieldOr32 (\r
-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit,\r
-  IN      UINT32                    OrData\r
+  IN      UINTN   Address,\r
+  IN      UINTN   StartBit,\r
+  IN      UINTN   EndBit,\r
+  IN      UINT32  OrData\r
   );\r
 \r
 /**\r
@@ -977,10 +970,10 @@ PciCf8BitFieldOr32 (
 UINT32\r
 EFIAPI\r
 PciCf8BitFieldAnd32 (\r
-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit,\r
-  IN      UINT32                    AndData\r
+  IN      UINTN   Address,\r
+  IN      UINTN   StartBit,\r
+  IN      UINTN   EndBit,\r
+  IN      UINT32  AndData\r
   );\r
 \r
 /**\r
@@ -1019,11 +1012,11 @@ PciCf8BitFieldAnd32 (
 UINT32\r
 EFIAPI\r
 PciCf8BitFieldAndThenOr32 (\r
-  IN      UINTN                     Address,\r
-  IN      UINTN                     StartBit,\r
-  IN      UINTN                     EndBit,\r
-  IN      UINT32                    AndData,\r
-  IN      UINT32                    OrData\r
+  IN      UINTN   Address,\r
+  IN      UINTN   StartBit,\r
+  IN      UINTN   EndBit,\r
+  IN      UINT32  AndData,\r
+  IN      UINT32  OrData\r
   );\r
 \r
 /**\r
@@ -1033,7 +1026,7 @@ PciCf8BitFieldAndThenOr32 (
   Size into the buffer specified by Buffer. This function only allows the PCI\r
   configuration registers from a single PCI function to be read. Size is\r
   returned. When possible 32-bit PCI configuration read cycles are used to read\r
-  from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit\r
+  from StartAddress to StartAddress + Size. Due to alignment restrictions, 8-bit\r
   and 16-bit PCI configuration read cycles may be used at the beginning and the\r
   end of the range.\r
 \r
@@ -1053,9 +1046,9 @@ PciCf8BitFieldAndThenOr32 (
 UINTN\r
 EFIAPI\r
 PciCf8ReadBuffer (\r
-  IN      UINTN                     StartAddress,\r
-  IN      UINTN                     Size,\r
-  OUT     VOID                      *Buffer\r
+  IN      UINTN  StartAddress,\r
+  IN      UINTN  Size,\r
+  OUT     VOID   *Buffer\r
   );\r
 \r
 /**\r
@@ -1066,7 +1059,7 @@ PciCf8ReadBuffer (
   Size from the buffer specified by Buffer. This function only allows the PCI\r
   configuration registers from a single PCI function to be written. Size is\r
   returned. When possible 32-bit PCI configuration write cycles are used to\r
-  write from StartAdress to StartAddress + Size. Due to alignment restrictions,\r
+  write from StartAddress to StartAddress + Size. Due to alignment restrictions,\r
   8-bit and 16-bit PCI configuration write cycles may be used at the beginning\r
   and the end of the range.\r
 \r
@@ -1086,9 +1079,9 @@ PciCf8ReadBuffer (
 UINTN\r
 EFIAPI\r
 PciCf8WriteBuffer (\r
-  IN      UINTN                     StartAddress,\r
-  IN      UINTN                     Size,\r
-  IN      VOID                      *Buffer\r
+  IN      UINTN  StartAddress,\r
+  IN      UINTN  Size,\r
+  IN      VOID   *Buffer\r
   );\r
 \r
 #endif\r