MdePkg: Clean up source files

[mirror_edk2.git] / MdePkg / Include / Library / PciLib.h

diff --git a/MdePkg/Include/Library/PciLib.h b/MdePkg/Include/Library/PciLib.h
index 708571bfd32f020e6fc39c7537c2c895c1306617..d77c8b2c61dd7b958b1656c69977a48926616103 100644 (file)
--- a/MdePkg/Include/Library/PciLib.h
+++ b/MdePkg/Include/Library/PciLib.h
@@ -1,17 +1,17 @@
 /** @file\r
   Provides services to access PCI Configuration Space.\r
-  \r
-  These functions perform PCI configuration cycles using the default PCI configuration \r
-  access method. This may use I/O ports 0xCF8 and 0xCFC to perform PCI configuration accesses, \r
-  or it may use MMIO registers relative to the PcdPciExpressBaseAddress, or it may use some \r
-  alternate access method.  Modules will typically use the PCI Library for its PCI configuration \r
-  accesses.  However, if a module requires a mix of PCI access methods, the PCI CF8 Library or \r
-  PCI Express Library may be used in conjunction with the PCI Library.  The functionality of \r
-  these three libraries is identical.  The PCI CF8 Library and PCI Express Library simply use \r
+\r
+  These functions perform PCI configuration cycles using the default PCI configuration\r
+  access method. This may use I/O ports 0xCF8 and 0xCFC to perform PCI configuration accesses,\r
+  or it may use MMIO registers relative to the PcdPciExpressBaseAddress, or it may use some\r
+  alternate access method.  Modules will typically use the PCI Library for its PCI configuration\r
+  accesses.  However, if a module requires a mix of PCI access methods, the PCI CF8 Library or\r
+  PCI Express Library may be used in conjunction with the PCI Library.  The functionality of\r
+  these three libraries is identical.  The PCI CF8 Library and PCI Express Library simply use\r
   explicit access methods.\r
 \r
-Copyright (c) 2006 - 2008, Intel Corporation<BR>\r
-All rights reserved. This program and the accompanying materials\r
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r
 http://opensource.org/licenses/bsd-license.php\r
@@ -37,23 +37,23 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
   @return The encoded PCI address.\r
 \r
 **/\r
-#define PCI_LIB_ADDRESS(Bus,Device,Function,Offset)   \\r
-  (((Offset) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20))\r
+#define PCI_LIB_ADDRESS(Bus,Device,Function,Register)   \\r
+  (((Register) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20))\r
 \r
 /**\r
-  Registers a PCI device so PCI configuration registers may be accessed after \r
+  Registers a PCI device so PCI configuration registers may be accessed after\r
   SetVirtualAddressMap().\r
-  \r
-  Registers the PCI device specified by Address so all the PCI configuration registers \r
+\r
+  Registers the PCI device specified by Address so all the PCI configuration registers\r
   associated with that PCI device may be accessed after SetVirtualAddressMap() is called.\r
-  \r
+\r
   If Address > 0x0FFFFFFF, then ASSERT().\r
 \r
   @param  Address Address that encodes the PCI Bus, Device, Function and\r
                   Register.\r
-  \r
+\r
   @retval RETURN_SUCCESS           The PCI device was registered for runtime access.\r
-  @retval RETURN_UNSUPPORTED       An attempt was made to call this function \r
+  @retval RETURN_UNSUPPORTED       An attempt was made to call this function\r
                                    after ExitBootServices().\r
   @retval RETURN_UNSUPPORTED       The resources required to access the PCI device\r
                                    at runtime could not be mapped.\r
@@ -167,7 +167,7 @@ PciAnd8 (
 \r
 /**\r
   Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
-  value, followed by a  bitwise OR with another 8-bit value.\r
+  value, followed by a bitwise OR with another 8-bit value.\r
 \r
   Reads the 8-bit PCI configuration register specified by Address, performs a\r
   bitwise AND between the read result and the value specified by AndData,\r
@@ -236,6 +236,7 @@ PciBitFieldRead8 (
   If StartBit is greater than 7, then ASSERT().\r
   If EndBit is greater than 7, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -271,6 +272,7 @@ PciBitFieldWrite8 (
   If StartBit is greater than 7, then ASSERT().\r
   If EndBit is greater than 7, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -306,6 +308,7 @@ PciBitFieldOr8 (
   If StartBit is greater than 7, then ASSERT().\r
   If EndBit is greater than 7, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -343,6 +346,8 @@ PciBitFieldAnd8 (
   If StartBit is greater than 7, then ASSERT().\r
   If EndBit is greater than 7, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -541,6 +546,7 @@ PciBitFieldRead16 (
   If StartBit is greater than 15, then ASSERT().\r
   If EndBit is greater than 15, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -577,6 +583,7 @@ PciBitFieldWrite16 (
   If StartBit is greater than 15, then ASSERT().\r
   If EndBit is greater than 15, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -613,6 +620,7 @@ PciBitFieldOr16 (
   If StartBit is greater than 15, then ASSERT().\r
   If EndBit is greater than 15, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -651,6 +659,8 @@ PciBitFieldAnd16 (
   If StartBit is greater than 15, then ASSERT().\r
   If EndBit is greater than 15, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -849,6 +859,7 @@ PciBitFieldRead32 (
   If StartBit is greater than 31, then ASSERT().\r
   If EndBit is greater than 31, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -885,6 +896,7 @@ PciBitFieldWrite32 (
   If StartBit is greater than 31, then ASSERT().\r
   If EndBit is greater than 31, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -921,6 +933,7 @@ PciBitFieldOr32 (
   If StartBit is greater than 31, then ASSERT().\r
   If EndBit is greater than 31, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r
@@ -959,6 +972,8 @@ PciBitFieldAnd32 (
   If StartBit is greater than 31, then ASSERT().\r
   If EndBit is greater than 31, then ASSERT().\r
   If EndBit is less than StartBit, then ASSERT().\r
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r
 \r
   @param  Address   PCI configuration register to write.\r
   @param  StartBit  The ordinal of the least significant bit in the bit field.\r