MdePkg/ProcessorBind: add defines for page allocation granularity

[mirror_edk2.git] / MdePkg / Include / Library / PeiServicesTablePointerLib.h

diff --git a/MdePkg/Include/Library/PeiServicesTablePointerLib.h b/MdePkg/Include/Library/PeiServicesTablePointerLib.h
index ede033773034e40ff17710fd652412d5132782fa..7ea6cc10c54043589971cd2447298cf7480202a6 100644 (file)
--- a/MdePkg/Include/Library/PeiServicesTablePointerLib.h
+++ b/MdePkg/Include/Library/PeiServicesTablePointerLib.h
@@ -1,14 +1,14 @@
 /** @file\r
-  PEI Services Table Pointer Library services\r
+  Provides a service to retrieve a pointer to the PEI Services Table.\r
 \r
-  Copyright (c) 2006, Intel Corporation\r
-  All rights reserved. This program and the accompanying materials\r
-  are licensed and made available under the terms and conditions of the BSD License\r
-  which accompanies this distribution.  The full text of the license may be found at\r
-  http://opensource.org/licenses/bsd-license.php\r
+Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution.  The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
 \r
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
 \r
 **/\r
 \r
@@ -16,19 +16,59 @@
 #define __PEI_SERVICES_TABLE_POINTER_LIB_H__\r
 \r
 /**\r
-  The function returns the pointer to PEI services.\r
+  Retrieves the cached value of the PEI Services Table pointer.\r
 \r
-  The function returns the pointer to PEI services.\r
-  It will ASSERT() if the pointer to PEI services is NULL.\r
+  Returns the cached value of the PEI Services Table pointer in a CPU specific manner \r
+  as specified in the CPU binding section of the Platform Initialization Pre-EFI \r
+  Initialization Core Interface Specification.\r
+  \r
+  If the cached PEI Services Table pointer is NULL, then ASSERT().\r
 \r
-  @retval  The pointer to PeiServices.\r
+  @return  The pointer to PeiServices.\r
 \r
 **/\r
-EFI_PEI_SERVICES **\r
+CONST EFI_PEI_SERVICES **\r
 EFIAPI\r
 GetPeiServicesTablePointer (\r
   VOID\r
   );\r
 \r
+/**\r
+  Caches a pointer PEI Services Table. \r
+ \r
+  Caches the pointer to the PEI Services Table specified by PeiServicesTablePointer \r
+  in a CPU specific manner as specified in the CPU binding section of the Platform Initialization \r
+  Pre-EFI Initialization Core Interface Specification. \r
+  \r
+  If PeiServicesTablePointer is NULL, then ASSERT().\r
+  \r
+  @param    PeiServicesTablePointer   The address of PeiServices pointer.\r
+**/\r
+VOID\r
+EFIAPI\r
+SetPeiServicesTablePointer (\r
+  IN CONST EFI_PEI_SERVICES ** PeiServicesTablePointer\r
+  );\r
+\r
+/**\r
+  Perform CPU specific actions required to migrate the PEI Services Table \r
+  pointer from temporary RAM to permanent RAM.\r
+\r
+  For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes \r
+  immediately preceding the Interrupt Descriptor Table (IDT) in memory.\r
+  For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes \r
+  immediately preceding the Interrupt Descriptor Table (IDT) in memory.\r
+  For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in\r
+  a dedicated CPU register.  This means that there is no memory storage \r
+  associated with storing the PEI Services Table pointer, so no additional \r
+  migration actions are required for Itanium or ARM CPUs.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+MigratePeiServicesTablePointer (\r
+  VOID\r
+  );\r
+\r
 #endif\r
 \r