MdePkg: Apply uncrustify changes

[mirror_edk2.git] / MdePkg / Include / Library / S3PciSegmentLib.h

diff --git a/MdePkg/Include/Library/S3PciSegmentLib.h b/MdePkg/Include/Library/S3PciSegmentLib.h
index 7bd8bc1d102f5fb0a2b39e20e0b55dd535353ad8..5067d4fcbbe06ed407fdbd2978872320d96417e9 100644 (file)
--- a/MdePkg/Include/Library/S3PciSegmentLib.h
+++ b/MdePkg/Include/Library/S3PciSegmentLib.h
@@ -11,7 +11,6 @@
 #ifndef __S3_PCI_SEGMENT_LIB__\r
 #define __S3_PCI_SEGMENT_LIB__\r
 \r
-\r
 /**\r
   Macro that converts PCI Segment, PCI Bus, PCI Device, PCI Function,\r
   and PCI Register to an address that can be passed to the S3 PCI Segment Library functions.\r
@@ -29,7 +28,7 @@
   @return The address that is compatible with the PCI Segment Library functions.\r
 \r
 **/\r
-#define S3_PCI_SEGMENT_LIB_ADDRESS(Segment,Bus,Device,Function,Register) \\r
+#define S3_PCI_SEGMENT_LIB_ADDRESS(Segment, Bus, Device, Function, Register) \\r
   ((Segment != 0) ? \\r
     ( ((Register) & 0xfff)                 | \\r
       (((Function) & 0x07) << 12)          | \\r
@@ -61,7 +60,7 @@
 UINT8\r
 EFIAPI\r
 S3PciSegmentRead8 (\r
-  IN UINT64                    Address\r
+  IN UINT64  Address\r
   );\r
 \r
 /**\r
@@ -82,8 +81,8 @@ S3PciSegmentRead8 (
 UINT8\r
 EFIAPI\r
 S3PciSegmentWrite8 (\r
-  IN UINT64                    Address,\r
-  IN UINT8                     Value\r
+  IN UINT64  Address,\r
+  IN UINT8   Value\r
   );\r
 \r
 /**\r
@@ -107,8 +106,8 @@ S3PciSegmentWrite8 (
 UINT8\r
 EFIAPI\r
 S3PciSegmentOr8 (\r
-  IN UINT64                    Address,\r
-  IN UINT8                     OrData\r
+  IN UINT64  Address,\r
+  IN UINT8   OrData\r
   );\r
 \r
 /**\r
@@ -131,8 +130,8 @@ S3PciSegmentOr8 (
 UINT8\r
 EFIAPI\r
 S3PciSegmentAnd8 (\r
-  IN UINT64                    Address,\r
-  IN UINT8                     AndData\r
+  IN UINT64  Address,\r
+  IN UINT8   AndData\r
   );\r
 \r
 /**\r
@@ -159,9 +158,9 @@ S3PciSegmentAnd8 (
 UINT8\r
 EFIAPI\r
 S3PciSegmentAndThenOr8 (\r
-  IN UINT64                    Address,\r
-  IN UINT8                     AndData,\r
-  IN UINT8                     OrData\r
+  IN UINT64  Address,\r
+  IN UINT8   AndData,\r
+  IN UINT8   OrData\r
   );\r
 \r
 /**\r
@@ -189,9 +188,9 @@ S3PciSegmentAndThenOr8 (
 UINT8\r
 EFIAPI\r
 S3PciSegmentBitFieldRead8 (\r
-  IN UINT64                    Address,\r
-  IN UINTN                     StartBit,\r
-  IN UINTN                     EndBit\r
+  IN UINT64  Address,\r
+  IN UINTN   StartBit,\r
+  IN UINTN   EndBit\r
   );\r
 \r
 /**\r
@@ -222,10 +221,10 @@ S3PciSegmentBitFieldRead8 (
 UINT8\r
 EFIAPI\r
 S3PciSegmentBitFieldWrite8 (\r
-  IN UINT64                    Address,\r
-  IN UINTN                     StartBit,\r
-  IN UINTN                     EndBit,\r
-  IN UINT8                     Value\r
+  IN UINT64  Address,\r
+  IN UINTN   StartBit,\r
+  IN UINTN   EndBit,\r
+  IN UINT8   Value\r
   );\r
 \r
 /**\r
@@ -259,10 +258,10 @@ S3PciSegmentBitFieldWrite8 (
 UINT8\r
 EFIAPI\r
 S3PciSegmentBitFieldOr8 (\r
-  IN UINT64                    Address,\r
-  IN UINTN                     StartBit,\r
-  IN UINTN                     EndBit,\r
-  IN UINT8                     OrData\r
+  IN UINT64  Address,\r
+  IN UINTN   StartBit,\r
+  IN UINTN   EndBit,\r
+  IN UINT8   OrData\r
   );\r
 \r
 /**\r
@@ -296,10 +295,10 @@ S3PciSegmentBitFieldOr8 (
 UINT8\r
 EFIAPI\r
 S3PciSegmentBitFieldAnd8 (\r
-  IN UINT64                    Address,\r
-  IN UINTN                     StartBit,\r
-  IN UINTN                     EndBit,\r
-  IN UINT8                     AndData\r
+  IN UINT64  Address,\r
+  IN UINTN   StartBit,\r
+  IN UINTN   EndBit,\r
+  IN UINT8   AndData\r
   );\r
 \r
 /**\r
@@ -336,11 +335,11 @@ S3PciSegmentBitFieldAnd8 (
 UINT8\r
 EFIAPI\r
 S3PciSegmentBitFieldAndThenOr8 (\r
-  IN UINT64                    Address,\r
-  IN UINTN                     StartBit,\r
-  IN UINTN                     EndBit,\r
-  IN UINT8                     AndData,\r
-  IN UINT8                     OrData\r
+  IN UINT64  Address,\r
+  IN UINTN   StartBit,\r
+  IN UINTN   EndBit,\r
+  IN UINT8   AndData,\r
+  IN UINT8   OrData\r
   );\r
 \r
 /**\r
@@ -361,7 +360,7 @@ S3PciSegmentBitFieldAndThenOr8 (
 UINT16\r
 EFIAPI\r
 S3PciSegmentRead16 (\r
-  IN UINT64                    Address\r
+  IN UINT64  Address\r
   );\r
 \r
 /**\r
@@ -383,8 +382,8 @@ S3PciSegmentRead16 (
 UINT16\r
 EFIAPI\r
 S3PciSegmentWrite16 (\r
-  IN UINT64                    Address,\r
-  IN UINT16                    Value\r
+  IN UINT64  Address,\r
+  IN UINT16  Value\r
   );\r
 \r
 /**\r
@@ -410,8 +409,8 @@ S3PciSegmentWrite16 (
 UINT16\r
 EFIAPI\r
 S3PciSegmentOr16 (\r
-  IN UINT64                    Address,\r
-  IN UINT16                    OrData\r
+  IN UINT64  Address,\r
+  IN UINT16  OrData\r
   );\r
 \r
 /**\r
@@ -436,8 +435,8 @@ S3PciSegmentOr16 (
 UINT16\r
 EFIAPI\r
 S3PciSegmentAnd16 (\r
-  IN UINT64                    Address,\r
-  IN UINT16                    AndData\r
+  IN UINT64  Address,\r
+  IN UINT16  AndData\r
   );\r
 \r
 /**\r
@@ -465,9 +464,9 @@ S3PciSegmentAnd16 (
 UINT16\r
 EFIAPI\r
 S3PciSegmentAndThenOr16 (\r
-  IN UINT64                    Address,\r
-  IN UINT16                    AndData,\r
-  IN UINT16                    OrData\r
+  IN UINT64  Address,\r
+  IN UINT16  AndData,\r
+  IN UINT16  OrData\r
   );\r
 \r
 /**\r
@@ -496,9 +495,9 @@ S3PciSegmentAndThenOr16 (
 UINT16\r
 EFIAPI\r
 S3PciSegmentBitFieldRead16 (\r
-  IN UINT64                    Address,\r
-  IN UINTN                     StartBit,\r
-  IN UINTN                     EndBit\r
+  IN UINT64  Address,\r
+  IN UINTN   StartBit,\r
+  IN UINTN   EndBit\r
   );\r
 \r
 /**\r
@@ -530,10 +529,10 @@ S3PciSegmentBitFieldRead16 (
 UINT16\r
 EFIAPI\r
 S3PciSegmentBitFieldWrite16 (\r
-  IN UINT64                    Address,\r
-  IN UINTN                     StartBit,\r
-  IN UINTN                     EndBit,\r
-  IN UINT16                    Value\r
+  IN UINT64  Address,\r
+  IN UINTN   StartBit,\r
+  IN UINTN   EndBit,\r
+  IN UINT16  Value\r
   );\r
 \r
 /**\r
@@ -568,10 +567,10 @@ S3PciSegmentBitFieldWrite16 (
 UINT16\r
 EFIAPI\r
 S3PciSegmentBitFieldOr16 (\r
-  IN UINT64                    Address,\r
-  IN UINTN                     StartBit,\r
-  IN UINTN                     EndBit,\r
-  IN UINT16                    OrData\r
+  IN UINT64  Address,\r
+  IN UINTN   StartBit,\r
+  IN UINTN   EndBit,\r
+  IN UINT16  OrData\r
   );\r
 \r
 /**\r
@@ -606,10 +605,10 @@ S3PciSegmentBitFieldOr16 (
 UINT16\r
 EFIAPI\r
 S3PciSegmentBitFieldAnd16 (\r
-  IN UINT64                    Address,\r
-  IN UINTN                     StartBit,\r
-  IN UINTN                     EndBit,\r
-  IN UINT16                    AndData\r
+  IN UINT64  Address,\r
+  IN UINTN   StartBit,\r
+  IN UINTN   EndBit,\r
+  IN UINT16  AndData\r
   );\r
 \r
 /**\r
@@ -646,11 +645,11 @@ S3PciSegmentBitFieldAnd16 (
 UINT16\r
 EFIAPI\r
 S3PciSegmentBitFieldAndThenOr16 (\r
-  IN UINT64                    Address,\r
-  IN UINTN                     StartBit,\r
-  IN UINTN                     EndBit,\r
-  IN UINT16                    AndData,\r
-  IN UINT16                    OrData\r
+  IN UINT64  Address,\r
+  IN UINTN   StartBit,\r
+  IN UINTN   EndBit,\r
+  IN UINT16  AndData,\r
+  IN UINT16  OrData\r
   );\r
 \r
 /**\r
@@ -671,7 +670,7 @@ S3PciSegmentBitFieldAndThenOr16 (
 UINT32\r
 EFIAPI\r
 S3PciSegmentRead32 (\r
-  IN UINT64                    Address\r
+  IN UINT64  Address\r
   );\r
 \r
 /**\r
@@ -693,8 +692,8 @@ S3PciSegmentRead32 (
 UINT32\r
 EFIAPI\r
 S3PciSegmentWrite32 (\r
-  IN UINT64                    Address,\r
-  IN UINT32                    Value\r
+  IN UINT64  Address,\r
+  IN UINT32  Value\r
   );\r
 \r
 /**\r
@@ -720,8 +719,8 @@ S3PciSegmentWrite32 (
 UINT32\r
 EFIAPI\r
 S3PciSegmentOr32 (\r
-  IN UINT64                    Address,\r
-  IN UINT32                    OrData\r
+  IN UINT64  Address,\r
+  IN UINT32  OrData\r
   );\r
 \r
 /**\r
@@ -746,8 +745,8 @@ S3PciSegmentOr32 (
 UINT32\r
 EFIAPI\r
 S3PciSegmentAnd32 (\r
-  IN UINT64                    Address,\r
-  IN UINT32                    AndData\r
+  IN UINT64  Address,\r
+  IN UINT32  AndData\r
   );\r
 \r
 /**\r
@@ -775,9 +774,9 @@ S3PciSegmentAnd32 (
 UINT32\r
 EFIAPI\r
 S3PciSegmentAndThenOr32 (\r
-  IN UINT64                    Address,\r
-  IN UINT32                    AndData,\r
-  IN UINT32                    OrData\r
+  IN UINT64  Address,\r
+  IN UINT32  AndData,\r
+  IN UINT32  OrData\r
   );\r
 \r
 /**\r
@@ -806,9 +805,9 @@ S3PciSegmentAndThenOr32 (
 UINT32\r
 EFIAPI\r
 S3PciSegmentBitFieldRead32 (\r
-  IN UINT64                    Address,\r
-  IN UINTN                     StartBit,\r
-  IN UINTN                     EndBit\r
+  IN UINT64  Address,\r
+  IN UINTN   StartBit,\r
+  IN UINTN   EndBit\r
   );\r
 \r
 /**\r
@@ -840,10 +839,10 @@ S3PciSegmentBitFieldRead32 (
 UINT32\r
 EFIAPI\r
 S3PciSegmentBitFieldWrite32 (\r
-  IN UINT64                    Address,\r
-  IN UINTN                     StartBit,\r
-  IN UINTN                     EndBit,\r
-  IN UINT32                    Value\r
+  IN UINT64  Address,\r
+  IN UINTN   StartBit,\r
+  IN UINTN   EndBit,\r
+  IN UINT32  Value\r
   );\r
 \r
 /**\r
@@ -878,10 +877,10 @@ S3PciSegmentBitFieldWrite32 (
 UINT32\r
 EFIAPI\r
 S3PciSegmentBitFieldOr32 (\r
-  IN UINT64                    Address,\r
-  IN UINTN                     StartBit,\r
-  IN UINTN                     EndBit,\r
-  IN UINT32                    OrData\r
+  IN UINT64  Address,\r
+  IN UINTN   StartBit,\r
+  IN UINTN   EndBit,\r
+  IN UINT32  OrData\r
   );\r
 \r
 /**\r
@@ -916,10 +915,10 @@ S3PciSegmentBitFieldOr32 (
 UINT32\r
 EFIAPI\r
 S3PciSegmentBitFieldAnd32 (\r
-  IN UINT64                    Address,\r
-  IN UINTN                     StartBit,\r
-  IN UINTN                     EndBit,\r
-  IN UINT32                    AndData\r
+  IN UINT64  Address,\r
+  IN UINTN   StartBit,\r
+  IN UINTN   EndBit,\r
+  IN UINT32  AndData\r
   );\r
 \r
 /**\r
@@ -956,11 +955,11 @@ S3PciSegmentBitFieldAnd32 (
 UINT32\r
 EFIAPI\r
 S3PciSegmentBitFieldAndThenOr32 (\r
-  IN UINT64                    Address,\r
-  IN UINTN                     StartBit,\r
-  IN UINTN                     EndBit,\r
-  IN UINT32                    AndData,\r
-  IN UINT32                    OrData\r
+  IN UINT64  Address,\r
+  IN UINTN   StartBit,\r
+  IN UINTN   EndBit,\r
+  IN UINT32  AndData,\r
+  IN UINT32  OrData\r
   );\r
 \r
 /**\r
@@ -990,9 +989,9 @@ S3PciSegmentBitFieldAndThenOr32 (
 UINTN\r
 EFIAPI\r
 S3PciSegmentReadBuffer (\r
-  IN  UINT64                   StartAddress,\r
-  IN  UINTN                    Size,\r
-  OUT VOID                     *Buffer\r
+  IN  UINT64  StartAddress,\r
+  IN  UINTN   Size,\r
+  OUT VOID    *Buffer\r
   );\r
 \r
 /**\r
@@ -1023,9 +1022,9 @@ S3PciSegmentReadBuffer (
 UINTN\r
 EFIAPI\r
 S3PciSegmentWriteBuffer (\r
-  IN UINT64                    StartAddress,\r
-  IN UINTN                     Size,\r
-  IN VOID                      *Buffer\r
+  IN UINT64  StartAddress,\r
+  IN UINTN   Size,\r
+  IN VOID    *Buffer\r
   );\r
 \r
 #endif\r