/** @file\r
Include file matches things in PI.\r
\r
- Copyright (c) 2006 - 2007, Intel Corporation \r
+ Copyright (c) 2006 - 2009, Intel Corporation \r
All rights reserved. This program and the accompanying materials \r
are licensed and made available under the terms and conditions of the BSD License \r
which accompanies this distribution. The full text of the license may be found at \r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
\r
@par Revision Reference:\r
- Version 1.0.\r
+ PI Version 1.0\r
\r
**/\r
\r
#ifndef __PI_DXECIS_H__\r
#define __PI_DXECIS_H__\r
\r
+#include <Uefi/UefiMultiPhase.h>\r
#include <Pi/PiMultiPhase.h>\r
\r
///\r
/// Global Coherencey Domain types - Memory type\r
///\r
typedef enum {\r
+ ///\r
+ /// A memory region that is visible to the boot processor. However, there are no system\r
+ /// components that are currently decoding this memory region.\r
+ ///\r
EfiGcdMemoryTypeNonExistent,\r
+ ///\r
+ /// A memory region that is visible to the boot processor. This memory region is being\r
+ /// decoded by a system component, but the memory region is not considered to be either\r
+ /// system memory or memory-mapped I/O.\r
+ ///\r
EfiGcdMemoryTypeReserved,\r
+ ///\r
+ /// A memory region that is visible to the boot processor. A memory controller is\r
+ /// currently decoding this memory region and the memory controller is producing a\r
+ /// tested system memory region that is available to the memory services.\r
+ ///\r
EfiGcdMemoryTypeSystemMemory,\r
+ ///\r
+ /// A memory region that is visible to the boot processor. This memory region is\r
+ /// currently being decoded by a component as memory-mapped I/O that can be used to\r
+ /// access I/O devices in the platform.\r
+ ///\r
EfiGcdMemoryTypeMemoryMappedIo,\r
EfiGcdMemoryTypeMaximum\r
} EFI_GCD_MEMORY_TYPE;\r
/// Global Coherencey Domain types - IO type\r
///\r
typedef enum {\r
+ ///\r
+ /// An I/O region that is visible to the boot processor. However, there are no system\r
+ /// components that are currently decoding this I/O region.\r
+ ///\r
EfiGcdIoTypeNonExistent,\r
+ ///\r
+ /// An I/O region that is visible to the boot processor. This I/O region is currently being\r
+ /// decoded by a system component, but the I/O region cannot be used to access I/O devices.\r
+ ///\r
EfiGcdIoTypeReserved,\r
+ ///\r
+ /// An I/O region that is visible to the boot processor. This I/O region is currently being\r
+ /// decoded by a system component that is producing I/O ports that can be used to access I/O devices.\r
+ ///\r
EfiGcdIoTypeIo,\r
EfiGcdIoTypeMaximum\r
} EFI_GCD_IO_TYPE;\r
/// The type of allocation to perform.\r
/// \r
typedef enum {\r
+ ///\r
+ /// The GCD memory space map is searched from the lowest address up to the highest address\r
+ /// looking for unallocated memory ranges.\r
+ ///\r
EfiGcdAllocateAnySearchBottomUp,\r
+ ///\r
+ /// The GCD memory space map is searched from the lowest address up \r
+ /// to the specified MaxAddress looking for unallocated memory ranges.\r
+ ///\r
EfiGcdAllocateMaxAddressSearchBottomUp,\r
+ ///\r
+ /// The GCD memory space map is checked to see if the memory range starting \r
+ /// at the specified Address is available.\r
+ ///\r
EfiGcdAllocateAddress,\r
+ ///\r
+ /// The GCD memory space map is searched from the highest address down to the lowest address \r
+ /// looking for unallocated memory ranges.\r
+ ///\r
EfiGcdAllocateAnySearchTopDown,\r
+ ///\r
+ /// The GCD memory space map is searched from the specified MaxAddress \r
+ /// down to the lowest address looking for unallocated memory ranges.\r
+ ///\r
EfiGcdAllocateMaxAddressSearchTopDown,\r
EfiGcdMaxAllocateType\r
} EFI_GCD_ALLOCATE_TYPE;\r
IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
IN UINT64 Length,\r
IN UINT64 Capabilities\r
- )\r
-;\r
+ );\r
\r
/**\r
Allocates nonexistent memory, reserved memory, system memory, or memorymapped\r
IN OUT EFI_PHYSICAL_ADDRESS *BaseAddress,\r
IN EFI_HANDLE ImageHandle,\r
IN EFI_HANDLE DeviceHandle OPTIONAL\r
- )\r
-;\r
+ );\r
\r
/**\r
Frees nonexistent memory, reserved memory, system memory, or memory-mapped\r
(EFIAPI *EFI_FREE_MEMORY_SPACE)(\r
IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
IN UINT64 Length\r
- )\r
-;\r
+ );\r
\r
/**\r
Removes reserved memory, system memory, or memory-mapped I/O resources from\r
(EFIAPI *EFI_REMOVE_MEMORY_SPACE)(\r
IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
IN UINT64 Length\r
- )\r
-;\r
+ );\r
\r
/**\r
Retrieves the descriptor for a memory region containing a specified address.\r
(EFIAPI *EFI_GET_MEMORY_SPACE_DESCRIPTOR)(\r
IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
OUT EFI_GCD_MEMORY_SPACE_DESCRIPTOR *Descriptor\r
- )\r
-;\r
+ );\r
\r
/**\r
Modifies the attributes for a memory region in the global coherency domain of the\r
IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
IN UINT64 Length,\r
IN UINT64 Attributes\r
- )\r
-;\r
+ );\r
\r
/**\r
Returns a map of the memory resources in the global coherency domain of the\r
(EFIAPI *EFI_GET_MEMORY_SPACE_MAP)(\r
OUT UINTN *NumberOfDescriptors,\r
OUT EFI_GCD_MEMORY_SPACE_DESCRIPTOR **MemorySpaceMap\r
- )\r
-;\r
+ );\r
\r
/**\r
Adds reserved I/O or I/O resources to the global coherency domain of the processor.\r
IN EFI_GCD_IO_TYPE GcdIoType,\r
IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
IN UINT64 Length\r
- )\r
-;\r
+ );\r
\r
/**\r
Allocates nonexistent I/O, reserved I/O, or I/O resources from the global coherency\r
IN OUT EFI_PHYSICAL_ADDRESS *BaseAddress,\r
IN EFI_HANDLE ImageHandle,\r
IN EFI_HANDLE DeviceHandle OPTIONAL\r
- )\r
-;\r
+ );\r
\r
/**\r
Frees nonexistent I/O, reserved I/O, or I/O resources from the global coherency\r
(EFIAPI *EFI_FREE_IO_SPACE)(\r
IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
IN UINT64 Length\r
- )\r
-;\r
+ );\r
\r
/**\r
Removes reserved I/O or I/O resources from the global coherency domain of the\r
(EFIAPI *EFI_REMOVE_IO_SPACE)(\r
IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
IN UINT64 Length\r
- )\r
-;\r
+ );\r
\r
/**\r
Retrieves the descriptor for an I/O region containing a specified address.\r
(EFIAPI *EFI_GET_IO_SPACE_DESCRIPTOR)(\r
IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
OUT EFI_GCD_IO_SPACE_DESCRIPTOR *Descriptor\r
- )\r
-;\r
+ );\r
\r
/**\r
Returns a map of the I/O resources in the global coherency domain of the processor.\r
(EFIAPI *EFI_GET_IO_SPACE_MAP)(\r
OUT UINTN *NumberOfDescriptors,\r
OUT EFI_GCD_IO_SPACE_DESCRIPTOR **IoSpaceMap\r
- )\r
-;\r
+ );\r
\r
\r
\r
EFI_STATUS\r
(EFIAPI *EFI_DISPATCH)(\r
VOID\r
- )\r
-;\r
+ );\r
\r
/**\r
Clears the Schedule on Request (SOR) flag for a component that is stored in a firmware volume.\r
(EFIAPI *EFI_SCHEDULE)(\r
IN EFI_HANDLE FirmwareVolumeHandle,\r
IN CONST EFI_GUID *FileName\r
- )\r
-;\r
+ );\r
\r
/**\r
Promotes a file stored in a firmware volume from the untrusted to the trusted state.\r
(EFIAPI *EFI_TRUST)(\r
IN EFI_HANDLE FirmwareVolumeHandle,\r
IN CONST EFI_GUID *FileName\r
- )\r
-;\r
+ );\r
\r
/**\r
Creates a firmware volume handle for a firmware volume that is present in system memory.\r
IN CONST VOID *FirmwareVolumeHeader,\r
IN UINTN Size,\r
OUT EFI_HANDLE *FirmwareVolumeHandle\r
- )\r
-;\r
+ );\r
\r
//\r
// DXE Services Table\r
//\r
#define DXE_SERVICES_SIGNATURE 0x565245535f455844ULL\r
-#define DXE_SERVICES_REVISION ((1<<16) | (00))\r
+#define DXE_SERVICES_REVISION ((1<<16) | (20))\r
\r
typedef struct {\r
+ ///\r
+ /// The table header for the DXE Services Table.\r
+ /// This header contains the DXE_SERVICES_SIGNATURE and DXE_SERVICES_REVISION values.\r
+ ///\r
EFI_TABLE_HEADER Hdr;\r
\r
//\r
\r
typedef DXE_SERVICES EFI_DXE_SERVICES;\r
\r
+\r
+/**\r
+ Function prototype for invoking a function on an Application Processor.\r
+\r
+ This definition is used by the UEFI MP Serices Protocol, and the\r
+ PI SMM System Table.\r
+\r
+ @param[in,out] Buffer Pointer to private data buffer.\r
+**/\r
+typedef\r
+VOID\r
+(EFIAPI *EFI_AP_PROCEDURE)(\r
+ IN OUT VOID *Buffer\r
+ );\r
+\r
#endif\r
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