#include <Ppi/CpuIo.h>\r
#include <Ppi/PciCfg2.h>\r
\r
+\r
/**\r
The PEI Dispatcher will invoke each PEIM one time. During this pass, the PEI \r
Dispatcher will pass control to the PEIM at the AddressOfEntryPoint in the PE Header. \r
UINTN StackSize;\r
} EFI_SEC_PEI_HAND_OFF;\r
\r
+\r
+/**\r
+\r
+ This function is the entry point for the PEI Foundation, which\r
+ allows the SEC phase to pass information about the stack,\r
+ temporary RAM and the Boot Firmware Volume. In addition, it also\r
+ allows the SEC phase to pass services and data forward for use\r
+ during the PEI phase in the form of one or more PPIs. There is\r
+ no limit to the number of additional PPIs that can be passed\r
+ from SEC into the PEI Foundation. As part of its initialization\r
+ phase, the PEI Foundation will add these SEC-hosted PPIs to its\r
+ PPI database such that both the PEI Foundation and any modules\r
+ can leverage the associated service calls and/or code in these\r
+ early PPIs.\r
+\r
+ @param SecCoreData Points to a data structure containing\r
+ information about the PEI core's\r
+ operating environment, such as the size\r
+ and location of temporary RAM, the stack\r
+ location and the BFV location. The type\r
+ EFI_SEC_PEI_HAND_OFF is\r
+\r
+ @param PpiList Points to a list of one or more PPI\r
+ descriptors to be installed initially by\r
+ the PEI core. An empty PPI list consists\r
+ of a single descriptor with the end-tag\r
+ EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST.\r
+ As part of its initialization phase, the\r
+ PEI Foundation will add these SEC-hosted\r
+ PPIs to its PPI database such that both\r
+ the PEI Foundation and any modules can\r
+ leverage the associated service calls\r
+ and/or code in these early PPIs.\r
+\r
+\r
+**/\r
+typedef\r
+VOID\r
+(EFIAPI *EFI_PEI_CORE_ENTRY_POINT)(\r
+ IN CONST EFI_SEC_PEI_HAND_OFF *SecCoreData,\r
+ IN CONST EFI_PEI_PPI_DESCRIPTOR *PpiList\r
+);\r
+\r
#endif\r