Foundation. This includes flushing caches, enabling and disabling interrupts, hooking interrupt\r
vectors and exception vectors, reading internal processor timers, resetting the processor, and\r
determining the processor frequency.\r
-\r
- @param FlushDataCache\r
- Flushes a range of the processor's data cache. If the processor does \r
- not contain a data cache, or the data cache is fully coherent, then this \r
- function can just return EFI_SUCCESS. If the processor does not support \r
- flushing a range of addresses from the data cache, then the entire data \r
- cache must be flushed. \r
-\r
- @param EnableInterrupt \r
- Enables interrupt processing by the processor.\r
-\r
- @param DisableInterrupt \r
- Disables interrupt processing by the processor.\r
-\r
- @param GetInterruptState \r
- Retrieves the processor's current interrupt state.\r
-\r
- @param Init\r
- Generates an INIT on the processor. If a processor cannot programmatically \r
- generate an INIT without help from external hardware, then this function \r
- returns EFI_UNSUPPORTED.\r
-\r
- @param RegisterInterruptHandler\r
- Associates an interrupt service routine with one of the processor's interrupt \r
- vectors. This function is typically used by the EFI_TIMER_ARCH_PROTOCOL to \r
- hook the timer interrupt in a system. It can also be used by the debugger to \r
- hook exception vectors.\r
-\r
- @param GetTimerValue \r
- Returns the value of one of the processor's internal timers.\r
-\r
- @param SetMemoryAttributes \r
- Attempts to set the attributes of a memory region.\r
-\r
- @param NumberOfTimers\r
- The number of timers that are available in a processor. The value in this \r
- field is a constant that must not be modified after the CPU Architectural \r
- Protocol is installed. All consumers must treat this as a read-only field.\r
-\r
- @param DmaBufferAlignment\r
- The size, in bytes, of the alignment required for DMA buffer allocations. \r
- This is typically the size of the largest data cache line in the platform. \r
- The value in this field is a constant that must not be modified after the \r
- CPU Architectural Protocol is installed. All consumers must treat this as \r
- a read-only field.\r
-\r
**/\r
struct _EFI_CPU_ARCH_PROTOCOL {\r
EFI_CPU_FLUSH_DATA_CACHE FlushDataCache;\r
EFI_CPU_REGISTER_INTERRUPT_HANDLER RegisterInterruptHandler;\r
EFI_CPU_GET_TIMER_VALUE GetTimerValue;\r
EFI_CPU_SET_MEMORY_ATTRIBUTES SetMemoryAttributes;\r
+ ///\r
+ /// The number of timers that are available in a processor. The value in this \r
+ /// field is a constant that must not be modified after the CPU Architectural \r
+ /// Protocol is installed. All consumers must treat this as a read-only field.\r
+ ///\r
UINT32 NumberOfTimers;\r
+ ///\r
+ /// The size, in bytes, of the alignment required for DMA buffer allocations. \r
+ /// This is typically the size of the largest data cache line in the platform. \r
+ /// The value in this field is a constant that must not be modified after the \r
+ /// CPU Architectural Protocol is installed. All consumers must treat this as \r
+ /// a read-only field. \r
+ ///\r
UINT32 DmaBufferAlignment;\r
};\r
\r