The DebugSupport protocol is used by source level debuggers to abstract the\r
processor and handle context save and restore operations.\r
\r
- Copyright (c) 2006, Intel Corporation \r
+ Copyright (c) 2006 - 2008, Intel Corporation \r
All rights reserved. This program and the accompanying materials \r
are licensed and made available under the terms and conditions of the BSD License \r
which accompanies this distribution. The full text of the license may be found at \r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
\r
- Module Name: DebugSupport.h\r
-\r
**/\r
\r
#ifndef __DEBUG_SUPPORT_H__\r
#define __DEBUG_SUPPORT_H__\r
\r
+#include <ProcessorBind.h>\r
+#include <IndustryStandard/PeImage.h>\r
+\r
typedef struct _EFI_DEBUG_SUPPORT_PROTOCOL EFI_DEBUG_SUPPORT_PROTOCOL;\r
\r
-//\r
-// Debug Support protocol {2755590C-6F3C-42FA-9EA4-A3BA543CDA25}\r
-//\r
+///\r
+/// Debug Support protocol {2755590C-6F3C-42FA-9EA4-A3BA543CDA25}\r
+///\r
#define EFI_DEBUG_SUPPORT_PROTOCOL_GUID \\r
{ \\r
0x2755590C, 0x6F3C, 0x42FA, {0x9E, 0xA4, 0xA3, 0xBA, 0x54, 0x3C, 0xDA, 0x25 } \\r
}\r
\r
-//\r
-// Debug Support definitions\r
-//\r
+///\r
+/// Debug Support definitions\r
+///\r
typedef INTN EFI_EXCEPTION_TYPE;\r
\r
//\r
#define EXCEPT_IA32_MACHINE_CHECK 18\r
#define EXCEPT_IA32_SIMD 19\r
\r
-//\r
-// IA-32 processor context definition\r
-//\r
-//\r
-// FXSAVE_STATE\r
-// FP / MMX / XMM registers (see fxrstor instruction definition)\r
-//\r
+///\r
+/// IA-32 processor context definition\r
+///\r
+///\r
+/// FXSAVE_STATE\r
+/// FP / MMX / XMM registers (see fxrstor instruction definition)\r
+///\r
typedef struct {\r
UINT16 Fcw;\r
UINT16 Fsw;\r
UINT32 DataOffset;\r
UINT16 Ds;\r
UINT8 Reserved2[10];\r
-#if (EFI_SPECIFICATION_VERSION >= 0x00020000)\r
UINT8 St0Mm0[10], Reserved3[6];\r
UINT8 St1Mm1[10], Reserved4[6];\r
UINT8 St2Mm2[10], Reserved5[6];\r
UINT8 Xmm7[16];\r
UINT8 Reserved11[14 * 16];\r
} EFI_FX_SAVE_STATE_IA32;\r
-#else\r
- UINT8 St0Mm0[10], Reserved3[6];\r
- UINT8 St0Mm1[10], Reserved4[6];\r
- UINT8 St0Mm2[10], Reserved5[6];\r
- UINT8 St0Mm3[10], Reserved6[6];\r
- UINT8 St0Mm4[10], Reserved7[6];\r
- UINT8 St0Mm5[10], Reserved8[6];\r
- UINT8 St0Mm6[10], Reserved9[6];\r
- UINT8 St0Mm7[10], Reserved10[6];\r
- UINT8 Reserved11[22 * 16];\r
-} EFI_FX_SAVE_STATE;\r
-#endif\r
\r
typedef struct {\r
UINT32 ExceptionData;\r
-#if (EFI_SPECIFICATION_VERSION >= 0x00020000)\r
EFI_FX_SAVE_STATE_IA32 FxSaveState;\r
-#else\r
- EFI_FX_SAVE_STATE FxSaveState;\r
-#endif\r
UINT32 Dr0;\r
UINT32 Dr1;\r
UINT32 Dr2;\r
} EFI_SYSTEM_CONTEXT_IA32;\r
\r
//\r
-// X64 processor exception types\r
+// x64 processor exception types\r
//\r
#define EXCEPT_X64_DIVIDE_ERROR 0\r
#define EXCEPT_X64_DEBUG 1\r
#define EXCEPT_X64_MACHINE_CHECK 18\r
#define EXCEPT_X64_SIMD 19\r
\r
-//\r
-// X64 processor context definition\r
-//\r
-// FXSAVE_STATE\r
-// FP / MMX / XMM registers (see fxrstor instruction definition)\r
-//\r
+///\r
+/// x64 processor context definition\r
+///\r
+/// FXSAVE_STATE\r
+/// FP / MMX / XMM registers (see fxrstor instruction definition)\r
+///\r
typedef struct {\r
UINT16 Fcw;\r
UINT16 Fsw;\r
UINT8 Xmm5[16];\r
UINT8 Xmm6[16];\r
UINT8 Xmm7[16];\r
+ //\r
+ // NOTE: UEFI 2.0 spec definition as follows. \r
+ //\r
UINT8 Reserved11[14 * 16];\r
} EFI_FX_SAVE_STATE_X64;\r
\r
#define EXCEPT_IPF_IA32_INTERCEPT 46\r
#define EXCEPT_IPF_IA32_INTERRUPT 47\r
\r
-//\r
-// IPF processor context definition\r
-//\r
+///\r
+/// IPF processor context definition\r
+///\r
typedef struct {\r
//\r
// The first reserved field is necessary to preserve alignment for the correct\r
#define EXCEPT_EBC_INSTRUCTION_ENCODING 8 // malformed instruction\r
#define EXCEPT_EBC_BAD_BREAK 9 // BREAK 0 or undefined BREAK\r
#define EXCEPT_EBC_STEP 10 // to support debug stepping\r
-//\r
-// For coding convenience, define the maximum valid EBC exception.\r
-//\r
+///\r
+/// For coding convenience, define the maximum valid EBC exception.\r
+///\r
#define MAX_EBC_EXCEPTION EXCEPT_EBC_STEP\r
\r
-//\r
-// EBC processor context definition\r
-//\r
+///\r
+/// EBC processor context definition\r
+///\r
typedef struct {\r
UINT64 R0;\r
UINT64 R1;\r
UINT64 Ip;\r
} EFI_SYSTEM_CONTEXT_EBC;\r
\r
-//\r
-// Universal EFI_SYSTEM_CONTEXT definition\r
-//\r
+///\r
+/// Universal EFI_SYSTEM_CONTEXT definition\r
+///\r
typedef union {\r
EFI_SYSTEM_CONTEXT_EBC *SystemContextEbc;\r
EFI_SYSTEM_CONTEXT_IA32 *SystemContextIa32;\r
/** \r
Registers and enables an exception callback function for the specified exception.\r
\r
- @param ExceptionType Exception types in EBC, IA-32, X64, or IPF\r
+ @param ExceptionType Exception types in EBC, IA-32, x64, or IPF\r
@param SystemContext Exception content.\r
\r
**/\r
typedef\r
VOID\r
-(*EFI_EXCEPTION_CALLBACK) (\r
+(*EFI_EXCEPTION_CALLBACK)(\r
IN EFI_EXCEPTION_TYPE ExceptionType,\r
IN OUT EFI_SYSTEM_CONTEXT SystemContext\r
);\r
\r
/** \r
- Registers and enables the on-target debug agent¡¯s periodic entry point.\r
+ Registers and enables the on-target debug agent's periodic entry point.\r
\r
@param SystemContext Exception content.\r
\r
**/\r
typedef\r
VOID\r
-(*EFI_PERIODIC_CALLBACK) (\r
+(*EFI_PERIODIC_CALLBACK)(\r
IN OUT EFI_SYSTEM_CONTEXT SystemContext\r
);\r
\r
-//\r
-// Machine type definition\r
-//\r
+///\r
+/// Machine type definition\r
+///\r
typedef enum {\r
- IsaIa32 = IMAGE_FILE_MACHINE_I386, // 0x014C\r
- IsaX64 = IMAGE_FILE_MACHINE_X64, // 0x8664\r
- IsaIpf = IMAGE_FILE_MACHINE_IA64, // 0x0200\r
- IsaEbc = IMAGE_FILE_MACHINE_EBC // 0x0EBC\r
+ IsaIa32 = IMAGE_FILE_MACHINE_I386, ///< 0x014C\r
+ IsaX64 = IMAGE_FILE_MACHINE_X64, ///< 0x8664\r
+ IsaIpf = IMAGE_FILE_MACHINE_IA64, ///< 0x0200\r
+ IsaEbc = IMAGE_FILE_MACHINE_EBC ///< 0x0EBC\r
} EFI_INSTRUCTION_SET_ARCHITECTURE;\r
\r
\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_GET_MAXIMUM_PROCESSOR_INDEX) (\r
+(EFIAPI *EFI_GET_MAXIMUM_PROCESSOR_INDEX)(\r
IN EFI_DEBUG_SUPPORT_PROTOCOL *This,\r
OUT UINTN *MaxProcessorIndex\r
);\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_REGISTER_PERIODIC_CALLBACK) (\r
+(EFIAPI *EFI_REGISTER_PERIODIC_CALLBACK)(\r
IN EFI_DEBUG_SUPPORT_PROTOCOL *This,\r
IN UINTN ProcessorIndex,\r
IN EFI_PERIODIC_CALLBACK PeriodicCallback\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_REGISTER_EXCEPTION_CALLBACK) (\r
+(EFIAPI *EFI_REGISTER_EXCEPTION_CALLBACK)(\r
IN EFI_DEBUG_SUPPORT_PROTOCOL *This,\r
IN UINTN ProcessorIndex,\r
IN EFI_EXCEPTION_CALLBACK ExceptionCallback,\r
causes a fresh memory fetch to retrieve code to be executed. \r
\r
@param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.\r
- @param ProcessorIndex Specifies which processor¡¯s instruction cache is to be invalidated.\r
+ @param ProcessorIndex Specifies which processor's instruction cache is to be invalidated.\r
@param Start Specifies the physical base of the memory range to be invalidated. \r
- @param Length Specifies the minimum number of bytes in the processor¡¯s instruction\r
+ @param Length Specifies the minimum number of bytes in the processor's instruction\r
cache to invalidate. \r
\r
@retval EFI_SUCCESS The function completed successfully. \r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_INVALIDATE_INSTRUCTION_CACHE) (\r
+(EFIAPI *EFI_INVALIDATE_INSTRUCTION_CACHE)(\r
IN EFI_DEBUG_SUPPORT_PROTOCOL *This,\r
IN UINTN ProcessorIndex,\r
IN VOID *Start,\r
IN UINT64 Length\r
);\r
\r
-//\r
-// DebugSupport protocol definition\r
-//\r
+///\r
+/// This protocol provides the services to allow the debug agent to register \r
+/// callback functions that are called either periodically or when specific \r
+/// processor exceptions occur.\r
+///\r
struct _EFI_DEBUG_SUPPORT_PROTOCOL {\r
+ ///\r
+ /// Declares the processor architecture for this instance of the EFI Debug Support protocol.\r
+ ///\r
EFI_INSTRUCTION_SET_ARCHITECTURE Isa;\r
EFI_GET_MAXIMUM_PROCESSOR_INDEX GetMaximumProcessorIndex;\r
EFI_REGISTER_PERIODIC_CALLBACK RegisterPeriodicCallback;\r
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