#define EXCEPT_IA32_MACHINE_CHECK 18\r
#define EXCEPT_IA32_SIMD 19\r
\r
-//\r
-// IA-32 processor context definition\r
-//\r
-//\r
-// FXSAVE_STATE\r
-// FP / MMX / XMM registers (see fxrstor instruction definition)\r
-//\r
+///\r
+/// IA-32 processor context definition\r
+///\r
+///\r
+/// FXSAVE_STATE\r
+/// FP / MMX / XMM registers (see fxrstor instruction definition)\r
+///\r
typedef struct {\r
UINT16 Fcw;\r
UINT16 Fsw;\r
} EFI_SYSTEM_CONTEXT_IA32;\r
\r
//\r
-// X64 processor exception types\r
+// x64 processor exception types\r
//\r
#define EXCEPT_X64_DIVIDE_ERROR 0\r
#define EXCEPT_X64_DEBUG 1\r
#define EXCEPT_X64_MACHINE_CHECK 18\r
#define EXCEPT_X64_SIMD 19\r
\r
-//\r
-// X64 processor context definition\r
-//\r
-// FXSAVE_STATE\r
-// FP / MMX / XMM registers (see fxrstor instruction definition)\r
-//\r
+///\r
+/// x64 processor context definition\r
+///\r
+/// FXSAVE_STATE\r
+/// FP / MMX / XMM registers (see fxrstor instruction definition)\r
+///\r
typedef struct {\r
UINT16 Fcw;\r
UINT16 Fsw;\r
#define EXCEPT_IPF_IA32_INTERCEPT 46\r
#define EXCEPT_IPF_IA32_INTERRUPT 47\r
\r
-//\r
-// IPF processor context definition\r
-//\r
+///\r
+/// IPF processor context definition\r
+///\r
typedef struct {\r
//\r
// The first reserved field is necessary to preserve alignment for the correct\r
/** \r
Registers and enables an exception callback function for the specified exception.\r
\r
- @param ExceptionType Exception types in EBC, IA-32, X64, or IPF\r
+ @param ExceptionType Exception types in EBC, IA-32, x64, or IPF\r
@param SystemContext Exception content.\r
\r
**/\r
IN OUT EFI_SYSTEM_CONTEXT SystemContext\r
);\r
\r
-//\r
-// Machine type definition\r
-//\r
+///\r
+/// Machine type definition\r
+///\r
typedef enum {\r
- IsaIa32 = IMAGE_FILE_MACHINE_I386, // 0x014C\r
- IsaX64 = IMAGE_FILE_MACHINE_X64, // 0x8664\r
- IsaIpf = IMAGE_FILE_MACHINE_IA64, // 0x0200\r
- IsaEbc = IMAGE_FILE_MACHINE_EBC // 0x0EBC\r
+ IsaIa32 = IMAGE_FILE_MACHINE_I386, ///< 0x014C\r
+ IsaX64 = IMAGE_FILE_MACHINE_X64, ///< 0x8664\r
+ IsaIpf = IMAGE_FILE_MACHINE_IA64, ///< 0x0200\r
+ IsaEbc = IMAGE_FILE_MACHINE_EBC ///< 0x0EBC\r
} EFI_INSTRUCTION_SET_ARCHITECTURE;\r
\r
\r
IN UINT64 Length\r
);\r
\r
-//\r
-// DebugSupport protocol definition\r
-//\r
-/**\r
- @par Protocol Description:\r
- This protocol provides the services to allow the debug agent to register \r
- callback functions that are called either periodically or when specific \r
- processor exceptions occur.\r
-\r
- @param Isa\r
- Declares the processor architecture for this instance of the EFI\r
- Debug Support protocol.\r
-\r
- @param GetMaximumProcessorIndex\r
- Returns the maximum processor index value that may be used.\r
-\r
- @param RegisterPeriodicCallback\r
- Registers a callback function that will be invoked periodically\r
- and asynchronously to the execution of EFI.\r
-\r
- @param RegisterExceptionCallback\r
- Registers a callback function that will be called each time the\r
- specified processor exception occurs.\r
-\r
- @param InvalidateInstructionCache\r
- Invalidate the instruction cache of the processor. This is required\r
- by processor architectures where instruction and data caches are\r
- not coherent when instructions in the code under debug has been\r
- modified by the debug agent.\r
-**/\r
+///\r
+/// This protocol provides the services to allow the debug agent to register \r
+/// callback functions that are called either periodically or when specific \r
+/// processor exceptions occur.\r
+///\r
struct _EFI_DEBUG_SUPPORT_PROTOCOL {\r
+ ///\r
+ /// Declares the processor architecture for this instance of the EFI Debug Support protocol.\r
+ ///\r
EFI_INSTRUCTION_SET_ARCHITECTURE Isa;\r
EFI_GET_MAXIMUM_PROCESSOR_INDEX GetMaximumProcessorIndex;\r
EFI_REGISTER_PERIODIC_CALLBACK RegisterPeriodicCallback;\r