EFI PCI I/O Protocol provides the basic Memory, I/O, PCI configuration, \r
and DMA interfaces that a driver uses to access its PCI controller.\r
\r
- Copyright (c) 2006 - 2008, Intel Corporation \r
- All rights reserved. This program and the accompanying materials \r
+ Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
+ This program and the accompanying materials \r
are licensed and made available under the terms and conditions of the BSD License \r
which accompanies this distribution. The full text of the license may be found at \r
http://opensource.org/licenses/bsd-license.php \r
#define EFI_PCI_IO_ATTRIBUTE_VGA_IO 0x0010 ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (10 bit decode)\r
#define EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO 0x0020 ///< I/O cycles 0x1F0-0x1F7, 0x3F6, 0x3F7 (10 bit decode)\r
#define EFI_PCI_IO_ATTRIBUTE_IDE_SECONDARY_IO 0x0040 ///< I/O cycles 0x170-0x177, 0x376, 0x377 (10 bit decode)\r
-#define EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080 ///< Map a memory range so write are combined\r
+#define EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080 ///< Map a memory range so writes are combined\r
#define EFI_PCI_IO_ATTRIBUTE_IO 0x0100 ///< Enable the I/O decode bit in the PCI Config Header\r
#define EFI_PCI_IO_ATTRIBUTE_MEMORY 0x0200 ///< Enable the Memory decode bit in the PCI Config Header\r
#define EFI_PCI_IO_ATTRIBUTE_BUS_MASTER 0x0400 ///< Enable the DMA bit in the PCI Config Header\r
#define EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000 ///< Clear for PCI controllers that can not genrate a DAC\r
#define EFI_PCI_IO_ATTRIBUTE_ISA_IO_16 0x10000 ///< I/O cycles 0x0100-0x03FF or greater (16 bit decode)\r
#define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16 0x20000 ///< I/O cycles 0x3C6, 0x3C8, 0x3C9 (16 bit decode)\r
-#define EFI_PCI_IO_ATTRIBUTE_VGA_IO_16 0x30000 ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (16 bit decode)\r
+#define EFI_PCI_IO_ATTRIBUTE_VGA_IO_16 0x40000 ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (16 bit decode)\r
\r
#define EFI_PCI_DEVICE_ENABLE (EFI_PCI_IO_ATTRIBUTE_IO | EFI_PCI_IO_ATTRIBUTE_MEMORY | EFI_PCI_IO_ATTRIBUTE_BUS_MASTER)\r
#define EFI_VGA_DEVICE_ENABLE (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY | EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_IO)\r
} EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION;\r
\r
/** \r
- Reads from the memory space of a PCI controller. Returns when either the polling exit criteria is\r
+ Reads from the memory space of a PCI controller. Returns either when the polling exit criteria is\r
satisfied or after a defined duration. \r
\r
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
);\r
\r
/** \r
- Provides the PCI controller-Cspecific addresses needed to access system memory.\r
+ Provides the PCI controller-specific addresses needed to access system memory.\r
\r
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
@param Operation Indicates if the bus master is going to read or write to system memory.\r
\r
/** \r
Allocates pages that are suitable for an EfiPciIoOperationBusMasterCommonBuffer\r
- mapping. \r
+ or EfiPciOperationBusMasterCommonBuffer64 mapping.\r
\r
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
@param Type This parameter is not used and must be ignored.\r
\r
@retval EFI_SUCCESS The requested memory pages were allocated.\r
@retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are\r
- MEMORY_WRITE_COMBINE and MEMORY_CACHED. \r
+ MEMORY_WRITE_COMBINE, MEMORY_CACHED and DUAL_ADDRESS_CYCLE.\r
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
@retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated. \r
\r
OUT UINT64 *Result OPTIONAL\r
);\r
\r
-/** \r
+/**\r
Gets the attributes that this PCI controller supports setting on a BAR using\r
SetBarAttributes(), and retrieves the list of resource descriptors for a BAR.\r
- \r
- @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. \r
+\r
+ @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
@param BarIndex The BAR index of the standard PCI Configuration header to use as the\r
base address for resource range. The legal range for this field is 0..5.\r
@param Supports A pointer to the mask of attributes that this PCI controller supports\r
- setting for this BAR with SetBarAttributes(). \r
- @param Resources A pointer to the ACPI 2.0 resource descriptors that describe the current\r
- configuration of this BAR of the PCI controller. \r
+ setting for this BAR with SetBarAttributes().\r
+ @param Resources A pointer to the resource descriptors that describe the current\r
+ configuration of this BAR of the PCI controller.\r
\r
- @retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI \r
- controller supports are returned in Supports. If Resources \r
- is not NULL, then the ACPI 2.0 resource descriptors that the PCI\r
- controller is currently using are returned in Resources. \r
+ @retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI\r
+ controller supports are returned in Supports. If Resources\r
+ is not NULL, then the resource descriptors that the PCI\r
+ controller is currently using are returned in Resources.\r
@retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.\r
@retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.\r
@retval EFI_OUT_OF_RESOURCES There are not enough resources available to allocate\r
- Resources. \r
- \r
+ Resources.\r
**/\r
typedef\r
EFI_STATUS\r
\r
///\r
/// The EFI_PCI_IO_PROTOCOL provides the basic Memory, I/O, PCI configuration, \r
-/// and DMA interfaces that are used to abstract accesses to PCI controllers. \r
+/// and DMA interfaces used to abstract accesses to PCI controllers. \r
/// There is one EFI_PCI_IO_PROTOCOL instance for each PCI controller on a PCI bus. \r
/// A device driver that wishes to manage a PCI controller in a system will have to \r
/// retrieve the EFI_PCI_IO_PROTOCOL instance that is associated with the PCI controller. \r
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