/** @file\r
EFI SMM CPU Protocol as defined in the PI 1.2 specification.\r
\r
- This protocol allows SMM drivers to access architecture-standard registers from any of the CPU \r
- save state areas. In some cases, difference processors provide the same information in the save state, \r
- but not in the same format. These so-called pseudo-registers provide this information in a standard \r
- format. \r
+ This protocol allows SMM drivers to access architecture-standard registers from any of the CPU\r
+ save state areas. In some cases, difference processors provide the same information in the save state,\r
+ but not in the same format. These so-called pseudo-registers provide this information in a standard\r
+ format.\r
\r
- Copyright (c) 2009, Intel Corporation \r
- All rights reserved. This program and the accompanying materials \r
- are licensed and made available under the terms and conditions of the BSD License \r
- which accompanies this distribution. The full text of the license may be found at \r
- http://opensource.org/licenses/bsd-license.php \r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+ Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>\r
+ SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#ifndef _SMM_CPU_H_\r
#define _SMM_CPU_H_\r
\r
-#define EFI_SMM_CPU_PROTOCOL_GUID \\r
- { \\r
- 0xeb346b97, 0x975f, 0x4a9f, { 0x8b, 0x22, 0xf8, 0xe9, 0x2b, 0xb3, 0xd5, 0x69 } \\r
- }\r
-\r
-///\r
-/// Save State register index\r
-///\r
-typedef enum {\r
- ///\r
- /// x86/X64 standard registers\r
- ///\r
- EFI_SMM_SAVE_STATE_REGISTER_GDTBASE = 4,\r
- EFI_SMM_SAVE_STATE_REGISTER_IDTBASE = 5,\r
- EFI_SMM_SAVE_STATE_REGISTER_LDTBASE = 6,\r
- EFI_SMM_SAVE_STATE_REGISTER_GDTLIMIT = 7,\r
- EFI_SMM_SAVE_STATE_REGISTER_IDTLIMIT = 8,\r
- EFI_SMM_SAVE_STATE_REGISTER_LDTLIMIT = 9,\r
- EFI_SMM_SAVE_STATE_REGISTER_LDTINFO = 10,\r
- EFI_SMM_SAVE_STATE_REGISTER_ES = 20,\r
- EFI_SMM_SAVE_STATE_REGISTER_CS = 21,\r
- EFI_SMM_SAVE_STATE_REGISTER_SS = 22,\r
- EFI_SMM_SAVE_STATE_REGISTER_DS = 23,\r
- EFI_SMM_SAVE_STATE_REGISTER_FS = 24,\r
- EFI_SMM_SAVE_STATE_REGISTER_GS = 25,\r
- EFI_SMM_SAVE_STATE_REGISTER_LDTR_SEL = 26,\r
- EFI_SMM_SAVE_STATE_REGISTER_TR_SEL = 27,\r
- EFI_SMM_SAVE_STATE_REGISTER_DR7 = 28,\r
- EFI_SMM_SAVE_STATE_REGISTER_DR6 = 29,\r
- EFI_SMM_SAVE_STATE_REGISTER_R8 = 30,\r
- EFI_SMM_SAVE_STATE_REGISTER_R9 = 31,\r
- EFI_SMM_SAVE_STATE_REGISTER_R10 = 32,\r
- EFI_SMM_SAVE_STATE_REGISTER_R11 = 33,\r
- EFI_SMM_SAVE_STATE_REGISTER_R12 = 34,\r
- EFI_SMM_SAVE_STATE_REGISTER_R13 = 35,\r
- EFI_SMM_SAVE_STATE_REGISTER_R14 = 36,\r
- EFI_SMM_SAVE_STATE_REGISTER_R15 = 37, \r
- EFI_SMM_SAVE_STATE_REGISTER_RAX = 38,\r
- EFI_SMM_SAVE_STATE_REGISTER_RBX = 39,\r
- EFI_SMM_SAVE_STATE_REGISTER_RCX = 40,\r
- EFI_SMM_SAVE_STATE_REGISTER_RDX = 41,\r
- EFI_SMM_SAVE_STATE_REGISTER_RSP = 42,\r
- EFI_SMM_SAVE_STATE_REGISTER_RBP = 43,\r
- EFI_SMM_SAVE_STATE_REGISTER_RSI = 44,\r
- EFI_SMM_SAVE_STATE_REGISTER_RDI = 45,\r
- EFI_SMM_SAVE_STATE_REGISTER_RIP = 46,\r
- EFI_SMM_SAVE_STATE_REGISTER_RFLAGS = 51,\r
- EFI_SMM_SAVE_STATE_REGISTER_CR0 = 52,\r
- EFI_SMM_SAVE_STATE_REGISTER_CR3 = 53,\r
- EFI_SMM_SAVE_STATE_REGISTER_CR4 = 54,\r
- EFI_SMM_SAVE_STATE_REGISTER_FCW = 256,\r
- EFI_SMM_SAVE_STATE_REGISTER_FSW = 257,\r
- EFI_SMM_SAVE_STATE_REGISTER_FTW = 258, \r
- EFI_SMM_SAVE_STATE_REGISTER_OPCODE = 259,\r
- EFI_SMM_SAVE_STATE_REGISTER_FP_EIP = 260,\r
- EFI_SMM_SAVE_STATE_REGISTER_FP_CS = 261,\r
- EFI_SMM_SAVE_STATE_REGISTER_DATAOFFSET = 262,\r
- EFI_SMM_SAVE_STATE_REGISTER_FP_DS = 263,\r
- EFI_SMM_SAVE_STATE_REGISTER_MM0 = 264,\r
- EFI_SMM_SAVE_STATE_REGISTER_MM1 = 265,\r
- EFI_SMM_SAVE_STATE_REGISTER_MM2 = 266,\r
- EFI_SMM_SAVE_STATE_REGISTER_MM3 = 267,\r
- EFI_SMM_SAVE_STATE_REGISTER_MM4 = 268,\r
- EFI_SMM_SAVE_STATE_REGISTER_MM5 = 269,\r
- EFI_SMM_SAVE_STATE_REGISTER_MM6 = 270,\r
- EFI_SMM_SAVE_STATE_REGISTER_MM7 = 271,\r
- EFI_SMM_SAVE_STATE_REGISTER_XMM0 = 272,\r
- EFI_SMM_SAVE_STATE_REGISTER_XMM1 = 273,\r
- EFI_SMM_SAVE_STATE_REGISTER_XMM2 = 274,\r
- EFI_SMM_SAVE_STATE_REGISTER_XMM3 = 275,\r
- EFI_SMM_SAVE_STATE_REGISTER_XMM4 = 276,\r
- EFI_SMM_SAVE_STATE_REGISTER_XMM5 = 277,\r
- EFI_SMM_SAVE_STATE_REGISTER_XMM6 = 278,\r
- EFI_SMM_SAVE_STATE_REGISTER_XMM7 = 279,\r
- EFI_SMM_SAVE_STATE_REGISTER_XMM8 = 280,\r
- EFI_SMM_SAVE_STATE_REGISTER_XMM9 = 281,\r
- EFI_SMM_SAVE_STATE_REGISTER_XMM10 = 282,\r
- EFI_SMM_SAVE_STATE_REGISTER_XMM11 = 283,\r
- EFI_SMM_SAVE_STATE_REGISTER_XMM12 = 284,\r
- EFI_SMM_SAVE_STATE_REGISTER_XMM13 = 285,\r
- EFI_SMM_SAVE_STATE_REGISTER_XMM14 = 286,\r
- EFI_SMM_SAVE_STATE_REGISTER_XMM15 = 287, \r
- ///\r
- /// Pseudo-Registers\r
- ///\r
- EFI_SMM_SAVE_STATE_REGISTER_IO = 512,\r
- EFI_SMM_SAVE_STATE_REGISTER_LMA = 513\r
-} EFI_SMM_SAVE_STATE_REGISTER; \r
+#include <Protocol/MmCpu.h>\r
+\r
+#define EFI_SMM_CPU_PROTOCOL_GUID EFI_MM_CPU_PROTOCOL_GUID\r
+\r
+#define EFI_SMM_SAVE_STATE_REGISTER_GDTBASE EFI_MM_SAVE_STATE_REGISTER_GDTBASE\r
+#define EFI_SMM_SAVE_STATE_REGISTER_IDTBASE EFI_MM_SAVE_STATE_REGISTER_IDTBASE\r
+#define EFI_SMM_SAVE_STATE_REGISTER_LDTBASE EFI_MM_SAVE_STATE_REGISTER_LDTBASE\r
+#define EFI_SMM_SAVE_STATE_REGISTER_GDTLIMIT EFI_MM_SAVE_STATE_REGISTER_GDTLIMIT\r
+#define EFI_SMM_SAVE_STATE_REGISTER_IDTLIMIT EFI_MM_SAVE_STATE_REGISTER_IDTLIMIT\r
+#define EFI_SMM_SAVE_STATE_REGISTER_LDTLIMIT EFI_MM_SAVE_STATE_REGISTER_LDTLIMIT\r
+#define EFI_SMM_SAVE_STATE_REGISTER_LDTINFO EFI_MM_SAVE_STATE_REGISTER_LDTINFO\r
+#define EFI_SMM_SAVE_STATE_REGISTER_ES EFI_MM_SAVE_STATE_REGISTER_ES\r
+#define EFI_SMM_SAVE_STATE_REGISTER_CS EFI_MM_SAVE_STATE_REGISTER_CS\r
+#define EFI_SMM_SAVE_STATE_REGISTER_SS EFI_MM_SAVE_STATE_REGISTER_SS\r
+#define EFI_SMM_SAVE_STATE_REGISTER_DS EFI_MM_SAVE_STATE_REGISTER_DS\r
+#define EFI_SMM_SAVE_STATE_REGISTER_FS EFI_MM_SAVE_STATE_REGISTER_FS\r
+#define EFI_SMM_SAVE_STATE_REGISTER_GS EFI_MM_SAVE_STATE_REGISTER_GS\r
+#define EFI_SMM_SAVE_STATE_REGISTER_LDTR_SEL EFI_MM_SAVE_STATE_REGISTER_LDTR_SEL\r
+#define EFI_SMM_SAVE_STATE_REGISTER_TR_SEL EFI_MM_SAVE_STATE_REGISTER_TR_SEL\r
+#define EFI_SMM_SAVE_STATE_REGISTER_DR7 EFI_MM_SAVE_STATE_REGISTER_DR7\r
+#define EFI_SMM_SAVE_STATE_REGISTER_DR6 EFI_MM_SAVE_STATE_REGISTER_DR6\r
+#define EFI_SMM_SAVE_STATE_REGISTER_R8 EFI_MM_SAVE_STATE_REGISTER_R8\r
+#define EFI_SMM_SAVE_STATE_REGISTER_R9 EFI_MM_SAVE_STATE_REGISTER_R9\r
+#define EFI_SMM_SAVE_STATE_REGISTER_R10 EFI_MM_SAVE_STATE_REGISTER_R10\r
+#define EFI_SMM_SAVE_STATE_REGISTER_R11 EFI_MM_SAVE_STATE_REGISTER_R11\r
+#define EFI_SMM_SAVE_STATE_REGISTER_R12 EFI_MM_SAVE_STATE_REGISTER_R12\r
+#define EFI_SMM_SAVE_STATE_REGISTER_R13 EFI_MM_SAVE_STATE_REGISTER_R13\r
+#define EFI_SMM_SAVE_STATE_REGISTER_R14 EFI_MM_SAVE_STATE_REGISTER_R14\r
+#define EFI_SMM_SAVE_STATE_REGISTER_R15 EFI_MM_SAVE_STATE_REGISTER_R15\r
+#define EFI_SMM_SAVE_STATE_REGISTER_RAX EFI_MM_SAVE_STATE_REGISTER_RAX\r
+#define EFI_SMM_SAVE_STATE_REGISTER_RBX EFI_MM_SAVE_STATE_REGISTER_RBX\r
+#define EFI_SMM_SAVE_STATE_REGISTER_RCX EFI_MM_SAVE_STATE_REGISTER_RCX\r
+#define EFI_SMM_SAVE_STATE_REGISTER_RDX EFI_MM_SAVE_STATE_REGISTER_RDX\r
+#define EFI_SMM_SAVE_STATE_REGISTER_RSP EFI_MM_SAVE_STATE_REGISTER_RSP\r
+#define EFI_SMM_SAVE_STATE_REGISTER_RBP EFI_MM_SAVE_STATE_REGISTER_RBP\r
+#define EFI_SMM_SAVE_STATE_REGISTER_RSI EFI_MM_SAVE_STATE_REGISTER_RSI\r
+#define EFI_SMM_SAVE_STATE_REGISTER_RDI EFI_MM_SAVE_STATE_REGISTER_RDI\r
+#define EFI_SMM_SAVE_STATE_REGISTER_RIP EFI_MM_SAVE_STATE_REGISTER_RIP\r
+#define EFI_SMM_SAVE_STATE_REGISTER_RFLAGS EFI_MM_SAVE_STATE_REGISTER_RFLAGS\r
+#define EFI_SMM_SAVE_STATE_REGISTER_CR0 EFI_MM_SAVE_STATE_REGISTER_CR0\r
+#define EFI_SMM_SAVE_STATE_REGISTER_CR3 EFI_MM_SAVE_STATE_REGISTER_CR3\r
+#define EFI_SMM_SAVE_STATE_REGISTER_CR4 EFI_MM_SAVE_STATE_REGISTER_CR4\r
+#define EFI_SMM_SAVE_STATE_REGISTER_FCW EFI_MM_SAVE_STATE_REGISTER_FCW\r
+#define EFI_SMM_SAVE_STATE_REGISTER_FSW EFI_MM_SAVE_STATE_REGISTER_FSW\r
+#define EFI_SMM_SAVE_STATE_REGISTER_FTW EFI_MM_SAVE_STATE_REGISTER_FTW\r
+#define EFI_SMM_SAVE_STATE_REGISTER_OPCODE EFI_MM_SAVE_STATE_REGISTER_OPCODE\r
+#define EFI_SMM_SAVE_STATE_REGISTER_FP_EIP EFI_MM_SAVE_STATE_REGISTER_FP_EIP\r
+#define EFI_SMM_SAVE_STATE_REGISTER_FP_CS EFI_MM_SAVE_STATE_REGISTER_FP_CS\r
+#define EFI_SMM_SAVE_STATE_REGISTER_DATAOFFSET EFI_MM_SAVE_STATE_REGISTER_DATAOFFSET\r
+#define EFI_SMM_SAVE_STATE_REGISTER_FP_DS EFI_MM_SAVE_STATE_REGISTER_FP_DS\r
+#define EFI_SMM_SAVE_STATE_REGISTER_MM0 EFI_MM_SAVE_STATE_REGISTER_MM0\r
+#define EFI_SMM_SAVE_STATE_REGISTER_MM1 EFI_MM_SAVE_STATE_REGISTER_MM1\r
+#define EFI_SMM_SAVE_STATE_REGISTER_MM2 EFI_MM_SAVE_STATE_REGISTER_MM2\r
+#define EFI_SMM_SAVE_STATE_REGISTER_MM3 EFI_MM_SAVE_STATE_REGISTER_MM3\r
+#define EFI_SMM_SAVE_STATE_REGISTER_MM4 EFI_MM_SAVE_STATE_REGISTER_MM4\r
+#define EFI_SMM_SAVE_STATE_REGISTER_MM5 EFI_MM_SAVE_STATE_REGISTER_MM5\r
+#define EFI_SMM_SAVE_STATE_REGISTER_MM6 EFI_MM_SAVE_STATE_REGISTER_MM6\r
+#define EFI_SMM_SAVE_STATE_REGISTER_MM7 EFI_MM_SAVE_STATE_REGISTER_MM7\r
+#define EFI_SMM_SAVE_STATE_REGISTER_XMM0 EFI_MM_SAVE_STATE_REGISTER_XMM0\r
+#define EFI_SMM_SAVE_STATE_REGISTER_XMM1 EFI_MM_SAVE_STATE_REGISTER_XMM1\r
+#define EFI_SMM_SAVE_STATE_REGISTER_XMM2 EFI_MM_SAVE_STATE_REGISTER_XMM2\r
+#define EFI_SMM_SAVE_STATE_REGISTER_XMM3 EFI_MM_SAVE_STATE_REGISTER_XMM3\r
+#define EFI_SMM_SAVE_STATE_REGISTER_XMM4 EFI_MM_SAVE_STATE_REGISTER_XMM4\r
+#define EFI_SMM_SAVE_STATE_REGISTER_XMM5 EFI_MM_SAVE_STATE_REGISTER_XMM5\r
+#define EFI_SMM_SAVE_STATE_REGISTER_XMM6 EFI_MM_SAVE_STATE_REGISTER_XMM6\r
+#define EFI_SMM_SAVE_STATE_REGISTER_XMM7 EFI_MM_SAVE_STATE_REGISTER_XMM7\r
+#define EFI_SMM_SAVE_STATE_REGISTER_XMM8 EFI_MM_SAVE_STATE_REGISTER_XMM8\r
+#define EFI_SMM_SAVE_STATE_REGISTER_XMM9 EFI_MM_SAVE_STATE_REGISTER_XMM9\r
+#define EFI_SMM_SAVE_STATE_REGISTER_XMM10 EFI_MM_SAVE_STATE_REGISTER_XMM10\r
+#define EFI_SMM_SAVE_STATE_REGISTER_XMM11 EFI_MM_SAVE_STATE_REGISTER_XMM11\r
+#define EFI_SMM_SAVE_STATE_REGISTER_XMM12 EFI_MM_SAVE_STATE_REGISTER_XMM12\r
+#define EFI_SMM_SAVE_STATE_REGISTER_XMM13 EFI_MM_SAVE_STATE_REGISTER_XMM13\r
+#define EFI_SMM_SAVE_STATE_REGISTER_XMM14 EFI_MM_SAVE_STATE_REGISTER_XMM14\r
+#define EFI_SMM_SAVE_STATE_REGISTER_XMM15 EFI_MM_SAVE_STATE_REGISTER_XMM15\r
+#define EFI_SMM_SAVE_STATE_REGISTER_IO EFI_MM_SAVE_STATE_REGISTER_IO\r
+#define EFI_SMM_SAVE_STATE_REGISTER_LMA EFI_MM_SAVE_STATE_REGISTER_LMA\r
+#define EFI_SMM_SAVE_STATE_REGISTER_PROCESSOR_ID EFI_MM_SAVE_STATE_REGISTER_PROCESSOR_ID\r
+\r
+typedef EFI_MM_SAVE_STATE_REGISTER EFI_SMM_SAVE_STATE_REGISTER;\r
+\r
+\r
+#define EFI_SMM_SAVE_STATE_REGISTER_LMA_32BIT EFI_MM_SAVE_STATE_REGISTER_LMA_32BIT\r
+#define EFI_SMM_SAVE_STATE_REGISTER_LMA_64BIT EFI_MM_SAVE_STATE_REGISTER_LMA_64BIT\r
\r
-///\r
-/// The EFI_SMM_SAVE_STATE_REGISTER_LMA pseudo-register values\r
-/// If the processor acts in 32-bit mode at the time the SMI occurred, the pseudo register value \r
-/// EFI_SMM_SAVE_STATE_REGISTER_LMA_32BIT is returned in Buffer. Otherwise, \r
-/// EFI_SMM_SAVE_STATE_REGISTER_LMA_64BIT is returned in Buffer.\r
-///\r
-#define EFI_SMM_SAVE_STATE_REGISTER_LMA_32BIT 32\r
-#define EFI_SMM_SAVE_STATE_REGISTER_LMA_64BIT 64\r
\r
///\r
/// Size width of I/O instruction\r
///\r
-typedef enum {\r
- EFI_SMM_SAVE_STATE_IO_WIDTH_UINT8 = 0,\r
- EFI_SMM_SAVE_STATE_IO_WIDTH_UINT16 = 1,\r
- EFI_SMM_SAVE_STATE_IO_WIDTH_UINT32 = 2,\r
- EFI_SMM_SAVE_STATE_IO_WIDTH_UINT64 = 3\r
-} EFI_SMM_SAVE_STATE_IO_WIDTH;\r
+#define EFI_SMM_SAVE_STATE_IO_WIDTH_UINT8 EFI_MM_SAVE_STATE_IO_WIDTH_UINT8\r
+#define EFI_SMM_SAVE_STATE_IO_WIDTH_UINT16 EFI_MM_SAVE_STATE_IO_WIDTH_UINT16\r
+#define EFI_SMM_SAVE_STATE_IO_WIDTH_UINT32 EFI_MM_SAVE_STATE_IO_WIDTH_UINT32\r
+#define EFI_SMM_SAVE_STATE_IO_WIDTH_UINT64 EFI_MM_SAVE_STATE_IO_WIDTH_UINT64\r
+typedef EFI_MM_SAVE_STATE_IO_WIDTH EFI_SMM_SAVE_STATE_IO_WIDTH;\r
\r
///\r
/// Types of I/O instruction\r
///\r
-typedef enum {\r
- EFI_SMM_SAVE_STATE_IO_TYPE_INPUT = 1,\r
- EFI_SMM_SAVE_STATE_IO_TYPE_OUTPUT = 2,\r
- EFI_SMM_SAVE_STATE_IO_TYPE_STRING = 4,\r
- EFI_SMM_SAVE_STATE_IO_TYPE_REP_PREFIX = 8\r
-} EFI_SMM_SAVE_STATE_IO_TYPE;\r
+#define EFI_SMM_SAVE_STATE_IO_TYPE_INPUT EFI_MM_SAVE_STATE_IO_TYPE_INPUT\r
+#define EFI_SMM_SAVE_STATE_IO_TYPE_OUTPUT EFI_MM_SAVE_STATE_IO_TYPE_OUTPUT\r
+#define EFI_SMM_SAVE_STATE_IO_TYPE_STRING EFI_MM_SAVE_STATE_IO_TYPE_STRING\r
+#define EFI_SMM_SAVE_STATE_IO_TYPE_REP_PREFIX EFI_MM_SAVE_STATE_IO_TYPE_REP_PREFIX\r
+typedef EFI_MM_SAVE_STATE_IO_TYPE EFI_SMM_SAVE_STATE_IO_TYPE;\r
\r
-///\r
-/// Structure of the data which is returned when ReadSaveState() is called with \r
-/// EFI_SMM_SAVE_STATE_REGISTER_IO. If there was no I/O then ReadSaveState() will \r
-/// return EFI_NOT_FOUND.\r
-///\r
-/// This structure describes the I/O operation which was in process when the SMI was generated.\r
-///\r
-typedef struct _EFI_SMM_SAVE_STATE_IO_INFO {\r
- ///\r
- /// For input instruction (IN, INS), this is data read before the SMI occurred. For output \r
- /// instructions (OUT, OUTS) this is data that was written before the SMI occurred. The \r
- /// width of the data is specified by IoWidth.\r
- ///\r
- /// Note: inconsistency with PI 1.2 spec here. wait for spec update.\r
- ///\r
- UINTN IoData;\r
- ///\r
- /// The I/O port that was being accessed when the SMI was triggered.\r
- ///\r
- UINT16 IoPort;\r
- ///\r
- /// Defines the size width (UINT8, UINT16, UINT32, UINT64) for IoData.\r
- ///\r
- EFI_SMM_SAVE_STATE_IO_WIDTH IoWidth;\r
- ///\r
- /// Defines type of I/O instruction.\r
- ///\r
- EFI_SMM_SAVE_STATE_IO_TYPE IoType;\r
-} EFI_SMM_SAVE_STATE_IO_INFO;\r
- \r
-typedef struct _EFI_SMM_CPU_PROTOCOL EFI_SMM_CPU_PROTOCOL;\r
-\r
-/**\r
- Read data from the CPU save state.\r
-\r
- This function is used to read the specified number of bytes of the specified register from the CPU \r
- save state of the specified CPU and place the value into the buffer. If the CPU does not support the\r
- specified register Register, then EFI_NOT_FOUND should be returned. If the CPU does not \r
- support the specified register width Width, then EFI_INVALID_PARAMETER is returned.\r
-\r
- @param[in] This The EFI_SMM_CPU_PROTOCOL instance.\r
- @param[in] Width The number of bytes to read from the CPU save state.\r
- @param[in] Register Specifies the CPU register to read form the save state.\r
- @param[in] CpuIndex Specifies the zero-based index of the CPU save state.\r
- @param[out] Buffer Upon return, this holds the CPU register value read from the save state.\r
- \r
- @retval EFI_SUCCESS The register was read from Save State.\r
- @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.\r
- @retval EFI_INVALID_PARAMETER Input parameters are not valid, for example, Processor No or register width \r
- is not correct.This or Buffer is NULL.\r
-**/\r
-typedef\r
-EFI_STATUS\r
-(EFIAPI *EFI_SMM_READ_SAVE_STATE)(\r
- IN CONST EFI_SMM_CPU_PROTOCOL *This,\r
- IN UINTN Width,\r
- IN EFI_SMM_SAVE_STATE_REGISTER Register,\r
- IN UINTN CpuIndex,\r
- OUT VOID *Buffer\r
- );\r
-\r
-\r
-/**\r
- Write data to the CPU save state.\r
-\r
- This function is used to write the specified number of bytes of the specified register to the CPU save \r
- state of the specified CPU and place the value into the buffer. If the CPU does not support the \r
- specified register Register, then EFI_UNSUPPORTED should be returned. If the CPU does not \r
- support the specified register width Width, then EFI_INVALID_PARAMETER is returned.\r
-\r
- @param[in] This The EFI_SMM_CPU_PROTOCOL instance.\r
- @param[in] Width The number of bytes to write to the CPU save state.\r
- @param[in] Register Specifies the CPU register to write to the save state.\r
- @param[in] CpuIndex Specifies the zero-based index of the CPU save state.\r
- @param[in] Buffer Upon entry, this holds the new CPU register value.\r
- \r
- @retval EFI_SUCCESS The register was written to Save State.\r
- @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.\r
- @retval EFI_INVALID_PARAMETER Input parameters are not valid. For example: \r
- ProcessorIndex or Width is not correct.\r
-**/\r
-typedef\r
-EFI_STATUS\r
-(EFIAPI *EFI_SMM_WRITE_SAVE_STATE)(\r
- IN CONST EFI_SMM_CPU_PROTOCOL *This,\r
- IN UINTN Width, \r
- IN EFI_SMM_SAVE_STATE_REGISTER Register,\r
- IN UINTN CpuIndex,\r
- IN CONST VOID *Buffer\r
- );\r
+typedef EFI_MM_SAVE_STATE_IO_INFO EFI_SMM_SAVE_STATE_IO_INFO;\r
\r
-///\r
-/// EFI SMM CPU Protocol provides access to CPU-related information while in SMM.\r
-///\r
-/// This protocol allows SMM drivers to access architecture-standard registers from any of the CPU \r
-/// save state areas. In some cases, difference processors provide the same information in the save state, \r
-/// but not in the same format. These so-called pseudo-registers provide this information in a standard \r
-/// format. \r
-///\r
-struct _EFI_SMM_CPU_PROTOCOL {\r
- EFI_SMM_READ_SAVE_STATE ReadSaveState;\r
- EFI_SMM_WRITE_SAVE_STATE WriteSaveState;\r
-};\r
+typedef EFI_MM_CPU_PROTOCOL EFI_SMM_CPU_PROTOCOL;\r
+\r
+typedef EFI_MM_READ_SAVE_STATE EFI_SMM_READ_SAVE_STATE;\r
\r
+typedef EFI_MM_WRITE_SAVE_STATE EFI_SMM_WRITE_SAVE_STATE;\r
extern EFI_GUID gEfiSmmCpuProtocolGuid;\r
\r
#endif\r
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