MdePkg: Apply uncrustify changes

[mirror_edk2.git] / MdePkg / Include / Register / Intel / Msr / PentiumMsr.h

diff --git a/MdePkg/Include/Register/Intel/Msr/PentiumMsr.h b/MdePkg/Include/Register/Intel/Msr/PentiumMsr.h
index 5907432b7b47fd00bebce75e5196dbd42d1f05fb..ff8c9b3f9b066731026998945a1115c00a54bcc3 100644 (file)
--- a/MdePkg/Include/Register/Intel/Msr/PentiumMsr.h
+++ b/MdePkg/Include/Register/Intel/Msr/PentiumMsr.h
@@ -54,8 +54,7 @@
   @endcode\r
   @note MSR_PENTIUM_P5_MC_ADDR is defined as P5_MC_ADDR in SDM.\r
 **/\r
-#define MSR_PENTIUM_P5_MC_ADDR                   0x00000000\r
-\r
+#define MSR_PENTIUM_P5_MC_ADDR  0x00000000\r
 \r
 /**\r
   See Section 15.10.2, "Pentium Processor Machine-Check Exception Handling.".\r
@@ -73,8 +72,7 @@
   @endcode\r
   @note MSR_PENTIUM_P5_MC_TYPE is defined as P5_MC_TYPE in SDM.\r
 **/\r
-#define MSR_PENTIUM_P5_MC_TYPE                   0x00000001\r
-\r
+#define MSR_PENTIUM_P5_MC_TYPE  0x00000001\r
 \r
 /**\r
   See Section 17.17, "Time-Stamp Counter.".\r
@@ -92,8 +90,7 @@
   @endcode\r
   @note MSR_PENTIUM_TSC is defined as TSC in SDM.\r
 **/\r
-#define MSR_PENTIUM_TSC                          0x00000010\r
-\r
+#define MSR_PENTIUM_TSC  0x00000010\r
 \r
 /**\r
   See Section 18.6.9.1, "Control and Event Select Register (CESR).".\r
@@ -111,8 +108,7 @@
   @endcode\r
   @note MSR_PENTIUM_CESR is defined as CESR in SDM.\r
 **/\r
-#define MSR_PENTIUM_CESR                         0x00000011\r
-\r
+#define MSR_PENTIUM_CESR  0x00000011\r
 \r
 /**\r
   Section 18.6.9.3, "Events Counted.".\r
@@ -132,8 +128,8 @@
         MSR_PENTIUM_CTR1 is defined as CTR1 in SDM.\r
   @{\r
 **/\r
-#define MSR_PENTIUM_CTR0                         0x00000012\r
-#define MSR_PENTIUM_CTR1                         0x00000013\r
+#define MSR_PENTIUM_CTR0  0x00000012\r
+#define MSR_PENTIUM_CTR1  0x00000013\r
 /// @}\r
 \r
 #endif\r