STM Resource Descriptor Header\r
**/\r
typedef struct {\r
- UINT32 RscType;\r
- UINT16 Length;\r
- UINT16 ReturnStatus:1;\r
- UINT16 Reserved:14;\r
- UINT16 IgnoreResource:1;\r
+ UINT32 RscType;\r
+ UINT16 Length;\r
+ UINT16 ReturnStatus : 1;\r
+ UINT16 Reserved : 14;\r
+ UINT16 IgnoreResource : 1;\r
} STM_RSC_DESC_HEADER;\r
\r
/**\r
STM Resource End Descriptor\r
**/\r
typedef struct {\r
- STM_RSC_DESC_HEADER Hdr;\r
- UINT64 ResourceListContinuation;\r
+ STM_RSC_DESC_HEADER Hdr;\r
+ UINT64 ResourceListContinuation;\r
} STM_RSC_END;\r
\r
/**\r
STM Resource Memory Descriptor\r
**/\r
typedef struct {\r
- STM_RSC_DESC_HEADER Hdr;\r
- UINT64 Base;\r
- UINT64 Length;\r
- UINT32 RWXAttributes:3;\r
- UINT32 Reserved:29;\r
- UINT32 Reserved_2;\r
+ STM_RSC_DESC_HEADER Hdr;\r
+ UINT64 Base;\r
+ UINT64 Length;\r
+ UINT32 RWXAttributes : 3;\r
+ UINT32 Reserved : 29;\r
+ UINT32 Reserved_2;\r
} STM_RSC_MEM_DESC;\r
\r
/**\r
STM Resource I/O Descriptor\r
**/\r
typedef struct {\r
- STM_RSC_DESC_HEADER Hdr;\r
- UINT16 Base;\r
- UINT16 Length;\r
- UINT32 Reserved;\r
+ STM_RSC_DESC_HEADER Hdr;\r
+ UINT16 Base;\r
+ UINT16 Length;\r
+ UINT32 Reserved;\r
} STM_RSC_IO_DESC;\r
\r
/**\r
STM Resource MMIO Descriptor\r
**/\r
typedef struct {\r
- STM_RSC_DESC_HEADER Hdr;\r
- UINT64 Base;\r
- UINT64 Length;\r
- UINT32 RWXAttributes:3;\r
- UINT32 Reserved:29;\r
- UINT32 Reserved_2;\r
+ STM_RSC_DESC_HEADER Hdr;\r
+ UINT64 Base;\r
+ UINT64 Length;\r
+ UINT32 RWXAttributes : 3;\r
+ UINT32 Reserved : 29;\r
+ UINT32 Reserved_2;\r
} STM_RSC_MMIO_DESC;\r
\r
/**\r
STM Resource MSR Descriptor\r
**/\r
typedef struct {\r
- STM_RSC_DESC_HEADER Hdr;\r
- UINT32 MsrIndex;\r
- UINT32 KernelModeProcessing:1;\r
- UINT32 Reserved:31;\r
- UINT64 ReadMask;\r
- UINT64 WriteMask;\r
+ STM_RSC_DESC_HEADER Hdr;\r
+ UINT32 MsrIndex;\r
+ UINT32 KernelModeProcessing : 1;\r
+ UINT32 Reserved : 31;\r
+ UINT64 ReadMask;\r
+ UINT64 WriteMask;\r
} STM_RSC_MSR_DESC;\r
\r
/**\r
///\r
/// Must be 1, indicating Hardware Device Path\r
///\r
- UINT8 Type;\r
+ UINT8 Type;\r
///\r
/// Must be 1, indicating PCI\r
///\r
- UINT8 Subtype;\r
+ UINT8 Subtype;\r
///\r
/// sizeof(STM_PCI_DEVICE_PATH_NODE) which is 6\r
///\r
- UINT16 Length;\r
- UINT8 PciFunction;\r
- UINT8 PciDevice;\r
+ UINT16 Length;\r
+ UINT8 PciFunction;\r
+ UINT8 PciDevice;\r
} STM_PCI_DEVICE_PATH_NODE;\r
\r
/**\r
STM Resource PCI Configuration Descriptor\r
**/\r
typedef struct {\r
- STM_RSC_DESC_HEADER Hdr;\r
- UINT16 RWAttributes:2;\r
- UINT16 Reserved:14;\r
- UINT16 Base;\r
- UINT16 Length;\r
- UINT8 OriginatingBusNumber;\r
- UINT8 LastNodeIndex;\r
- STM_PCI_DEVICE_PATH_NODE PciDevicePath[1];\r
-//STM_PCI_DEVICE_PATH_NODE PciDevicePath[LastNodeIndex + 1];\r
+ STM_RSC_DESC_HEADER Hdr;\r
+ UINT16 RWAttributes : 2;\r
+ UINT16 Reserved : 14;\r
+ UINT16 Base;\r
+ UINT16 Length;\r
+ UINT8 OriginatingBusNumber;\r
+ UINT8 LastNodeIndex;\r
+ STM_PCI_DEVICE_PATH_NODE PciDevicePath[1];\r
+ // STM_PCI_DEVICE_PATH_NODE PciDevicePath[LastNodeIndex + 1];\r
} STM_RSC_PCI_CFG_DESC;\r
\r
/**\r
STM Resource Trapped I/O Descriptor\r
**/\r
typedef struct {\r
- STM_RSC_DESC_HEADER Hdr;\r
- UINT16 Base;\r
- UINT16 Length;\r
- UINT16 In:1;\r
- UINT16 Out:1;\r
- UINT16 Api:1;\r
- UINT16 Reserved1:13;\r
- UINT16 Reserved2;\r
+ STM_RSC_DESC_HEADER Hdr;\r
+ UINT16 Base;\r
+ UINT16 Length;\r
+ UINT16 In : 1;\r
+ UINT16 Out : 1;\r
+ UINT16 Api : 1;\r
+ UINT16 Reserved1 : 13;\r
+ UINT16 Reserved2;\r
} STM_RSC_TRAPPED_IO_DESC;\r
\r
/**\r
STM Resource All Descriptor\r
**/\r
typedef struct {\r
- STM_RSC_DESC_HEADER Hdr;\r
+ STM_RSC_DESC_HEADER Hdr;\r
} STM_RSC_ALL_RESOURCES_DESC;\r
\r
/**\r
STM Register Violation Descriptor\r
**/\r
typedef struct {\r
- STM_RSC_DESC_HEADER Hdr;\r
- UINT32 RegisterType;\r
- UINT32 Reserved;\r
- UINT64 ReadMask;\r
- UINT64 WriteMask;\r
+ STM_RSC_DESC_HEADER Hdr;\r
+ UINT32 RegisterType;\r
+ UINT32 Reserved;\r
+ UINT64 ReadMask;\r
+ UINT64 WriteMask;\r
} STM_REGISTER_VIOLATION_DESC;\r
\r
/**\r
Union of all STM resource types\r
**/\r
typedef union {\r
- STM_RSC_DESC_HEADER Header;\r
- STM_RSC_END End;\r
- STM_RSC_MEM_DESC Mem;\r
- STM_RSC_IO_DESC Io;\r
- STM_RSC_MMIO_DESC Mmio;\r
- STM_RSC_MSR_DESC Msr;\r
- STM_RSC_PCI_CFG_DESC PciCfg;\r
- STM_RSC_TRAPPED_IO_DESC TrappedIo;\r
- STM_RSC_ALL_RESOURCES_DESC All;\r
- STM_REGISTER_VIOLATION_DESC RegisterViolation;\r
+ STM_RSC_DESC_HEADER Header;\r
+ STM_RSC_END End;\r
+ STM_RSC_MEM_DESC Mem;\r
+ STM_RSC_IO_DESC Io;\r
+ STM_RSC_MMIO_DESC Mmio;\r
+ STM_RSC_MSR_DESC Msr;\r
+ STM_RSC_PCI_CFG_DESC PciCfg;\r
+ STM_RSC_TRAPPED_IO_DESC TrappedIo;\r
+ STM_RSC_ALL_RESOURCES_DESC All;\r
+ STM_REGISTER_VIOLATION_DESC RegisterViolation;\r
} STM_RSC;\r
\r
#pragma pack ()\r