This header file contains all of the PXE type definitions,\r
structure prototypes, global variables and constants that\r
are needed for porting PXE to EFI.\r
- \r
- Copyright (c) 2006 - 2010, Intel Corporation \r
- All rights reserved. This program and the accompanying materials \r
- are licensed and made available under the terms and conditions of the BSD License \r
- which accompanies this distribution. The full text of the license may be found at \r
- http://opensource.org/licenses/bsd-license.php \r
- \r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
- \r
+\r
+Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials are licensed and made available under \r
+the terms and conditions of the BSD License that accompanies this distribution. \r
+The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php. \r
+ \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
@par Revision Reference:\r
32/64-bit PXE specification:\r
- alpha-4, 99-Dec-17\r
+ alpha-4, 99-Dec-17.\r
\r
- @attention The PXE_OPFLAGS_GET_MEDIA_STATUS and PXE_STATFLAGS_GET_STATUS_NO_MEDIA_xxx\r
- are not defined in current UEFI spec (v2.3, approved May, 09), they will be\r
- added by following erratas.\r
- \r
**/\r
\r
#ifndef __EFI_PXE_H__\r
)\r
\r
///\r
-/// UNDI ROM ID and devive ID signature\r
+/// UNDI ROM ID and devive ID signature.\r
///\r
#define PXE_BUSTYPE_PXE PXE_BUSTYPE ('!', 'P', 'X', 'E')\r
\r
///\r
-/// BUS ROM ID signatures\r
+/// BUS ROM ID signatures.\r
///\r
#define PXE_BUSTYPE_PCI PXE_BUSTYPE ('P', 'C', 'I', 'R')\r
#define PXE_BUSTYPE_PC_CARD PXE_BUSTYPE ('P', 'C', 'C', 'R')\r
typedef UINT16 PXE_UINT16;\r
typedef UINT32 PXE_UINT32;\r
typedef UINTN PXE_UINTN;\r
- \r
+\r
///\r
-/// typedef unsigned long PXE_UINT64;\r
+/// Typedef unsigned long PXE_UINT64.\r
///\r
typedef UINT64 PXE_UINT64;\r
\r
#define PXE_OPFLAGS_RESET_DISABLE_FILTERS 0x0002\r
\r
///\r
-/// UNDI Shutdown\r
+/// UNDI Shutdown.\r
///\r
-/// No OpFlags\r
+/// No OpFlags.\r
\r
///\r
-/// UNDI Interrupt Enables\r
+/// UNDI Interrupt Enables.\r
///\r
///\r
/// Select whether to enable or disable external interrupt signals.\r
///\r
#define PXE_OPFLAGS_INTERRUPT_SOFTWARE 0x0008\r
\r
-/// \r
-/// UNDI Receive Filters\r
+///\r
+/// UNDI Receive Filters.\r
///\r
///\r
/// Select whether to enable or disable receive filters.\r
///\r
#define PXE_OPFLAGS_RECEIVE_FILTER_ALL_MULTICAST 0x0010\r
\r
-/// \r
-/// UNDI Station Address\r
+///\r
+/// UNDI Station Address.\r
///\r
#define PXE_OPFLAGS_STATION_ADDRESS_READ 0x0000\r
#define PXE_OPFLAGS_STATION_ADDRESS_WRITE 0x0000\r
#define PXE_OPFLAGS_STATION_ADDRESS_RESET 0x0001\r
\r
///\r
-/// UNDI Statistics\r
+/// UNDI Statistics.\r
///\r
#define PXE_OPFLAGS_STATISTICS_READ 0x0000\r
#define PXE_OPFLAGS_STATISTICS_RESET 0x0001\r
\r
///\r
-/// UNDI MCast IP to MAC\r
+/// UNDI MCast IP to MAC.\r
///\r
///\r
/// Identify the type of IP address in the CPB.\r
#define PXE_OPFLAGS_MCAST_IPV6_TO_MAC 0x0001\r
\r
///\r
-/// UNDI NvData\r
+/// UNDI NvData.\r
///\r
///\r
/// Select the type of non-volatile data operation.\r
#define PXE_OPFLAGS_NVDATA_WRITE 0x0001\r
\r
///\r
-/// UNDI Get Status\r
+/// UNDI Get Status.\r
///\r
///\r
/// Return current interrupt status. This will also clear any interrupts\r
#define PXE_OPFLAGS_GET_MEDIA_STATUS 0x0004\r
\r
///\r
-/// UNDI Fill Header\r
+/// UNDI Fill Header.\r
///\r
#define PXE_OPFLAGS_FILL_HEADER_OPMASK 0x0001\r
#define PXE_OPFLAGS_FILL_HEADER_FRAGMENTED 0x0001\r
#define PXE_OPFLAGS_FILL_HEADER_WHOLE 0x0000\r
\r
///\r
-/// UNDI Transmit\r
+/// UNDI Transmit.\r
///\r
///\r
/// S/W UNDI only. Return after the packet has been transmitted. A\r
#define PXE_OPFLAGS_TRANSMIT_FRAGMENTED 0x0002\r
#define PXE_OPFLAGS_TRANSMIT_WHOLE 0x0000\r
\r
-/// \r
-/// UNDI Receive\r
///\r
-/// No OpFlags\r
+/// UNDI Receive.\r
+///\r
+/// No OpFlags.\r
///\r
\r
///\r
-/// PXE STATFLAGS\r
+/// PXE STATFLAGS.\r
///\r
typedef PXE_UINT16 PXE_STATFLAGS;\r
\r
#define PXE_STATFLAGS_COMMAND_QUEUED 0x4000\r
\r
///\r
-/// UNDI Get State\r
+/// UNDI Get State.\r
///\r
#define PXE_STATFLAGS_GET_STATE_MASK 0x0003\r
#define PXE_STATFLAGS_GET_STATE_INITIALIZED 0x0002\r
#define PXE_STATFLAGS_GET_STATE_STOPPED 0x0000\r
\r
///\r
-/// UNDI Start\r
+/// UNDI Start.\r
///\r
-/// No additional StatFlags\r
+/// No additional StatFlags.\r
///\r
\r
///\r
-/// UNDI Get Init Info\r
+/// UNDI Get Init Info.\r
///\r
#define PXE_STATFLAGS_CABLE_DETECT_MASK 0x0001\r
#define PXE_STATFLAGS_CABLE_DETECT_NOT_SUPPORTED 0x0000\r
#define PXE_STATFLAGS_GET_STATUS_NO_MEDIA_SUPPORTED 0x0002\r
\r
///\r
-/// UNDI Initialize\r
+/// UNDI Initialize.\r
///\r
#define PXE_STATFLAGS_INITIALIZED_NO_MEDIA 0x0001\r
\r
///\r
-/// UNDI Reset\r
+/// UNDI Reset.\r
///\r
#define PXE_STATFLAGS_RESET_NO_MEDIA 0x0001\r
\r
///\r
-/// UNDI Shutdown\r
+/// UNDI Shutdown.\r
///\r
-/// No additional StatFlags\r
+/// No additional StatFlags.\r
\r
///\r
-/// UNDI Interrupt Enables\r
+/// UNDI Interrupt Enables.\r
///\r
///\r
/// If set, receive interrupts are enabled.\r
#define PXE_STATFLAGS_INTERRUPT_COMMAND 0x0004\r
\r
///\r
-/// UNDI Receive Filters\r
+/// UNDI Receive Filters.\r
///\r
\r
///\r
#define PXE_STATFLAGS_RECEIVE_FILTER_ALL_MULTICAST 0x0010\r
\r
///\r
-/// UNDI Station Address\r
+/// UNDI Station Address.\r
///\r
-/// No additional StatFlags\r
+/// No additional StatFlags.\r
///\r
\r
///\r
-/// UNDI Statistics\r
+/// UNDI Statistics.\r
///\r
-/// No additional StatFlags\r
+/// No additional StatFlags.\r
///\r
\r
///\r
-//// UNDI MCast IP to MAC\r
+//// UNDI MCast IP to MAC.\r
////\r
-//// No additional StatFlags\r
+//// No additional StatFlags.\r
\r
///\r
-/// UNDI NvData\r
+/// UNDI NvData.\r
///\r
-/// No additional StatFlags\r
+/// No additional StatFlags.\r
///\r
\r
///\r
-/// UNDI Get Status\r
+/// UNDI Get Status.\r
///\r
\r
///\r
#define PXE_STATFLAGS_GET_STATUS_NO_MEDIA 0x0040\r
\r
///\r
-/// UNDI Fill Header\r
+/// UNDI Fill Header.\r
///\r
-/// No additional StatFlags\r
+/// No additional StatFlags.\r
///\r
\r
///\r
-/// UNDI Transmit\r
+/// UNDI Transmit.\r
///\r
/// No additional StatFlags.\r
\r
///\r
/// UNDI Receive\r
-///\r
+///.\r
\r
///\r
/// No additional StatFlags.\r
#define PXE_FRAME_TYPE_PROMISCUOUS 0x04\r
#define PXE_FRAME_TYPE_PROMISCUOUS_MULTICAST 0x05\r
\r
-#define PXE_FRAME_TYPE_MULTICAST PXE_FRAME_TYPE_FILTERED_MULTICAST \r
+#define PXE_FRAME_TYPE_MULTICAST PXE_FRAME_TYPE_FILTERED_MULTICAST\r
\r
typedef PXE_UINT32 PXE_IPV4;\r
\r
#define PXE_IFTYPE_FIBRE_CHANNEL 0x12\r
\r
typedef struct s_pxe_hw_undi {\r
- PXE_UINT32 Signature; ///< PXE_ROMID_SIGNATURE\r
- PXE_UINT8 Len; ///< sizeof(PXE_HW_UNDI)\r
- PXE_UINT8 Fudge; ///< makes 8-bit cksum equal zero\r
- PXE_UINT8 Rev; ///< PXE_ROMID_REV\r
- PXE_UINT8 IFcnt; ///< physical connector count\r
- PXE_UINT8 MajorVer; ///< PXE_ROMID_MAJORVER\r
- PXE_UINT8 MinorVer; ///< PXE_ROMID_MINORVER\r
- PXE_UINT16 reserved; ///< zero, not used\r
- PXE_UINT32 Implementation; ///< implementation flags\r
- ///< reserved ///< vendor use\r
- ///< UINT32 Status; ///< status port\r
- ///< UINT32 Command; ///< command port\r
- ///< UINT64 CDBaddr; ///< CDB address port\r
+ PXE_UINT32 Signature; ///< PXE_ROMID_SIGNATURE.\r
+ PXE_UINT8 Len; ///< sizeof(PXE_HW_UNDI).\r
+ PXE_UINT8 Fudge; ///< makes 8-bit cksum equal zero.\r
+ PXE_UINT8 Rev; ///< PXE_ROMID_REV.\r
+ PXE_UINT8 IFcnt; ///< physical connector count lower byte.\r
+ PXE_UINT8 MajorVer; ///< PXE_ROMID_MAJORVER.\r
+ PXE_UINT8 MinorVer; ///< PXE_ROMID_MINORVER.\r
+ PXE_UINT8 IFcntExt; ///< physical connector count upper byte.\r
+ PXE_UINT8 reserved; ///< zero, not used.\r
+ PXE_UINT32 Implementation; ///< implementation flags.\r
+ ///< reserved ///< vendor use.\r
+ ///< UINT32 Status; ///< status port.\r
+ ///< UINT32 Command; ///< command port.\r
+ ///< UINT64 CDBaddr; ///< CDB address port.\r
///<\r
} PXE_HW_UNDI;\r
\r
///\r
-/// Status port bit definitions\r
+/// Status port bit definitions.\r
///\r
\r
///\r
-/// UNDI operation state\r
+/// UNDI operation state.\r
///\r
#define PXE_HWSTAT_STATE_MASK 0xC0000000\r
#define PXE_HWSTAT_BUSY 0xC0000000\r
#define PXE_HWSTAT_STOPPED 0x00000000\r
\r
///\r
-/// If set, last command failed\r
+/// If set, last command failed.\r
///\r
#define PXE_HWSTAT_COMMAND_FAILED 0x20000000\r
\r
///\r
-/// If set, identifies enabled receive filters\r
+/// If set, identifies enabled receive filters.\r
///\r
#define PXE_HWSTAT_PROMISCUOUS_MULTICAST_RX_ENABLED 0x00001000\r
#define PXE_HWSTAT_PROMISCUOUS_RX_ENABLED 0x00000800\r
#define PXE_HWSTAT_UNICAST_RX_ENABLED 0x00000100\r
\r
///\r
-/// If set, identifies enabled external interrupts\r
+/// If set, identifies enabled external interrupts.\r
///\r
#define PXE_HWSTAT_SOFTWARE_INT_ENABLED 0x00000080\r
#define PXE_HWSTAT_TX_COMPLETE_INT_ENABLED 0x00000040\r
#define PXE_HWSTAT_CMD_COMPLETE_INT_ENABLED 0x00000010\r
\r
///\r
-/// If set, identifies pending interrupts\r
+/// If set, identifies pending interrupts.\r
///\r
#define PXE_HWSTAT_SOFTWARE_INT_PENDING 0x00000008\r
#define PXE_HWSTAT_TX_COMPLETE_INT_PENDING 0x00000004\r
#define PXE_HWSTAT_CMD_COMPLETE_INT_PENDING 0x00000001\r
\r
///\r
-/// Command port definitions\r
+/// Command port definitions.\r
///\r
\r
///\r
#define PXE_HWCMD_UNICAST_RX_ENABLE 0x00000100\r
\r
///\r
-/// Use these to enable/disable external interrupts\r
+/// Use these to enable/disable external interrupts.\r
///\r
#define PXE_HWCMD_SOFTWARE_INT_ENABLE 0x00000080\r
#define PXE_HWCMD_TX_COMPLETE_INT_ENABLE 0x00000040\r
#define PXE_HWCMD_CMD_COMPLETE_INT_ENABLE 0x00000010\r
\r
///\r
-/// Use these to clear pending external interrupts\r
+/// Use these to clear pending external interrupts.\r
///\r
#define PXE_HWCMD_CLEAR_SOFTWARE_INT 0x00000008\r
#define PXE_HWCMD_CLEAR_TX_COMPLETE_INT 0x00000004\r
#define PXE_HWCMD_CLEAR_CMD_COMPLETE_INT 0x00000001\r
\r
typedef struct s_pxe_sw_undi {\r
- PXE_UINT32 Signature; ///< PXE_ROMID_SIGNATURE\r
- PXE_UINT8 Len; ///< sizeof(PXE_SW_UNDI)\r
- PXE_UINT8 Fudge; ///< makes 8-bit cksum zero\r
- PXE_UINT8 Rev; ///< PXE_ROMID_REV\r
- PXE_UINT8 IFcnt; ///< physical connector count\r
- PXE_UINT8 MajorVer; ///< PXE_ROMID_MAJORVER\r
- PXE_UINT8 MinorVer; ///< PXE_ROMID_MINORVER\r
- PXE_UINT16 reserved1; ///< zero, not used\r
- PXE_UINT32 Implementation; ///< Implementation flags\r
- PXE_UINT64 EntryPoint; ///< API entry point\r
- PXE_UINT8 reserved2[3]; ///< zero, not used\r
- PXE_UINT8 BusCnt; ///< number of bustypes supported\r
- PXE_UINT32 BusType[1]; ///< list of supported bustypes\r
+ PXE_UINT32 Signature; ///< PXE_ROMID_SIGNATURE.\r
+ PXE_UINT8 Len; ///< sizeof(PXE_SW_UNDI).\r
+ PXE_UINT8 Fudge; ///< makes 8-bit cksum zero.\r
+ PXE_UINT8 Rev; ///< PXE_ROMID_REV.\r
+ PXE_UINT8 IFcnt; ///< physical connector count lower byte.\r
+ PXE_UINT8 MajorVer; ///< PXE_ROMID_MAJORVER.\r
+ PXE_UINT8 MinorVer; ///< PXE_ROMID_MINORVER.\r
+ PXE_UINT8 IFcntExt; ///< physical connector count upper byte.\r
+ PXE_UINT8 reserved1; ///< zero, not used.\r
+ PXE_UINT32 Implementation; ///< Implementation flags.\r
+ PXE_UINT64 EntryPoint; ///< API entry point.\r
+ PXE_UINT8 reserved2[3]; ///< zero, not used.\r
+ PXE_UINT8 BusCnt; ///< number of bustypes supported.\r
+ PXE_UINT32 BusType[1]; ///< list of supported bustypes.\r
} PXE_SW_UNDI;\r
\r
typedef union u_pxe_undi {\r
} PXE_UNDI;\r
\r
///\r
-/// Signature of !PXE structure\r
+/// Signature of !PXE structure.\r
///\r
#define PXE_ROMID_SIGNATURE PXE_BUSTYPE ('!', 'P', 'X', 'E')\r
\r
///\r
/// !PXE structure format revision\r
-///\r
+///.\r
#define PXE_ROMID_REV 0x02\r
\r
///\r
#define PXE_ROMID_MINORVER 0x01\r
\r
///\r
-/// Implementation flags\r
+/// Implementation flags.\r
///\r
#define PXE_ROMID_IMP_HW_UNDI 0x80000000\r
#define PXE_ROMID_IMP_SW_VIRT_ADDR 0x40000000\r
///\r
/// cpb and db definitions\r
///\r
-#define MAX_PCI_CONFIG_LEN 64 ///< # of dwords\r
-#define MAX_EEPROM_LEN 128 ///< # of dwords\r
-#define MAX_XMIT_BUFFERS 32 ///< recycling Q length for xmit_done\r
+#define MAX_PCI_CONFIG_LEN 64 ///< # of dwords.\r
+#define MAX_EEPROM_LEN 128 ///< # of dwords.\r
+#define MAX_XMIT_BUFFERS 32 ///< recycling Q length for xmit_done.\r
#define MAX_MCAST_ADDRESS_CNT 8\r
\r
typedef struct s_pxe_cpb_start_30 {\r
/// used with the DMA, it converts the given virtual address to it's\r
/// physical address and write that in the mapped address pointer.\r
///\r
- /// This field can be set to zero if there is no mapping service available\r
+ /// This field can be set to zero if there is no mapping service available.\r
///\r
UINT64 Map_Mem;\r
\r
/// PXE_VOID UnMap_Mem(UINT64 unq_id, UINT64 virtual_addr, UINT32 size,\r
/// UINT32 Direction, UINT64 mapped_addr);\r
///\r
- /// UNDI will pass the virtual and mapped addresses of a buffer\r
- /// This call will un map the given address\r
+ /// UNDI will pass the virtual and mapped addresses of a buffer.\r
+ /// This call will un map the given address.\r
///\r
- /// This field can be set to zero if there is no unmapping service available\r
+ /// This field can be set to zero if there is no unmapping service available.\r
///\r
UINT64 UnMap_Mem;\r
\r
/// PXE_VOID Sync_Mem(UINT64 unq_id, UINT64 virtual,\r
/// UINT32 size, UINT32 Direction, UINT64 mapped_addr);\r
///\r
- /// UNDI will pass the virtual and mapped addresses of a buffer\r
- /// This call will synchronize the contents of both the virtual and mapped\r
+ /// UNDI will pass the virtual and mapped addresses of a buffer.\r
+ /// This call will synchronize the contents of both the virtual and mapped.\r
/// buffers for the given Direction.\r
///\r
- /// This field can be set to zero if there is no service available\r
+ /// This field can be set to zero if there is no service available.\r
///\r
UINT64 Sync_Mem;\r
\r
///\r
/// protocol driver can provide anything for this Unique_ID, UNDI remembers\r
- /// that as just a 64bit value assocaited to the interface specified by\r
+ /// that as just a 64bit value associated to the interface specified by\r
/// the ifnum and gives it back as a parameter to all the call-back routines\r
/// when calling for that interface!\r
///\r
UINT32 BusType;\r
\r
///\r
- /// This identifies the PCI network device that this UNDI interface\r
+ /// This identifies the PCI network device that this UNDI interface.\r
/// is bound to.\r
///\r
UINT16 Bus;\r
///\r
#define PXE_STATISTICS_UNSUPPORTED_PROTOCOL 0x15\r
\r
+///\r
+/// Number of valid frames received that were duplicated.\r
+///\r
+#define PXE_STATISTICS_RX_DUPLICATED_FRAMES 0x16\r
+\r
+///\r
+/// Number of encrypted frames received that failed to decrypt.\r
+///\r
+#define PXE_STATISTICS_RX_DECRYPT_ERROR_FRAMES 0x17\r
+\r
+///\r
+/// Number of frames that failed to transmit after exceeding the retry limit.\r
+///\r
+#define PXE_STATISTICS_TX_ERROR_FRAMES 0x18\r
+\r
+///\r
+/// Number of frames transmitted successfully after more than one attempt.\r
+///\r
+#define PXE_STATISTICS_TX_RETRY_FRAMES 0x19\r
+\r
typedef struct s_pxe_cpb_mcast_ip_to_mac {\r
///\r
/// Multicast IP address to be converted to multicast MAC address.\r
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