Minor grammatical work--mostly adding periods. Sending separately a list of files...

[mirror_edk2.git] / MdePkg / Library / BaseCpuLib / Ipf / CpuSleep.c

diff --git a/MdePkg/Library/BaseCpuLib/Ipf/CpuSleep.c b/MdePkg/Library/BaseCpuLib/Ipf/CpuSleep.c
index 5ad64a5cf4a967f202cc0c2d66ad6db3923922c3..59c07cac72a363ebc55bbda0e8e4d80ef52c80cf 100644 (file)
--- a/MdePkg/Library/BaseCpuLib/Ipf/CpuSleep.c
+++ b/MdePkg/Library/BaseCpuLib/Ipf/CpuSleep.c
@@ -1,18 +1,19 @@
 /** @file\r
   Base Library CPU functions for Itanium\r
 \r
-  Copyright (c) 2006, Intel Corporation<BR>\r
-  All rights reserved. This program and the accompanying materials\r
+  Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
+  This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
-  http://opensource.org/licenses/bsd-license.php\r
+  http://opensource.org/licenses/bsd-license.php.\r
 \r
   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
 \r
 **/\r
 \r
-#include <Library/PalCallLib.h>\r
+#include <Library/PalLib.h>\r
+#include <Library/BaseLib.h>\r
 \r
 /**\r
   Places the CPU in a sleep state until an interrupt is received.\r
@@ -28,5 +29,38 @@ CpuSleep (
   VOID\r
   )\r
 {\r
-  PalCall (29, 0, 0, 0);\r
+  UINT64  Tpr;\r
+\r
+  //\r
+  // It is the TPR register that controls if external interrupt would bring processor in LIGHT HALT low-power state\r
+  // back to normal state. PAL_HALT_LIGHT does not depend on PSR setting.\r
+  // So here if interrupts are disabled (via PSR.i), TRP.mmi needs to be set to prevent processor being interrupted by external interrupts.\r
+  // If interrupts are enabled, then just use current TRP setting.\r
+  //\r
+  if (GetInterruptState ()) {\r
+    //\r
+    // If interrupts are enabled, then call PAL_HALT_LIGHT with the current TPR setting.\r
+    //\r
+    PalCall (PAL_HALT_LIGHT, 0, 0, 0);\r
+  } else {\r
+    //\r
+    // If interrupts are disabled on entry, then mask all interrupts in TPR before calling PAL_HALT_LIGHT.\r
+    //\r
+\r
+    //\r
+    // Save TPR\r
+    //\r
+    Tpr = AsmReadTpr();\r
+    //\r
+    // Set TPR.mmi to mask all external interrupts\r
+    //\r
+    AsmWriteTpr (BIT16 | Tpr);\r
+\r
+    PalCall (PAL_HALT_LIGHT, 0, 0, 0);\r
+\r
+    //\r
+    // Restore TPR\r
+    //\r
+    AsmWriteTpr (Tpr);\r
+  }\r
 }\r