Removed cross references from PciCf8Lib and PciExpressLib class to PciLib class.

[mirror_edk2.git] / MdePkg / Library / BaseIoLibIntrinsic / IoLibGcc.c

diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c
index a065c14299b7f4eb764821237d2448264392aab7..69fb878888fdd532ed48ae1193ce6b767a39a694 100644 (file)
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c
@@ -25,6 +25,198 @@
 \r
 #ifdef __GNUC__\r
 \r
+/**\r
+  Reads an 8-bit MMIO register.\r
+\r
+  Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r
+  returned. This function must guarantee that all MMIO read and write\r
+  operations are serialized.\r
+\r
+  If 8-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+MmioRead8 (\r
+  IN      UINTN                     Address\r
+  )\r
+{\r
+  return *(volatile UINT8*)Address;\r
+}\r
+\r
+/**\r
+  Writes an 8-bit MMIO register.\r
+\r
+  Writes the 8-bit MMIO register specified by Address with the value specified\r
+  by Value and returns Value. This function must guarantee that all MMIO read\r
+  and write operations are serialized.\r
+\r
+  If 8-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  Value   The value to write to the MMIO register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+MmioWrite8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT8                     Value\r
+  )\r
+{\r
+  return *(volatile UINT8*)Address = Value;\r
+}\r
+\r
+/**\r
+  Reads a 16-bit MMIO register.\r
+\r
+  Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r
+  returned. This function must guarantee that all MMIO read and write\r
+  operations are serialized.\r
+\r
+  If 16-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+MmioRead16 (\r
+  IN      UINTN                     Address\r
+  )\r
+{\r
+  ASSERT ((Address & 1) == 0);\r
+  return *(volatile UINT16*)Address;\r
+}\r
+\r
+/**\r
+  Writes a 16-bit MMIO register.\r
+\r
+  Writes the 16-bit MMIO register specified by Address with the value specified\r
+  by Value and returns Value. This function must guarantee that all MMIO read\r
+  and write operations are serialized.\r
+\r
+  If 16-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  Value   The value to write to the MMIO register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+MmioWrite16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT16                    Value\r
+  )\r
+{\r
+  ASSERT ((Address & 1) == 0);\r
+  return *(volatile UINT16*)Address = Value;\r
+}\r
+\r
+/**\r
+  Reads a 32-bit MMIO register.\r
+\r
+  Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r
+  returned. This function must guarantee that all MMIO read and write\r
+  operations are serialized.\r
+\r
+  If 32-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+MmioRead32 (\r
+  IN      UINTN                     Address\r
+  )\r
+{\r
+  ASSERT ((Address & 3) == 0);\r
+  return *(volatile UINT32*)Address;\r
+}\r
+\r
+/**\r
+  Writes a 32-bit MMIO register.\r
+\r
+  Writes the 32-bit MMIO register specified by Address with the value specified\r
+  by Value and returns Value. This function must guarantee that all MMIO read\r
+  and write operations are serialized.\r
+\r
+  If 32-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  Value   The value to write to the MMIO register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+MmioWrite32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT32                    Value\r
+  )\r
+{\r
+  ASSERT ((Address & 3) == 0);\r
+  return *(volatile UINT32*)Address = Value;\r
+}\r
+\r
+/**\r
+  Reads a 64-bit MMIO register.\r
+\r
+  Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r
+  returned. This function must guarantee that all MMIO read and write\r
+  operations are serialized.\r
+\r
+  If 64-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+MmioRead64 (\r
+  IN      UINTN                     Address\r
+  )\r
+{\r
+  ASSERT ((Address & 7) == 0);\r
+  return *(volatile UINT64*)Address;\r
+}\r
+\r
+/**\r
+  Writes a 64-bit MMIO register.\r
+\r
+  Writes the 64-bit MMIO register specified by Address with the value specified\r
+  by Value and returns Value. This function must guarantee that all MMIO read\r
+  and write operations are serialized.\r
+\r
+  If 64-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  Value   The value to write to the MMIO register.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+MmioWrite64 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT64                    Value\r
+  )\r
+{\r
+  ASSERT ((Address & 7) == 0);\r
+  return *(volatile UINT64*)Address = Value;\r
+}\r
+\r
+\r
+\r
 /**\r
   Reads an 8-bit I/O port.\r
 \r