]> git.proxmox.com Git - mirror_edk2.git/blobdiff - MdePkg/Library/BaseLib/BaseLib.inf
MdePkg BaseLib: Convert Ia32/WriteCr3.asm to NASM
[mirror_edk2.git] / MdePkg / Library / BaseLib / BaseLib.inf
index 6fa32bdc03df6feace724ba8b3a46365ddebc56a..61fd7b7c33362982e4ab2ef56d500bb5eda955f4 100644 (file)
   Ia32/EnablePaging32.c | MSFT \r
   Ia32/EnableInterrupts.c | MSFT \r
   Ia32/EnableDisableInterrupts.c | MSFT \r
+  Ia32/DivU64x64Remainder.nasm| MSFT\r
   Ia32/DivU64x64Remainder.asm | MSFT \r
   Ia32/DivU64x32Remainder.c | MSFT \r
   Ia32/DivU64x32.c | MSFT \r
   Ia32/CpuId.c | MSFT \r
   Ia32/CpuBreakpoint.c | MSFT \r
   Ia32/ARShiftU64.c | MSFT \r
+  Ia32/Thunk16.nasm | MSFT\r
   Ia32/Thunk16.asm | MSFT\r
+  Ia32/EnablePaging64.nasm| MSFT\r
   Ia32/EnablePaging64.asm | MSFT\r
   Ia32/EnableCache.c | MSFT\r
   Ia32/DisableCache.c | MSFT\r
+  Ia32/RdRand.nasm| MSFT\r
   Ia32/RdRand.asm | MSFT\r
 \r
+  Ia32/Wbinvd.nasm| INTEL\r
   Ia32/Wbinvd.asm | INTEL \r
+  Ia32/WriteMm7.nasm| INTEL\r
   Ia32/WriteMm7.asm | INTEL \r
+  Ia32/WriteMm6.nasm| INTEL\r
   Ia32/WriteMm6.asm | INTEL \r
+  Ia32/WriteMm5.nasm| INTEL\r
   Ia32/WriteMm5.asm | INTEL \r
+  Ia32/WriteMm4.nasm| INTEL\r
   Ia32/WriteMm4.asm | INTEL \r
+  Ia32/WriteMm3.nasm| INTEL\r
   Ia32/WriteMm3.asm | INTEL \r
+  Ia32/WriteMm2.nasm| INTEL\r
   Ia32/WriteMm2.asm | INTEL \r
+  Ia32/WriteMm1.nasm| INTEL\r
   Ia32/WriteMm1.asm | INTEL \r
+  Ia32/WriteMm0.nasm| INTEL\r
   Ia32/WriteMm0.asm | INTEL \r
+  Ia32/WriteLdtr.nasm| INTEL\r
   Ia32/WriteLdtr.asm | INTEL \r
+  Ia32/WriteIdtr.nasm| INTEL\r
   Ia32/WriteIdtr.asm | INTEL \r
+  Ia32/WriteGdtr.nasm| INTEL\r
   Ia32/WriteGdtr.asm | INTEL \r
+  Ia32/WriteDr7.nasm| INTEL\r
   Ia32/WriteDr7.asm | INTEL \r
+  Ia32/WriteDr6.nasm| INTEL\r
   Ia32/WriteDr6.asm | INTEL \r
+  Ia32/WriteDr5.nasm| INTEL\r
   Ia32/WriteDr5.asm | INTEL \r
+  Ia32/WriteDr4.nasm| INTEL\r
   Ia32/WriteDr4.asm | INTEL \r
+  Ia32/WriteDr3.nasm| INTEL\r
   Ia32/WriteDr3.asm | INTEL \r
+  Ia32/WriteDr2.nasm| INTEL\r
   Ia32/WriteDr2.asm | INTEL \r
+  Ia32/WriteDr1.nasm| INTEL\r
   Ia32/WriteDr1.asm | INTEL \r
+  Ia32/WriteDr0.nasm| INTEL\r
   Ia32/WriteDr0.asm | INTEL \r
+  Ia32/WriteCr4.nasm| INTEL\r
   Ia32/WriteCr4.asm | INTEL \r
+  Ia32/WriteCr3.nasm| INTEL\r
   Ia32/WriteCr3.asm | INTEL \r
   Ia32/WriteCr2.asm | INTEL \r
   Ia32/WriteCr0.asm | INTEL \r
   Ia32/EnablePaging32.asm | INTEL \r
   Ia32/EnableInterrupts.asm | INTEL \r
   Ia32/EnableDisableInterrupts.asm | INTEL \r
+  Ia32/DivU64x64Remainder.nasm| INTEL\r
   Ia32/DivU64x64Remainder.asm | INTEL \r
   Ia32/DivU64x32Remainder.asm | INTEL \r
   Ia32/DivU64x32.asm | INTEL \r
   Ia32/CpuId.asm | INTEL \r
   Ia32/CpuBreakpoint.asm | INTEL \r
   Ia32/ARShiftU64.asm | INTEL \r
+  Ia32/Thunk16.nasm | INTEL\r
   Ia32/Thunk16.asm | INTEL\r
+  Ia32/EnablePaging64.nasm| INTEL\r
   Ia32/EnablePaging64.asm | INTEL\r
   Ia32/EnableCache.asm | INTEL\r
   Ia32/DisableCache.asm | INTEL\r
+  Ia32/RdRand.nasm| INTEL\r
   Ia32/RdRand.asm | INTEL\r
 \r
   Ia32/GccInline.c | GCC\r
   Ia32/Thunk16.nasm | GCC \r
   Ia32/Thunk16.S | XCODE \r
   Ia32/EnableDisableInterrupts.S | GCC \r
+  Ia32/EnablePaging64.nasm| GCC\r
   Ia32/EnablePaging64.S | GCC \r
   Ia32/DisablePaging32.S | GCC \r
   Ia32/EnablePaging32.S | GCC \r
   Ia32/LongJump.S | GCC \r
   Ia32/SetJump.S | GCC \r
   Ia32/SwapBytes64.S | GCC \r
+  Ia32/DivU64x64Remainder.nasm| GCC\r
   Ia32/DivU64x64Remainder.S | GCC \r
   Ia32/DivU64x32Remainder.S | GCC \r
   Ia32/ModU64x32.S | GCC \r
   Ia32/LShiftU64.S | GCC \r
   Ia32/EnableCache.S | GCC\r
   Ia32/DisableCache.S | GCC\r
+  Ia32/RdRand.nasm| GCC\r
   Ia32/RdRand.S | GCC\r
 \r
   Ia32/DivS64x64Remainder.c\r
   X86DisablePaging32.c\r
 \r
 [Sources.X64]\r
+  X64/Thunk16.nasm\r
   X64/Thunk16.asm\r
   X64/CpuIdEx.asm\r
   X64/CpuId.asm\r
   X86DisablePaging64.c\r
   X86DisablePaging32.c\r
   X64/GccInline.c | GCC\r
-  X64/Thunk16.nasm | GCC \r
   X64/Thunk16.S | XCODE \r
   X64/SwitchStack.S | GCC \r
   X64/SetJump.S | GCC \r