]> git.proxmox.com Git - mirror_edk2.git/blobdiff - MdePkg/Library/BaseLib/BaseLib.inf
MdeModulePkg, MdePkg, NetworkPkg, OvmfPkg, PerformancePkg, ShellPkg: Library Migration.
[mirror_edk2.git] / MdePkg / Library / BaseLib / BaseLib.inf
index cad014dce47b154e97f8698fd34133b999e0f2e5..fc0cb9638baaf23496b4589b0c08207299a54358 100644 (file)
@@ -1,32 +1,34 @@
-#/** @file\r
+## @file\r
 #  Base Library implementation.\r
 #\r
-#  Copyright (c) 2007 - 2009, Intel Corporation.<BR>\r
-#  Portions Copyright (c) 2008-2009 Apple Inc.<BR>\r
+#  Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>\r
+#  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+#  Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r
 #\r
-#  All rights reserved. This program and the accompanying materials\r
+#  This program and the accompanying materials\r
 #  are licensed and made available under the terms and conditions of the BSD License\r
 #  which accompanies this distribution. The full text of the license may be found at\r
-#  http://opensource.org/licenses/bsd-license.php\r
+#  http://opensource.org/licenses/bsd-license.php.\r
 #  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
 #  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
 #\r
 #\r
-#**/\r
+##\r
 \r
 [Defines]\r
   INF_VERSION                    = 0x00010005\r
   BASE_NAME                      = BaseLib\r
+  MODULE_UNI_FILE                = BaseLib.uni\r
   FILE_GUID                      = 27d67720-ea68-48ae-93da-a3a074c90e30\r
   MODULE_TYPE                    = BASE\r
   VERSION_STRING                 = 1.0\r
   LIBRARY_CLASS                  = BaseLib \r
 \r
 #\r
-#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC ARM\r
+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC ARM AARCH64\r
 #\r
 \r
-[Sources.common]\r
+[Sources]\r
   CheckSum.c\r
   SwitchStack.c\r
   SwapBytes64.c\r
@@ -59,7 +61,9 @@
   CpuDeadLoop.c\r
   Cpu.c\r
   LinkedList.c\r
+  SafeString.c\r
   String.c\r
+  FilePaths.c\r
   BaseLibInternals.h\r
 \r
 [Sources.Ia32]\r
   Ia32/EnableCache.asm | INTEL\r
   Ia32/DisableCache.asm | INTEL\r
 \r
-  Ia32/Thunk16.S | GCC \r
-  Ia32/CpuBreakpoint.S | GCC \r
-  Ia32/CpuPause.S | GCC \r
+  Ia32/GccInline.c | GCC\r
+  Ia32/Thunk16.nasm | GCC \r
   Ia32/EnableDisableInterrupts.S | GCC \r
-  Ia32/DisableInterrupts.S | GCC \r
-  Ia32/EnableInterrupts.S | GCC \r
-  Ia32/FlushCacheLine.S | GCC \r
-  Ia32/Invd.S | GCC \r
-  Ia32/Wbinvd.S | GCC \r
   Ia32/EnablePaging64.S | GCC \r
   Ia32/DisablePaging32.S | GCC \r
   Ia32/EnablePaging32.S | GCC \r
   Ia32/Mwait.S | GCC \r
   Ia32/Monitor.S | GCC \r
-  Ia32/ReadPmc.S | GCC \r
-  Ia32/ReadTsc.S | GCC \r
-  Ia32/WriteMm7.S | GCC \r
-  Ia32/WriteMm6.S | GCC \r
-  Ia32/WriteMm5.S | GCC \r
-  Ia32/WriteMm4.S | GCC \r
-  Ia32/WriteMm3.S | GCC \r
-  Ia32/WriteMm2.S | GCC \r
-  Ia32/WriteMm1.S | GCC \r
-  Ia32/WriteMm0.S | GCC \r
-  Ia32/ReadMm7.S | GCC \r
-  Ia32/ReadMm6.S | GCC \r
-  Ia32/ReadMm5.S | GCC \r
-  Ia32/ReadMm4.S | GCC \r
-  Ia32/ReadMm3.S | GCC \r
-  Ia32/ReadMm2.S | GCC \r
-  Ia32/ReadMm1.S | GCC \r
-  Ia32/ReadMm0.S | GCC \r
-  Ia32/FxRestore.S | GCC \r
-  Ia32/FxSave.S | GCC \r
-  Ia32/WriteLdtr.S | GCC \r
-  Ia32/ReadLdtr.S | GCC \r
-  Ia32/WriteIdtr.S | GCC \r
-  Ia32/ReadIdtr.S | GCC \r
-  Ia32/WriteGdtr.S | GCC \r
-  Ia32/ReadGdtr.S | GCC \r
-  Ia32/ReadTr.S | GCC \r
-  Ia32/ReadSs.S | GCC \r
-  Ia32/ReadGs.S | GCC \r
-  Ia32/ReadFs.S | GCC \r
-  Ia32/ReadEs.S | GCC \r
-  Ia32/ReadDs.S | GCC \r
-  Ia32/ReadCs.S | GCC \r
-  Ia32/WriteDr7.S | GCC \r
-  Ia32/WriteDr6.S | GCC \r
-  Ia32/WriteDr5.S | GCC \r
-  Ia32/WriteDr4.S | GCC \r
-  Ia32/WriteDr3.S | GCC \r
-  Ia32/WriteDr2.S | GCC \r
-  Ia32/WriteDr1.S | GCC \r
-  Ia32/WriteDr0.S | GCC \r
-  Ia32/ReadDr7.S | GCC \r
-  Ia32/ReadDr6.S | GCC \r
-  Ia32/ReadDr5.S | GCC \r
-  Ia32/ReadDr4.S | GCC \r
-  Ia32/ReadDr3.S | GCC \r
-  Ia32/ReadDr2.S | GCC \r
-  Ia32/ReadDr1.S | GCC \r
-  Ia32/ReadDr0.S | GCC \r
-  Ia32/WriteCr4.S | GCC \r
-  Ia32/WriteCr3.S | GCC \r
-  Ia32/WriteCr2.S | GCC \r
-  Ia32/WriteCr0.S | GCC \r
-  Ia32/ReadCr4.S | GCC \r
-  Ia32/ReadCr3.S | GCC \r
-  Ia32/ReadCr2.S | GCC \r
-  Ia32/ReadCr0.S | GCC \r
-  Ia32/WriteMsr64.S | GCC \r
-  Ia32/ReadMsr64.S | GCC \r
-  Ia32/ReadEflags.S | GCC \r
   Ia32/CpuIdEx.S | GCC \r
   Ia32/CpuId.S | GCC \r
   Ia32/LongJump.S | GCC \r
   Ia32/DisableCache.S | GCC\r
 \r
   Ia32/DivS64x64Remainder.c\r
-  Ia32/InternalSwitchStack.c\r
+  Ia32/InternalSwitchStack.c | MSFT\r
+  Ia32/InternalSwitchStack.c | INTEL\r
+  Ia32/InternalSwitchStack.S | GCC\r
   Ia32/Non-existing.c\r
   Unaligned.c\r
   X86WriteIdtr.c\r
   X86ReadIdtr.c\r
   X86ReadGdtr.c\r
   X86Msr.c\r
-  X86MemoryFence.c\r
+  X86MemoryFence.c | MSFT\r
+  X86MemoryFence.c | INTEL\r
   X86GetInterruptState.c\r
   X86FxSave.c\r
   X86FxRestore.c\r
   X86ReadIdtr.c\r
   X86ReadGdtr.c\r
   X86Msr.c\r
-  X86MemoryFence.c\r
+  X86MemoryFence.c | MSFT\r
+  X86MemoryFence.c | INTEL\r
   X86GetInterruptState.c\r
   X86FxSave.c\r
   X86FxRestore.c\r
   X86EnablePaging32.c\r
   X86DisablePaging64.c\r
   X86DisablePaging32.c\r
-  X64/WriteMsr64.S | GCC \r
-  X64/WriteMm7.S | GCC \r
-  X64/WriteMm6.S | GCC \r
-  X64/WriteMm5.S | GCC \r
-  X64/WriteMm4.S | GCC \r
-  X64/WriteMm3.S | GCC \r
-  X64/WriteMm2.S | GCC \r
-  X64/WriteMm1.S | GCC \r
-  X64/WriteMm0.S | GCC \r
-  X64/WriteLdtr.S | GCC \r
-  X64/WriteIdtr.S | GCC \r
-  X64/WriteGdtr.S | GCC \r
-  X64/WriteDr7.S | GCC \r
-  X64/WriteDr6.S | GCC \r
-  X64/WriteDr5.S | GCC \r
-  X64/WriteDr4.S | GCC \r
-  X64/WriteDr3.S | GCC \r
-  X64/WriteDr2.S | GCC \r
-  X64/WriteDr1.S | GCC \r
-  X64/WriteDr0.S | GCC \r
-  X64/WriteCr4.S | GCC \r
-  X64/WriteCr3.S | GCC \r
-  X64/WriteCr2.S | GCC \r
-  X64/WriteCr0.S | GCC \r
-  X64/Wbinvd.S | GCC \r
-  X64/Thunk16.S | GCC \r
+  X64/GccInline.c | GCC\r
+  X64/Thunk16.nasm | GCC \r
   X64/SwitchStack.S | GCC \r
   X64/SetJump.S | GCC \r
-  X64/ReadTsc.S | GCC \r
-  X64/ReadTr.S | GCC \r
-  X64/ReadSs.S | GCC \r
-  X64/ReadPmc.S | GCC \r
-  X64/ReadMsr64.S | GCC \r
-  X64/ReadMm7.S | GCC \r
-  X64/ReadMm6.S | GCC \r
-  X64/ReadMm5.S | GCC \r
-  X64/ReadMm4.S | GCC \r
-  X64/ReadMm3.S | GCC \r
-  X64/ReadMm2.S | GCC \r
-  X64/ReadMm1.S | GCC \r
-  X64/ReadMm0.S | GCC \r
-  X64/ReadLdtr.S | GCC \r
-  X64/ReadIdtr.S | GCC \r
-  X64/ReadGs.S | GCC \r
-  X64/ReadGdtr.S | GCC \r
-  X64/ReadFs.S | GCC \r
-  X64/ReadEs.S | GCC \r
-  X64/ReadEflags.S | GCC \r
-  X64/ReadDs.S | GCC \r
-  X64/ReadDr7.S | GCC \r
-  X64/ReadDr6.S | GCC \r
-  X64/ReadDr5.S | GCC \r
-  X64/ReadDr4.S | GCC \r
-  X64/ReadDr3.S | GCC \r
-  X64/ReadDr2.S | GCC \r
-  X64/ReadDr1.S | GCC \r
-  X64/ReadDr0.S | GCC \r
-  X64/ReadCs.S | GCC \r
-  X64/ReadCr4.S | GCC \r
-  X64/ReadCr3.S | GCC \r
-  X64/ReadCr2.S | GCC \r
-  X64/ReadCr0.S | GCC \r
-  X64/Mwait.S | GCC \r
-  X64/Monitor.S | GCC \r
   X64/LongJump.S | GCC \r
-  X64/Invd.S | GCC \r
-  X64/FxSave.S | GCC \r
-  X64/FxRestore.S | GCC \r
-  X64/FlushCacheLine.S | GCC \r
-  X64/EnableInterrupts.S | GCC \r
   X64/EnableDisableInterrupts.S | GCC \r
   X64/DisablePaging64.S | GCC \r
-  X64/DisableInterrupts.S | GCC \r
-  X64/CpuPause.S | GCC \r
   X64/CpuId.S | GCC \r
   X64/CpuIdEx.S | GCC \r
-  X64/CpuBreakpoint.S | GCC \r
   X64/EnableCache.S | GCC\r
   X64/DisableCache.S | GCC\r
   ChkStkGcc.c  | GCC \r
   Ipf/AccessPsr.s\r
   Ipf/AccessPmr.s\r
   Ipf/AccessKr.s\r
+  Ipf/AccessKr7.s\r
   Ipf/AccessGcr.s\r
   Ipf/AccessEicr.s\r
   Ipf/AccessDbr.s\r
 [Sources.ARM]\r
   Arm/InternalSwitchStack.c\r
   Arm/Unaligned.c\r
-  Math64.c \r
+  Math64.c                   | RVCT \r
     \r
   Arm/SwitchStack.asm        | RVCT\r
   Arm/SetJumpLongJump.asm    | RVCT\r
   Arm/EnableInterrupts.asm   | RVCT\r
   Arm/GetInterruptsState.asm | RVCT\r
   Arm/CpuPause.asm           | RVCT\r
-  Arm/CpuBreakpoint.asm\r
+  Arm/CpuBreakpoint.asm      | RVCT\r
+  Arm/MemoryFence.asm        | RVCT\r
  \r
-  Arm/GccInline.c               | GCC\r
+  Arm/Math64.S                  | GCC\r
+  Arm/SwitchStack.S             | GCC\r
   Arm/EnableInterrupts.S        | GCC\r
   Arm/DisableInterrupts.S       | GCC\r
+  Arm/GetInterruptsState.S      | GCC\r
   Arm/SetJumpLongJump.S         | GCC\r
   Arm/CpuBreakpoint.S           | GCC\r
+  Arm/MemoryFence.S             | GCC\r
+\r
+[Sources.AARCH64]\r
+  Arm/InternalSwitchStack.c\r
+  Arm/Unaligned.c\r
+  Math64.c\r
+\r
+  AArch64/MemoryFence.S             | GCC\r
+  AArch64/SwitchStack.S             | GCC\r
+  AArch64/EnableInterrupts.S        | GCC\r
+  AArch64/DisableInterrupts.S       | GCC\r
+  AArch64/GetInterruptsState.S      | GCC\r
+  AArch64/SetJumpLongJump.S         | GCC\r
+  AArch64/CpuBreakpoint.S           | GCC\r
 \r
 [Packages]\r
   MdePkg/MdePkg.dec\r
   BaseMemoryLib\r
 \r
 [Pcd]\r
-  gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength\r
-  gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength\r
-  gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength\r
-  gEfiMdePkgTokenSpaceGuid.PcdVerifyNodeInList\r
+  gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength      ## SOMETIMES_CONSUMES\r
+  gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength     ## SOMETIMES_CONSUMES\r
+  gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength   ## SOMETIMES_CONSUMES\r
+  gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask            ## SOMETIMES_CONSUMES\r
+\r
+[FeaturePcd]\r
+  gEfiMdePkgTokenSpaceGuid.PcdVerifyNodeInList  ## CONSUMES\r