/** @file\r
Declaration of internal functions in BaseLib.\r
\r
- Copyright (c) 2006, Intel Corporation<BR>\r
+ Copyright (c) 2006 - 2008, Intel Corporation<BR>\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
- Module Name: BaseLibInternals.h\r
-\r
**/\r
\r
#ifndef __BASE_LIB_INTERNALS__\r
#define __BASE_LIB_INTERNALS__\r
\r
+#include <Base.h>\r
+#include <Library/BaseLib.h>\r
+#include <Library/BaseMemoryLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/PcdLib.h>\r
+\r
//\r
// Math functions\r
//\r
\r
@param Operand A 64-bit unsigned value.\r
\r
- @return The byte swaped Operand.\r
+ @return The byte swapped Operand.\r
\r
**/\r
UINT64\r
unsigned value Divisor and generates a 64-bit unsigned quotient. This\r
function returns the 64-bit unsigned quotient.\r
\r
- @param Dividend A 64-bit unsigned value.\r
+ @param Dividend A 64-bit unsigned value.\r
@param Divisor A 32-bit unsigned value.\r
\r
@return Dividend / Divisor\r
InternalMathDivRemU64x32 (\r
IN UINT64 Dividend,\r
IN UINT32 Divisor,\r
- OUT UINT32 *Remainder\r
+ OUT UINT32 *Remainder OPTIONAL\r
);\r
\r
/**\r
InternalMathDivRemU64x64 (\r
IN UINT64 Dividend,\r
IN UINT64 Divisor,\r
- OUT UINT64 *Remainder\r
+ OUT UINT64 *Remainder OPTIONAL\r
);\r
\r
/**\r
Divides a 64-bit signed integer by a 64-bit signed integer and\r
- generates a 64-bit signed result and a optional 64-bit signed remainder.\r
+ generates a 64-bit signed result and an optional 64-bit signed remainder.\r
\r
- This function divides the 64-bit unsigned value Dividend by the 64-bit\r
- unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r
- is not NULL, then the 64-bit unsigned remainder is returned in Remainder.\r
- This function returns the 64-bit unsigned quotient.\r
+ This function divides the 64-bit signed value Dividend by the 64-bit\r
+ signed value Divisor and generates a 64-bit signed quotient. If Remainder\r
+ is not NULL, then the 64-bit signed remainder is returned in Remainder.\r
+ This function returns the 64-bit signed quotient.\r
\r
@param Dividend A 64-bit signed value.\r
@param Divisor A 64-bit signed value.\r
\r
**/\r
INT64\r
+EFIAPI\r
InternalMathDivRemS64x64 (\r
IN INT64 Dividend,\r
IN INT64 Divisor,\r
OUT INT64 *Remainder OPTIONAL\r
- );\r
+ );\r
\r
/**\r
Transfers control to a function starting with a new stack.\r
\r
- Transfers control to the function specified by EntryPoint using the new stack\r
- specified by NewStack and passing in the parameters specified by Context1 and\r
- Context2. Context1 and Context2 are optional and may be NULL. The function\r
- EntryPoint must never return.\r
+ Transfers control to the function specified by EntryPoint using the\r
+ new stack specified by NewStack and passing in the parameters specified\r
+ by Context1 and Context2. Context1 and Context2 are optional and may\r
+ be NULL. The function EntryPoint must never return.\r
+ Marker will be ignored on IA-32, x64, and EBC.\r
+ IPF CPUs expect one additional parameter of type VOID * that specifies\r
+ the new backing store pointer.\r
+\r
+ If EntryPoint is NULL, then ASSERT().\r
+ If NewStack is NULL, then ASSERT().\r
\r
@param EntryPoint A pointer to function to call with the new stack.\r
@param Context1 A pointer to the context to pass into the EntryPoint\r
function.\r
@param NewStack A pointer to the new stack to use for the EntryPoint\r
function.\r
+ @param Marker VA_LIST marker for the variable argument list.\r
\r
**/\r
VOID\r
EFIAPI\r
InternalSwitchStack (\r
IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r
- IN VOID *Context1,\r
- IN VOID *Context2,\r
- IN VOID *NewStack\r
+ IN VOID *Context1, OPTIONAL\r
+ IN VOID *Context2, OPTIONAL\r
+ IN VOID *NewStack,\r
+ IN VA_LIST Marker\r
+ );\r
+\r
+\r
+/**\r
+ Worker function that locates the Node in the List.\r
+\r
+ By searching the List, finds the location of the Node in List. At the same time,\r
+ verifies the validity of this list.\r
+\r
+ If List is NULL, then ASSERT().\r
+ If List->ForwardLink is NULL, then ASSERT().\r
+ If List->backLink is NULL, then ASSERT().\r
+ If Node is NULL, then ASSERT();\r
+ If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r
+ of nodes in ListHead, including the ListHead node, is greater than or\r
+ equal to PcdMaximumLinkedListLength, then ASSERT().\r
+\r
+ @param List A pointer to a node in a linked list.\r
+ @param Node A pointer to one nod.\r
+\r
+ @retval TRUE Node is in List\r
+ @retval FALSE Node isn't in List, or List is invalid\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+IsNodeInList (\r
+ IN CONST LIST_ENTRY *List,\r
+ IN CONST LIST_ENTRY *Node\r
+ );\r
+\r
+/**\r
+ Worker function that returns a bit field from Operand.\r
+\r
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.\r
+\r
+ @param Operand Operand on which to perform the bitfield operation.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+\r
+ @return The bit field read.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+BitFieldReadUint (\r
+ IN UINTN Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ );\r
+\r
+\r
+/**\r
+ Worker function that reads a bit field from Operand, performs a bitwise OR,\r
+ and returns the result.\r
+\r
+ Performs a bitwise OR between the bit field specified by StartBit and EndBit\r
+ in Operand and the value specified by AndData. All other bits in Operand are\r
+ preserved. The new value is returned.\r
+\r
+ @param Operand Operand on which to perform the bitfield operation.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ @param OrData The value to OR with the read value from the value\r
+\r
+ @return The new value.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+BitFieldOrUint (\r
+ IN UINTN Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINTN OrData\r
+ );\r
+\r
+\r
+/**\r
+ Worker function that reads a bit field from Operand, performs a bitwise AND,\r
+ and returns the result.\r
+\r
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
+ in Operand and the value specified by AndData. All other bits in Operand are\r
+ preserved. The new value is returned.\r
+\r
+ @param Operand Operand on which to perform the bitfield operation.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ @param AndData The value to And with the read value from the value\r
+\r
+ @return The new value.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+BitFieldAndUint (\r
+ IN UINTN Operand,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINTN AndData\r
+ );\r
+\r
+\r
+/**\r
+ Worker function that checks ASSERT condition for JumpBuffer\r
+\r
+ Checks ASSERT condition for JumpBuffer.\r
+\r
+ If JumpBuffer is NULL, then ASSERT().\r
+ For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r
+\r
+ @param JumpBuffer A pointer to CPU context buffer.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+InternalAssertJumpBuffer (\r
+ IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer\r
+ );\r
+\r
+\r
+/**\r
+ Restores the CPU context that was saved with SetJump().\r
+\r
+ Restores the CPU context from the buffer specified by JumpBuffer.\r
+ This function never returns to the caller.\r
+ Instead is resumes execution based on the state of JumpBuffer.\r
+\r
+ @param JumpBuffer A pointer to CPU context buffer.\r
+ @param Value The value to return when the SetJump() context is restored.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+InternalLongJump (\r
+ IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,\r
+ IN UINTN Value\r
);\r
\r
+\r
//\r
// Ia32 and x64 specific functions\r
//\r
+#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)\r
\r
/**\r
Reads the current Global Descriptor Table Register(GDTR) descriptor.\r
\r
Reads and returns the current GDTR descriptor and returns it in Gdtr. This\r
- function is only available on IA-32 and X64.\r
+ function is only available on IA-32 and x64.\r
\r
@param Gdtr Pointer to a GDTR descriptor.\r
\r
Writes the current Global Descriptor Table Register (GDTR) descriptor.\r
\r
Writes and the current GDTR descriptor specified by Gdtr. This function is\r
- only available on IA-32 and X64.\r
+ only available on IA-32 and x64.\r
\r
@param Gdtr Pointer to a GDTR descriptor.\r
\r
Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.\r
\r
Reads and returns the current IDTR descriptor and returns it in Idtr. This\r
- function is only available on IA-32 and X64.\r
+ function is only available on IA-32 and x64.\r
\r
@param Idtr Pointer to a IDTR descriptor.\r
\r
Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.\r
\r
Writes the current IDTR descriptor and returns it in Idtr. This function is\r
- only available on IA-32 and X64.\r
+ only available on IA-32 and x64.\r
\r
@param Idtr Pointer to a IDTR descriptor.\r
\r
\r
Saves the current floating point/SSE/SSE2 state to the buffer specified by\r
Buffer. Buffer must be aligned on a 16-byte boundary. This function is only\r
- available on IA-32 and X64.\r
+ available on IA-32 and x64.\r
\r
@param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.\r
\r
\r
Restores the current floating point/SSE/SSE2 state from the buffer specified\r
by Buffer. Buffer must be aligned on a 16-byte boundary. This function is\r
- only available on IA-32 and X64.\r
+ only available on IA-32 and x64.\r
\r
@param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.\r
\r
\r
Disables the 64-bit paging mode on the CPU and returns to 32-bit protected\r
mode. This function assumes the current execution mode is 64-paging mode.\r
- This function is only available on X64. After the 64-bit paging mode is\r
+ This function is only available on x64. After the 64-bit paging mode is\r
disabled, control is transferred to the function specified by EntryPoint\r
using the new stack specified by NewStack and passing in the parameters\r
specified by Context1 and Context2. Context1 and Context2 are optional and\r
IN UINT32 NewStack\r
);\r
\r
-/**\r
- Worker function that locates the Node in the List\r
\r
- By searching the List, finds the location of the Node in List. At the same time,\r
- verifies the validity of this list.\r
+#elif defined (MDE_CPU_IPF)\r
+//\r
+//\r
+// IPF specific functions\r
+//\r
\r
- If List is NULL, then ASSERT().\r
- If List->ForwardLink is NULL, then ASSERT().\r
- If List->backLink is NULL, then ASSERT().\r
- If Node is NULL, then ASSERT();\r
- If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r
- of nodes in ListHead, including the ListHead node, is greater than or\r
- equal to PcdMaximumLinkedListLength, then ASSERT().\r
+//\r
+// Structure definition for look up table.\r
+//\r
+typedef struct {\r
+ UINT64 Index;\r
+ UINT64 (*Function) (VOID);\r
+} REGISTER_ENTRY;\r
\r
- @param List A pointer to a node in a linked list.\r
- @param Node A pointer to one nod.\r
\r
- @retval TRUE Node is in List\r
- @retval FALSE Node isn't in List, or List is invalid\r
+/**\r
+ Reads control register DCR.\r
+\r
+ This is a worker function for AsmReadControlRegister()\r
+ when its parameter Index is IPF_CONTROL_REGISTER_DCR\r
+\r
+ @return The 64-bit control register DCR.\r
\r
**/\r
-BOOLEAN\r
-IsNodeInList (\r
- IN CONST LIST_ENTRY *List,\r
- IN CONST LIST_ENTRY *Node\r
+UINT64\r
+EFIAPI\r
+AsmReadControlRegisterDcr (\r
+ VOID\r
);\r
\r
-/**\r
- Performs an atomic increment of an 32-bit unsigned integer.\r
\r
- Performs an atomic increment of the 32-bit unsigned integer specified by\r
- Value and returns the incremented value. The increment operation must be\r
- performed using MP safe mechanisms. The state of the return value is not\r
- guaranteed to be MP safe.\r
+/**\r
+ Reads control register ITM.\r
\r
- @param Value A pointer to the 32-bit value to increment.\r
+ This is a worker function for AsmReadControlRegister()\r
+ when its parameter Index is IPF_CONTROL_REGISTER_ITM\r
\r
- @return The incremented value.\r
+ @return The 64-bit control register ITM.\r
\r
**/\r
-UINT32\r
+UINT64\r
EFIAPI\r
-InternalSyncIncrement (\r
- IN volatile UINT32 *Value\r
+AsmReadControlRegisterItm (\r
+ VOID\r
);\r
\r
-/**\r
- Performs an atomic decrement of an 32-bit unsigned integer.\r
\r
- Performs an atomic decrement of the 32-bit unsigned integer specified by\r
- Value and returns the decrement value. The decrement operation must be\r
- performed using MP safe mechanisms. The state of the return value is not\r
- guaranteed to be MP safe.\r
+/**\r
+ Reads control register IVA.\r
\r
- @param Value A pointer to the 32-bit value to decrement.\r
+ This is a worker function for AsmReadControlRegister()\r
+ when its parameter Index is IPF_CONTROL_REGISTER_IVA\r
\r
- @return The decrement value.\r
+ @return The 64-bit control register IVA.\r
\r
**/\r
-UINT32\r
+UINT64\r
EFIAPI\r
-InternalSyncDecrement (\r
- IN volatile UINT32 *Value\r
+AsmReadControlRegisterIva (\r
+ VOID\r
);\r
\r
-/**\r
- Performs an atomic compare exchange operation on a 32-bit unsigned integer.\r
\r
- Performs an atomic compare exchange operation on the 32-bit unsigned integer\r
- specified by Value. If Value is equal to CompareValue, then Value is set to \r
- ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,\r
- then Value is returned. The compare exchange operation must be performed using \r
- MP safe mechanisms.\r
+/**\r
+ Reads control register PTA.\r
\r
- @param Value A pointer to the 32-bit value for the compare exchange\r
- operation.\r
- @param CompareValue 32-bit value used in compare operation.\r
- @param ExchangeValue 32-bit value used in exchange operation.\r
+ This is a worker function for AsmReadControlRegister()\r
+ when its parameter Index is IPF_CONTROL_REGISTER_PTA\r
\r
- @return The original *Value before exchange.\r
+ @return The 64-bit control register PTA.\r
\r
**/\r
-UINT32\r
+UINT64\r
EFIAPI\r
-InternalSyncCompareExchange32 (\r
- IN volatile UINT32 *Value,\r
- IN UINT32 CompareValue,\r
- IN UINT32 ExchangeValue\r
+AsmReadControlRegisterPta (\r
+ VOID\r
);\r
\r
-/**\r
- Performs an atomic compare exchange operation on a 64-bit unsigned integer.\r
\r
- Performs an atomic compare exchange operation on the 64-bit unsigned integer specified \r
- by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and \r
- CompareValue is returned. If Value is not equal to CompareValue, then Value is returned. \r
- The compare exchange operation must be performed using MP safe mechanisms.\r
+/**\r
+ Reads control register IPSR.\r
\r
- @param Value A pointer to the 64-bit value for the compare exchange\r
- operation.\r
- @param CompareValue 64-bit value used in compare operation.\r
- @param ExchangeValue 64-bit value used in exchange operation.\r
+ This is a worker function for AsmReadControlRegister()\r
+ when its parameter Index is IPF_CONTROL_REGISTER_IPSR\r
\r
- @return The original *Value before exchange.\r
+ @return The 64-bit control register IPSR.\r
\r
**/\r
UINT64\r
EFIAPI\r
-InternalSyncCompareExchange64 (\r
- IN volatile UINT64 *Value,\r
- IN UINT64 CompareValue,\r
- IN UINT64 ExchangeValue\r
+AsmReadControlRegisterIpsr (\r
+ VOID\r
);\r
\r
-/**\r
- Worker function that returns a bit field from Operand\r
\r
- Returns the bitfield specified by the StartBit and the EndBit from Operand.\r
+/**\r
+ Reads control register ISR.\r
\r
- @param Operand Operand on which to perform the bitfield operation.\r
- @param StartBit The ordinal of the least significant bit in the bit field.\r
- @param EndBit The ordinal of the most significant bit in the bit field.\r
+ This is a worker function for AsmReadControlRegister()\r
+ when its parameter Index is IPF_CONTROL_REGISTER_ISR\r
\r
- @return The bit field read.\r
+ @return The 64-bit control register ISR.\r
\r
**/\r
-unsigned int\r
-BitFieldReadUint (\r
- IN unsigned int Operand,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit\r
+UINT64\r
+EFIAPI\r
+AsmReadControlRegisterIsr (\r
+ VOID\r
);\r
\r
-/**\r
- Worker function that reads a bit field from Operand, performs a bitwise OR, \r
- and returns the result.\r
\r
- Performs a bitwise OR between the bit field specified by StartBit and EndBit\r
- in Operand and the value specified by AndData. All other bits in Operand are\r
- preserved. The new value is returned.\r
+/**\r
+ Reads control register IIP.\r
\r
- @param Operand Operand on which to perform the bitfield operation.\r
- @param StartBit The ordinal of the least significant bit in the bit field.\r
- @param EndBit The ordinal of the most significant bit in the bit field.\r
- @param OrData The value to OR with the read value from the value\r
+ This is a worker function for AsmReadControlRegister()\r
+ when its parameter Index is IPF_CONTROL_REGISTER_IIP\r
\r
- @return The new value.\r
+ @return The 64-bit control register IIP.\r
\r
**/\r
-unsigned int\r
-BitFieldOrUint (\r
- IN unsigned int Operand,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN unsigned int OrData\r
+UINT64\r
+EFIAPI\r
+AsmReadControlRegisterIip (\r
+ VOID\r
);\r
\r
-/**\r
- Worker function that reads a bit field from Operand, performs a bitwise AND, \r
- and returns the result.\r
\r
- Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
- in Operand and the value specified by AndData. All other bits in Operand are\r
- preserved. The new value is returned.\r
+/**\r
+ Reads control register IFA.\r
\r
- @param Operand Operand on which to perform the bitfield operation.\r
- @param StartBit The ordinal of the least significant bit in the bit field.\r
- @param EndBit The ordinal of the most significant bit in the bit field.\r
- @param AndData The value to And with the read value from the value\r
+ This is a worker function for AsmReadControlRegister()\r
+ when its parameter Index is IPF_CONTROL_REGISTER_IFA\r
\r
- @return The new value.\r
+ @return The 64-bit control register IFA.\r
\r
**/\r
-unsigned int\r
-BitFieldAndUint (\r
- IN unsigned int Operand,\r
- IN UINTN StartBit,\r
- IN UINTN EndBit,\r
- IN unsigned int AndData\r
+UINT64\r
+EFIAPI\r
+AsmReadControlRegisterIfa (\r
+ VOID\r
);\r
\r
-/**\r
- Worker function that checks ASSERT condition for JumpBuffer\r
\r
- Checks ASSERT condition for JumpBuffer.\r
+/**\r
+ Reads control register ITIR.\r
\r
- If JumpBuffer is NULL, then ASSERT().\r
- For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r
+ This is a worker function for AsmReadControlRegister()\r
+ when its parameter Index is IPF_CONTROL_REGISTER_ITIR\r
\r
- @param JumpBuffer A pointer to CPU context buffer.\r
+ @return The 64-bit control register ITIR.\r
\r
**/\r
-VOID\r
-InternalAssertJumpBuffer (\r
- IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer\r
+UINT64\r
+EFIAPI\r
+AsmReadControlRegisterItir (\r
+ VOID\r
);\r
\r
+\r
/**\r
- Restores the CPU context that was saved with SetJump().\r
+ Reads control register IIPA.\r
\r
- Restores the CPU context from the buffer specified by JumpBuffer.\r
- This function never returns to the caller.\r
- Instead is resumes execution based on the state of JumpBuffer.\r
+ This is a worker function for AsmReadControlRegister()\r
+ when its parameter Index is IPF_CONTROL_REGISTER_IIPA\r
\r
- @param JumpBuffer A pointer to CPU context buffer.\r
- @param Value The value to return when the SetJump() context is restored.\r
+ @return The 64-bit control register IIPA.\r
\r
**/\r
-VOID\r
+UINT64\r
EFIAPI\r
-InternalLongJump (\r
- IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,\r
- IN UINTN Value\r
+AsmReadControlRegisterIipa (\r
+ VOID\r
);\r
\r
+\r
+/**\r
+ Reads control register IFS.\r
+\r
+ This is a worker function for AsmReadControlRegister()\r
+ when its parameter Index is IPF_CONTROL_REGISTER_IFS\r
+\r
+ @return The 64-bit control register IFS.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadControlRegisterIfs (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads control register IIM.\r
+\r
+ This is a worker function for AsmReadControlRegister()\r
+ when its parameter Index is IPF_CONTROL_REGISTER_IIM\r
+\r
+ @return The 64-bit control register IIM.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadControlRegisterIim (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads control register IHA.\r
+\r
+ This is a worker function for AsmReadControlRegister()\r
+ when its parameter Index is IPF_CONTROL_REGISTER_IHA\r
+\r
+ @return The 64-bit control register IHA.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadControlRegisterIha (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads control register LID.\r
+\r
+ This is a worker function for AsmReadControlRegister()\r
+ when its parameter Index is IPF_CONTROL_REGISTER_LID\r
+\r
+ @return The 64-bit control register LID.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadControlRegisterLid (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads control register IVR.\r
+\r
+ This is a worker function for AsmReadControlRegister()\r
+ when its parameter Index is IPF_CONTROL_REGISTER_IVR\r
+\r
+ @return The 64-bit control register IVR.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadControlRegisterIvr (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads control register TPR.\r
+\r
+ This is a worker function for AsmReadControlRegister()\r
+ when its parameter Index is IPF_CONTROL_REGISTER_TPR\r
+\r
+ @return The 64-bit control register TPR.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadControlRegisterTpr (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads control register EOI.\r
+\r
+ This is a worker function for AsmReadControlRegister()\r
+ when its parameter Index is IPF_CONTROL_REGISTER_EOI\r
+\r
+ @return The 64-bit control register EOI.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadControlRegisterEoi (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads control register IRR0.\r
+\r
+ This is a worker function for AsmReadControlRegister()\r
+ when its parameter Index is IPF_CONTROL_REGISTER_IRR0\r
+\r
+ @return The 64-bit control register IRR0.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadControlRegisterIrr0 (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads control register IRR1.\r
+\r
+ This is a worker function for AsmReadControlRegister()\r
+ when its parameter Index is IPF_CONTROL_REGISTER_IRR1\r
+\r
+ @return The 64-bit control register IRR1.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadControlRegisterIrr1 (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads control register IRR2.\r
+\r
+ This is a worker function for AsmReadControlRegister()\r
+ when its parameter Index is IPF_CONTROL_REGISTER_IRR2\r
+\r
+ @return The 64-bit control register IRR2.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadControlRegisterIrr2 (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads control register IRR3.\r
+\r
+ This is a worker function for AsmReadControlRegister()\r
+ when its parameter Index is IPF_CONTROL_REGISTER_IRR3\r
+\r
+ @return The 64-bit control register IRR3.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadControlRegisterIrr3 (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads control register ITV.\r
+\r
+ This is a worker function for AsmReadControlRegister()\r
+ when its parameter Index is IPF_CONTROL_REGISTER_ITV\r
+\r
+ @return The 64-bit control register ITV.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadControlRegisterItv (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads control register PMV.\r
+\r
+ This is a worker function for AsmReadControlRegister()\r
+ when its parameter Index is IPF_CONTROL_REGISTER_PMV\r
+\r
+ @return The 64-bit control register PMV.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadControlRegisterPmv (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads control register CMCV.\r
+\r
+ This is a worker function for AsmReadControlRegister()\r
+ when its parameter Index is IPF_CONTROL_REGISTER_CMCV\r
+\r
+ @return The 64-bit control register CMCV.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadControlRegisterCmcv (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads control register LRR0.\r
+\r
+ This is a worker function for AsmReadControlRegister()\r
+ when its parameter Index is IPF_CONTROL_REGISTER_LRR0\r
+\r
+ @return The 64-bit control register LRR0.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadControlRegisterLrr0 (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads control register LRR1.\r
+\r
+ This is a worker function for AsmReadControlRegister()\r
+ when its parameter Index is IPF_CONTROL_REGISTER_LRR1\r
+\r
+ @return The 64-bit control register LRR1.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadControlRegisterLrr1 (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads application register K0.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_K0\r
+\r
+ @return The 64-bit application register K0.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterK0 (\r
+ VOID\r
+ );\r
+\r
+\r
+\r
+/**\r
+ Reads application register K1.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_K1\r
+\r
+ @return The 64-bit application register K1.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterK1 (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads application register K2.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_K2\r
+\r
+ @return The 64-bit application register K2.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterK2 (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads application register K3.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_K3\r
+\r
+ @return The 64-bit application register K3.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterK3 (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads application register K4.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_K4\r
+\r
+ @return The 64-bit application register K4.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterK4 (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads application register K5.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_K5\r
+\r
+ @return The 64-bit application register K5.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterK5 (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads application register K6.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_K6\r
+\r
+ @return The 64-bit application register K6.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterK6 (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads application register K7.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_K7\r
+\r
+ @return The 64-bit application register K7.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterK7 (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads application register RSC.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_RSC\r
+\r
+ @return The 64-bit application register RSC.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterRsc (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads application register BSP.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_BSP\r
+\r
+ @return The 64-bit application register BSP.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterBsp (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads application register BSPSTORE.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_BSPSTORE\r
+\r
+ @return The 64-bit application register BSPSTORE.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterBspstore (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads application register RNAT.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_RNAT\r
+\r
+ @return The 64-bit application register RNAT.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterRnat (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads application register FCR.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_FCR\r
+\r
+ @return The 64-bit application register FCR.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterFcr (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads application register EFLAG.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_EFLAG\r
+\r
+ @return The 64-bit application register EFLAG.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterEflag (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads application register CSD.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_CSD\r
+\r
+ @return The 64-bit application register CSD.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterCsd (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads application register SSD.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_SSD\r
+\r
+ @return The 64-bit application register SSD.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterSsd (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads application register CFLG.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_CFLG\r
+\r
+ @return The 64-bit application register CFLG.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterCflg (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads application register FSR.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_FSR\r
+\r
+ @return The 64-bit application register FSR.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterFsr (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads application register FIR.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_FIR\r
+\r
+ @return The 64-bit application register FIR.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterFir (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads application register FDR.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_FDR\r
+\r
+ @return The 64-bit application register FDR.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterFdr (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads application register CCV.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_CCV\r
+\r
+ @return The 64-bit application register CCV.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterCcv (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads application register UNAT.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_UNAT\r
+\r
+ @return The 64-bit application register UNAT.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterUnat (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads application register FPSR.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_FPSR\r
+\r
+ @return The 64-bit application register FPSR.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterFpsr (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads application register ITC.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_ITC\r
+\r
+ @return The 64-bit application register ITC.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterItc (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads application register PFS.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_PFS\r
+\r
+ @return The 64-bit application register PFS.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterPfs (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads application register LC.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_LC\r
+\r
+ @return The 64-bit application register LC.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterLc (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reads application register EC.\r
+\r
+ This is a worker function for AsmReadApplicationRegister()\r
+ when its parameter Index is IPF_APPLICATION_REGISTER_EC\r
+\r
+ @return The 64-bit application register EC.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmReadApplicationRegisterEc (\r
+ VOID\r
+ );\r
+\r
+\r
+\r
+/**\r
+ Transfers control to a function starting with a new stack.\r
+\r
+ Transfers control to the function specified by EntryPoint using the new stack\r
+ specified by NewStack and passing in the parameters specified by Context1 and\r
+ Context2. Context1 and Context2 are optional and may be NULL. The function\r
+ EntryPoint must never return.\r
+\r
+ If EntryPoint is NULL, then ASSERT().\r
+ If NewStack is NULL, then ASSERT().\r
+\r
+ @param EntryPoint A pointer to function to call with the new stack.\r
+ @param Context1 A pointer to the context to pass into the EntryPoint\r
+ function.\r
+ @param Context2 A pointer to the context to pass into the EntryPoint\r
+ function.\r
+ @param NewStack A pointer to the new stack to use for the EntryPoint\r
+ function.\r
+ @param NewBsp A pointer to the new memory location for RSE backing\r
+ store.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+AsmSwitchStackAndBackingStore (\r
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r
+ IN VOID *Context1, OPTIONAL\r
+ IN VOID *Context2, OPTIONAL\r
+ IN VOID *NewStack,\r
+ IN VOID *NewBsp\r
+ );\r
+#else\r
+\r
+#endif\r
+\r
#endif\r
projects / mirror_edk2.git / blobdiff