coherency domain of the CPU.\r
\r
Flushed the cache line specified by LinearAddress, and returns LinearAddress.\r
- This function is only available on IA-32 and X64.\r
+ This function is only available on IA-32 and x64.\r
\r
@param LinearAddress The address of the cache line to flush. If the CPU is\r
in a physical addressing mode, then LinearAddress is a\r