Minor grammatical work--mostly adding periods. Sending separately a list of files...

[mirror_edk2.git] / MdePkg / Library / BaseLib / Ia32 / FlushCacheLine.c

diff --git a/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c
index 5071a39bb293b43585ba87a86fbe8b06fe8ac9ff..3b3a43324edd2fe832ac2a0d28f6c50724e78282 100644 (file)
--- a/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c
+++ b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c
@@ -1,22 +1,35 @@
 /** @file\r
   AsmFlushCacheLine function\r
 \r
-  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
-  All rights reserved. This program and the accompanying materials\r
+  Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>\r
+  This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
-  http://opensource.org/licenses/bsd-license.php\r
+  http://opensource.org/licenses/bsd-license.php.\r
 \r
   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
 \r
 **/\r
 \r
-//\r
-// Include common header file for this module.\r
-//\r
-#include "CommonHeader.h"\r
 \r
+\r
+\r
+/**\r
+  Flushes a cache line from all the instruction and data caches within the\r
+  coherency domain of the CPU.\r
+\r
+  Flushed the cache line specified by LinearAddress, and returns LinearAddress.\r
+  This function is only available on IA-32 and x64.\r
+\r
+  @param  LinearAddress The address of the cache line to flush. If the CPU is\r
+                        in a physical addressing mode, then LinearAddress is a\r
+                        physical address. If the CPU is in a virtual\r
+                        addressing mode, then LinearAddress is a virtual\r
+                        address.\r
+\r
+  @return LinearAddress\r
+**/\r
 VOID *\r
 EFIAPI\r
 AsmFlushCacheLine (\r