Clean up the hard code offset in MdePkg BaseLib Ia32 Thunk16.S and EcpPkg GlueLib...

[mirror_edk2.git] / MdePkg / Library / BaseLib / Ia32 / Thunk16.S

diff --git a/MdePkg/Library/BaseLib/Ia32/Thunk16.S b/MdePkg/Library/BaseLib/Ia32/Thunk16.S
index d45a0d40b112ce85baa69ee1e5202b3e3e5fa3c0..2cb781582acf4fe962edb87632a1a4d493ffca74 100644 (file)
--- a/MdePkg/Library/BaseLib/Ia32/Thunk16.S
+++ b/MdePkg/Library/BaseLib/Ia32/Thunk16.S
@@ -24,6 +24,27 @@
 ASM_GLOBAL ASM_PFX(m16Start), ASM_PFX(m16Size), ASM_PFX(mThunk16Attr), ASM_PFX(m16Gdt), ASM_PFX(m16GdtrBase), ASM_PFX(mTransition)\r
 ASM_GLOBAL ASM_PFX(InternalAsmThunk16)\r
 \r
+# define the structure of IA32_REGS\r
+.set  _EDI, 0       #size 4\r
+.set  _ESI, 4       #size 4\r
+.set  _EBP, 8       #size 4\r
+.set  _ESP, 12      #size 4\r
+.set  _EBX, 16      #size 4\r
+.set  _EDX, 20      #size 4\r
+.set  _ECX, 24      #size 4\r
+.set  _EAX, 28      #size 4\r
+.set  _DS,  32      #size 2\r
+.set  _ES,  34      #size 2\r
+.set  _FS,  36      #size 2\r
+.set  _GS,  38      #size 2\r
+.set  _EFLAGS, 40   #size 4\r
+.set  _EIP, 44      #size 4\r
+.set  _CS, 48       #size 2\r
+.set  _SS, 50       #size 2\r
+.set  IA32_REGS_SIZE, 52\r
+\r
+    .text\r
+\r
 ASM_PFX(m16Start):\r
 \r
 SavedGdt:     .space  6\r
@@ -57,15 +78,17 @@ ASM_PFX(ThunkAttr): .space  4
 2:\r
     xorw    %ax, %ax                    # xor eax, eax\r
     movl    %ss, %eax                   # mov ax, ss\r
-    .byte   0x67, 0x66, 0x8d, 0x6c, 0x24, 0x34, 0x66\r
-    mov     %ebp, 0xffffffd8(%esi)\r
-    mov     0xfffffff8(%esi), %ebx\r
+    .byte   0x67\r
+    lea     IA32_REGS_SIZE(%esp), %bp\r
+    .byte   0x66\r
+    mov     %ebp, (_ESP - IA32_REGS_SIZE)(%esi)\r
+    mov     (_EIP - IA32_REGS_SIZE)(%esi), %ebx\r
     shlw    $4, %ax                     # shl eax, 4\r
     addw    %ax, %bp                    # add ebp, eax\r
     .byte   0x66, 0xb8                   # mov eax, imm32\r
 SavedCr4:   .space  4\r
     movl    %eax, %cr4\r
-    lgdtw   %cs:0xfffffff2(%edi)\r
+    lgdtw   %cs:(SavedGdt - L_Base1)(%edi)\r
     .byte   0x66, 0xb8                   # mov eax, imm32\r
 SavedCr0:   .space  4\r
     movl    %eax, %cr0\r
@@ -100,15 +123,15 @@ ASM_PFX(ToUserCode):
 L_Base:\r
     popw    %bp                         # ebp <- offset L_Base\r
     .byte   0x67;                       # address size override\r
-    push    54(%esp)\r
-    lea     0xc(%esi), %eax\r
+    push    (IA32_REGS_SIZE + 2)(%esp)\r
+    lea     (L_RealMode - L_Base)(%esi), %eax\r
     push    %eax\r
     lret\r
 \r
 L_RealMode:\r
-    mov     %edx, %cs:0xffffffc5(%esi)\r
-    mov     %bx, %cs:0xffffffcb(%esi)\r
-    lidtw   %cs:0xffffffd7(%esi)\r
+    mov     %edx, %cs:(SavedSs - L_Base)(%esi)\r
+    mov     %bx, %cs:(SavedEsp - L_Base)(%esi)\r
+    lidtw   %cs:(_16Idtr - L_Base)(%esi)\r
     popaw                               # popad actually\r
     pop     %ds\r
     pop     %es\r
@@ -149,41 +172,41 @@ ASM_PFX(InternalAsmThunk16):
     push    %fs\r
     push    %gs\r
     movl    36(%esp), %esi              # esi <- RegSet\r
-    movzwl  0x32(%esi), %edx\r
-    mov     0xc(%esi), %edi\r
-    add     $0xffffffc8, %edi\r
+    movzwl  _SS(%esi), %edx\r
+    mov     _ESP(%esi), %edi\r
+    add     $(-(IA32_REGS_SIZE + 4)), %edi\r
     movl    %edi, %ebx                  # ebx <- stack offset\r
     imul    $0x10, %edx, %eax\r
-    push    $0xd\r
+    push    $(IA32_REGS_SIZE / 4)\r
     addl    %eax, %edi                  # edi <- linear address of 16-bit stack\r
     pop     %ecx\r
     rep\r
     movsl                               # copy RegSet\r
     movl    40(%esp), %eax              # eax <- address of transition code\r
     movl    %edx, %esi                  # esi <- 16-bit stack segment\r
-    lea     0x5f(%eax), %edx\r
+    lea     (SavedCr0 - ASM_PFX(m16Start))(%eax), %edx\r
     movl    %eax, %ecx\r
     andl    $0xf, %ecx\r
     shll    $12, %eax\r
-    lea     0x6(%ecx), %ecx\r
+    lea     (ASM_PFX(BackFromUserCode) - ASM_PFX(m16Start))(%ecx), %ecx\r
     movw    %cx, %ax\r
     stosl                               # [edi] <- return address of user code\r
-    sgdtl   0xffffffa1(%edx)\r
+    sgdtl   (SavedGdt - SavedCr0)(%edx)\r
     sidtl   0x24(%esp)\r
     movl    %cr0, %eax\r
     movl    %eax, (%edx)                # save CR0 in SavedCr0\r
     andl    $0x7ffffffe, %eax           # clear PE, PG bits\r
     movl    %cr4, %ebp\r
-    mov     %ebp, 0xfffffff1(%edx)\r
+    mov     %ebp, (SavedCr4 - SavedCr0)(%edx)\r
     andl    $0x300, %ebp                # clear all but PCE and OSFXSR bits\r
     pushl   $0x10\r
     pop     %ecx                        # ecx <- selector for data segments\r
-    lgdtl   0x20(%edx)\r
+    lgdtl   (_16Gdtr - SavedCr0)(%edx)\r
     pushfl\r
-    lcall   *0x14(%edx)\r
+    lcall   *(_EntryPoint - SavedCr0)(%edx)\r
     popfl\r
     lidtl   0x24(%esp)\r
-    lea     0xffffffcc(%ebp), %eax\r
+    lea     -IA32_REGS_SIZE(%ebp), %eax\r
     pop     %gs\r
     pop     %fs\r
     pop     %es\r