/** @file\r
AsmFlushCacheRange() function for IPF.\r
\r
- Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
Flush a range of cache lines in the cache coherency domain of the calling\r
CPU.\r
\r
- Flushes the cache lines specified by Address and Length. If Address is not aligned \r
- on a cache line boundary, then entire cache line containing Address is flushed. \r
- If Address + Length is not aligned on a cache line boundary, then the entire cache \r
- line containing Address + Length - 1 is flushed. This function may choose to flush \r
- the entire cache if that is more efficient than flushing the specified range. If \r
- Length is 0, the no cache lines are flushed. Address is returned. \r
+ Flushes the cache lines specified by Address and Length. If Address is not aligned\r
+ on a cache line boundary, then entire cache line containing Address is flushed.\r
+ If Address + Length is not aligned on a cache line boundary, then the entire cache\r
+ line containing Address + Length - 1 is flushed. This function may choose to flush\r
+ the entire cache if that is more efficient than flushing the specified range. If\r
+ Length is 0, the no cache lines are flushed. Address is returned.\r
This function is only available on IPF.\r
\r
If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r