;------------------------------------------------------------------------------\r
;\r
-; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>\r
; This program and the accompanying materials\r
; are licensed and made available under the terms and conditions of the BSD License\r
; which accompanies this distribution. The full text of the license may be found at\r
;\r
;------------------------------------------------------------------------------\r
\r
+%include "Nasm.inc"\r
+\r
DEFAULT REL\r
SECTION .text\r
\r
+extern ASM_PFX(PcdGet32 (PcdControlFlowEnforcementPropertyMask))\r
+\r
;------------------------------------------------------------------------------\r
; VOID\r
; EFIAPI\r
;------------------------------------------------------------------------------\r
global ASM_PFX(InternalLongJump)\r
ASM_PFX(InternalLongJump):\r
+\r
+ mov eax, [ASM_PFX(PcdGet32 (PcdControlFlowEnforcementPropertyMask))]\r
+ test eax, eax\r
+ jz CetDone\r
+ mov rax, cr4\r
+ bt eax, 23 ; check if CET is enabled\r
+ jnc CetDone\r
+\r
+ push rdx ; save rdx\r
+\r
+ mov rdx, [rcx + 0xF8] ; rdx = target SSP\r
+ READSSP_RAX\r
+ sub rdx, rax ; rdx = delta\r
+ mov rax, rdx ; rax = delta\r
+\r
+ shr rax, 3 ; rax = delta/sizeof(UINT64)\r
+ INCSSP_RAX\r
+\r
+ pop rdx ; restore rdx\r
+CetDone:\r
+\r
mov rbx, [rcx]\r
mov rsp, [rcx + 8]\r
mov rbp, [rcx + 0x10]\r