Fixes for ARM build in the EdkCompatibilityPkg and a couple of Xcode fixes for MdePkg.

[mirror_edk2.git] / MdePkg / Library / BaseLib / X64 / Thunk16.S

diff --git a/MdePkg/Library/BaseLib/X64/Thunk16.S b/MdePkg/Library/BaseLib/X64/Thunk16.S
index 064922d1005f67b0257bafc9aadeea427a6e4603..51798dc224deb3c0b1a716ddb4541e4970176039 100644 (file)
--- a/MdePkg/Library/BaseLib/X64/Thunk16.S
+++ b/MdePkg/Library/BaseLib/X64/Thunk16.S
@@ -30,23 +30,23 @@ ASM_GLOBAL ASM_PFX(mTransition)
 ASM_GLOBAL ASM_PFX(InternalAsmThunk16)\r
 \r
 # define the structure of IA32_REGS\r
-.equ  _EDI, 0       #size 4\r
-.equ  _ESI, 4       #size 4\r
-.equ  _EBP, 8       #size 4\r
-.equ  _ESP, 12      #size 4\r
-.equ  _EBX, 16      #size 4\r
-.equ  _EDX, 20      #size 4\r
-.equ  _ECX, 24      #size 4\r
-.equ  _EAX, 28      #size 4\r
-.equ  _DS,  32      #size 2\r
-.equ  _ES,  34      #size 2\r
-.equ  _FS,  36      #size 2\r
-.equ  _GS,  38      #size 2\r
-.equ  _EFLAGS, 40   #size 8\r
-.equ  _EIP, 48      #size 4\r
-.equ  _CS, 52       #size 2\r
-.equ  _SS, 54       #size 2\r
-.equ  IA32_REGS_SIZE, 56\r
+.set  _EDI, 0       #size 4\r
+.set  _ESI, 4       #size 4\r
+.set  _EBP, 8       #size 4\r
+.set  _ESP, 12      #size 4\r
+.set  _EBX, 16      #size 4\r
+.set  _EDX, 20      #size 4\r
+.set  _ECX, 24      #size 4\r
+.set  _EAX, 28      #size 4\r
+.set  _DS,  32      #size 2\r
+.set  _ES,  34      #size 2\r
+.set  _FS,  36      #size 2\r
+.set  _GS,  38      #size 2\r
+.set  _EFLAGS, 40   #size 8\r
+.set  _EIP, 48      #size 4\r
+.set  _CS, 52       #size 2\r
+.set  _SS, 54       #size 2\r
+.set  IA32_REGS_SIZE, 56\r
 \r
     .data\r
 \r
@@ -167,7 +167,7 @@ ASM_PFX(ToUserCode):
     movl    $0xc0000080,%ecx\r
     movq    %rax, %cr0\r
     rdmsr\r
-    andb    $0b11111110, %ah \r
+    andb    $0xfe, %ah                  # $0b11111110\r
     wrmsr\r
     movq    %rbp, %cr4\r
     movl    %esi,%ss                    # set up 16-bit stack segment\r
@@ -193,9 +193,9 @@ L_RealMode:
     .byte 0x66                          # make the following retf 32-bit\r
     lret                                # transfer control to user code\r
 \r
-.equ  CODE16,  ASM_PFX(_16Code) - .\r
-.equ  DATA16,  ASM_PFX(_16Data) - .\r
-.equ  DATA32,  ASM_PFX(_32Data) - .\r
+.set  CODE16,  ASM_PFX(_16Code) - .\r
+.set  DATA16,  ASM_PFX(_16Data) - .\r
+.set  DATA32,  ASM_PFX(_32Data) - .\r
 \r
 ASM_PFX(NullSeg):   .quad      0\r
 ASM_PFX(_16Code):\r
@@ -220,7 +220,7 @@ ASM_PFX(_32Data):
             .byte 0xcf                  # 16-bit segment, 4GB limit\r
             .byte 0\r
 \r
-.equ  GDT_SIZE, . - ASM_PFX(NullSeg)\r
+.set  GDT_SIZE, . - ASM_PFX(NullSeg)\r
 \r
 #------------------------------------------------------------------------------\r
 # IA32_REGISTER_SET *\r
@@ -238,11 +238,11 @@ ASM_PFX(InternalAsmThunk16):
     pushq   %rsi\r
     pushq   %rdi\r
     \r
-    movq    %ds, %rbx\r
+    movl    %ds, %ebx\r
     pushq   %rbx      # Save ds segment register on the stack\r
-    movq    %es, %rbx\r
+    movl    %es, %ebx\r
     pushq   %rbx      # Save es segment register on the stack\r
-    movq    %ss, %rbx\r
+    movl    %ss, %ebx\r
     pushq   %rbx      # Save ss segment register on the stack\r
 \r
     .byte   0x0f, 0xa0                  #push   fs\r
@@ -267,7 +267,7 @@ ASM_PFX(InternalAsmThunk16):
     sgdt    0x60(%rsp)                  # save GDT stack in argument space\r
     movzwq  0x60(%rsp), %r10            # r10 <- GDT limit \r
     lea     ((ASM_PFX(InternalAsmThunk16) - SavedCr4) + 0xf)(%rcx), %r11 \r
-    andq    $0xfffffff0, %r11            # r11 <- 16-byte aligned shadowed GDT table in real mode buffer      \r
+    andq    $0xfffffffffffffff0, %r11   # r11 <- 16-byte aligned shadowed GDT table in real mode buffer      \r
     \r
     movw    %r10w, (SavedGdt - SavedCr4)(%rcx)       # save the limit of shadowed GDT table\r
     movq    %r11, (SavedGdt - SavedCr4 + 0x2)(%rcx)  # save the base address of shadowed GDT table\r
@@ -311,11 +311,11 @@ L_RetFromRealMode:
     .byte 0x0f, 0xa1                    # pop fs\r
     \r
     popq     %rbx\r
-    movq     %rbx, %ss\r
+    movl     %ebx, %ss\r
     popq     %rbx\r
-    movq     %rbx, %es\r
+    movl     %ebx, %es\r
     popq     %rbx\r
-    movq     %rbx, %ds\r
+    movl     %ebx, %ds\r
     \r
     popq    %rdi\r
     popq    %rsi\r