+\r
+#include "BaseLibInternals.h"\r
+\r
;------------------------------------------------------------------------------\r
;\r
-; Copyright (c) 2006, Intel Corporation\r
-; All rights reserved. This program and the accompanying materials\r
+; Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>\r
+; This program and the accompanying materials\r
; are licensed and made available under the terms and conditions of the BSD License\r
; which accompanies this distribution. The full text of the license may be found at\r
-; http://opensource.org/licenses/bsd-license.php\r
+; http://opensource.org/licenses/bsd-license.php.\r
;\r
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
;\r
;------------------------------------------------------------------------------\r
\r
- .data\r
-\r
-NullSegSel DQ 0\r
-_16CsSegSel LABEL QWORD\r
- DW -1\r
- DW 0\r
- DB 0\r
- DB 9bh\r
- DB 8fh ; 16-bit segment\r
- DB 0\r
-_16BitDsSel LABEL QWORD\r
- DW -1\r
- DW 0\r
- DB 0\r
- DB 93h\r
- DB 8fh ; 16-bit segment\r
- DB 0\r
-GdtEnd LABEL QWORD\r
-\r
- .const\r
-\r
-_16Gdtr LABEL FWORD\r
- DW offset GdtEnd - offset NullSegSel - 1\r
- DQ offset NullSegSel\r
-\r
-_16Idtr FWORD (1 SHL 10) - 1\r
-\r
- .code\r
+EXTERNDEF m16Start:BYTE\r
+EXTERNDEF m16Size:WORD\r
+EXTERNDEF mThunk16Attr:WORD\r
+EXTERNDEF m16Gdt:WORD\r
+EXTERNDEF m16GdtrBase:WORD\r
+EXTERNDEF mTransition:WORD\r
\r
IA32_REGS STRUC 4t\r
_EDI DD ?\r
_ES DW ?\r
_FS DW ?\r
_GS DW ?\r
-_RFLAGS DQ ?\r
+_EFLAGS DQ ?\r
_EIP DD ?\r
_CS DW ?\r
_SS DW ?\r
IA32_REGS ENDS\r
\r
-InternalAsmThunk16 PROC USES rbp rbx rsi rdi r12 r13 r14 r15\r
- mov eax, ds\r
- push rax\r
- mov eax, es\r
- push rax\r
- push fs\r
- push gs\r
- mov rsi, rcx ; rsi <- RegSet\r
- push sizeof (IA32_REGS)\r
- pop rcx\r
- movzx r8, (IA32_REGS ptr [rsi])._SS\r
- xor rdi, rdi\r
- mov edi, (IA32_REGS ptr [rsi])._ESP\r
- sub rdi, rcx ; reserve space on realmode stack\r
- push rdi ; save stack offset\r
- imul rax, r8, 16\r
- add rdi, rax ; rdi <- linear address of 16-bit stack\r
- rep movsb ; copy RegSet\r
- mov rsi, r8 ; si <- 16-bit stack segment\r
- pop rbx ; rbx <- 16-bit stack offset\r
- mov rdi, rdx ; rdi <- realmode patch\r
- lea eax, @BackToThunk ; rax <- address to back from real mode\r
- push rax ; use in a far return\r
- mov eax, cs\r
- mov [rsp + 4], eax ; save CS\r
- lea eax, @16Return ; thus @Return must < 4GB\r
- stosd ; set ret address offset\r
- xor eax, eax\r
- stosw ; set ret CS base to 0\r
- mov eax, esp\r
- stosd ; rsp must < 4GB\r
- mov eax, ss\r
- stosd\r
- mov rax, cr0\r
- mov ecx, eax ; ecx <- CR0\r
- and ecx, 7ffffffeh ; clear PE, PG bits\r
- stosd\r
- mov rax, cr4\r
- mov ebp, eax\r
- and ebp, 300h ; clear all but PCE and OSFXSR bits\r
- stosd\r
- sidt fword ptr [rsp + 70h] ; use parameter space to save IDTR\r
- sgdt fword ptr [rdi]\r
- lea edi, _16Idtr\r
- lea eax, @16Start ; rax <- seg:offset of @16Start\r
- push rax\r
- mov dword ptr [rsp + 4], 8\r
- push 10h\r
- pop rax ; rax <- 10h as dataseg selector\r
- lgdt _16Gdtr\r
- retf\r
-@16Start: ; 16-bit starts here\r
- mov ss, eax ; set SS to be a 16-bit segment\r
- mov cr0, rcx ; disable protected mode\r
- mov cr4, rbp\r
- DB 66h\r
- mov ecx, 0c0000080h\r
- rdmsr\r
- and ah, NOT 1 ; clear LME\r
- wrmsr\r
- mov ss, esi ; set up 16-bit stack\r
- mov sp, bx ; mov esp, ebx actually\r
- lidt fword ptr [edi]\r
- DB 66h, 61h ; popad\r
- DB 1fh ; pop ds\r
- DB 7 ; pop es\r
- pop fs\r
- pop gs\r
- add sp, 8 ; skip _RFLAGS\r
+ .const\r
+\r
+m16Size DW InternalAsmThunk16 - m16Start\r
+mThunk16Attr DW _ThunkAttr - m16Start\r
+m16Gdt DW _NullSeg - m16Start\r
+m16GdtrBase DW _16GdtrBase - m16Start\r
+mTransition DW _EntryPoint - m16Start\r
+\r
+ .code\r
+\r
+m16Start LABEL BYTE\r
+\r
+SavedGdt LABEL FWORD\r
+ DW ?\r
+ DQ ?\r
+\r
+;------------------------------------------------------------------------------\r
+; _BackFromUserCode() takes control in real mode after 'retf' has been executed\r
+; by user code. It will be shadowed to somewhere in memory below 1MB.\r
+;------------------------------------------------------------------------------\r
+_BackFromUserCode PROC\r
+ ;\r
+ ; The order of saved registers on the stack matches the order they appears\r
+ ; in IA32_REGS structure. This facilitates wrapper function to extract them\r
+ ; into that structure.\r
+ ;\r
+ ; Some instructions for manipulation of segment registers have to be written\r
+ ; in opcode since 64-bit MASM prevents accesses to those registers.\r
+ ;\r
+ DB 16h ; push ss\r
+ DB 0eh ; push cs\r
DB 66h\r
- retf ; transfer control to 16-bit code\r
-@16Return:\r
+ call @Base ; push eip\r
+@Base:\r
DB 66h\r
- push 0 ; high order 32 bits of rflags\r
+ push 0 ; reserved high order 32 bits of EFlags\r
pushf ; pushfd actually\r
+ cli ; disable interrupts\r
push gs\r
push fs\r
DB 6 ; push es\r
DB 1eh ; push ds\r
DB 66h, 60h ; pushad\r
- DB 67h, 66h, 0c5h, 74h, 24h, 30h ; lds esi, [esp + 12*4]\r
- DB 66h\r
- mov eax, [esi + 12]\r
- mov cr4, rax ; restore CR4\r
+ DB 66h, 0bah ; mov edx, imm32\r
+_ThunkAttr DD ?\r
+ test dl, THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15\r
+ jz @1\r
+ mov eax, 15cd2401h ; mov ax, 2401h & int 15h\r
+ cli ; disable interrupts\r
+ jnc @2\r
+@1:\r
+ test dl, THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL\r
+ jz @2\r
+ in al, 92h\r
+ or al, 2\r
+ out 92h, al ; deactivate A20M#\r
+@2:\r
+ xor ax, ax ; xor eax, eax\r
+ mov eax, ss ; mov ax, ss\r
+ lea bp, [esp + sizeof (IA32_REGS)]\r
+ ;\r
+ ; rsi in the following 2 instructions is indeed bp in 16-bit code\r
+ ;\r
+ mov word ptr (IA32_REGS ptr [rsi - sizeof (IA32_REGS)])._ESP, bp\r
DB 66h\r
- lgdt fword ptr [esi + 16]\r
+ mov ebx, (IA32_REGS ptr [rsi - sizeof (IA32_REGS)])._EIP\r
+ shl ax, 4 ; shl eax, 4\r
+ add bp, ax ; add ebp, eax\r
+ mov ax, cs\r
+ shl ax, 4\r
+ lea ax, [eax + ebx + (@64BitCode - @Base)]\r
+ DB 66h, 2eh, 89h, 87h ; mov cs:[bx + (@64Eip - @Base)], eax\r
+ DW @64Eip - @Base\r
+ DB 66h, 0b8h ; mov eax, imm32\r
+SavedCr4 DD ?\r
+ mov cr4, rax\r
+ ;\r
+ ; rdi in the instruction below is indeed bx in 16-bit code\r
+ ;\r
+ DB 66h, 2eh ; 2eh is "cs:" segment override\r
+ lgdt fword ptr [rdi + (SavedGdt - @Base)]\r
DB 66h\r
mov ecx, 0c0000080h\r
rdmsr\r
- or ah, 1 ; set LME\r
+ or ah, 1\r
wrmsr\r
+ DB 66h, 0b8h ; mov eax, imm32\r
+SavedCr0 DD ?\r
+ mov cr0, rax\r
+ DB 66h, 0eah ; jmp far cs:@64Bit\r
+@64Eip DD ?\r
+SavedCs DW ?\r
+@64BitCode:\r
+ db 090h \r
+ db 048h, 0bch ; mov rsp, imm64\r
+SavedSp DQ ? ; restore stack\r
+ nop\r
+ ret\r
+_BackFromUserCode ENDP\r
+\r
+_EntryPoint DD _ToUserCode - m16Start\r
+ DW CODE16\r
+_16Gdtr LABEL FWORD\r
+ DW GDT_SIZE - 1\r
+_16GdtrBase DQ _NullSeg\r
+_16Idtr FWORD (1 SHL 10) - 1\r
+\r
+;------------------------------------------------------------------------------\r
+; _ToUserCode() takes control in real mode before passing control to user code.\r
+; It will be shadowed to somewhere in memory below 1MB.\r
+;------------------------------------------------------------------------------\r
+_ToUserCode PROC\r
+ mov ss, edx ; set new segment selectors\r
+ mov ds, edx\r
+ mov es, edx\r
+ mov fs, edx\r
+ mov gs, edx\r
DB 66h\r
- mov eax, [esi + 8]\r
- mov cr0, rax ; restore CR0\r
- xor ax, ax ; xor eax, eax actually\r
- mov eax, ss\r
- mov dword ptr (IA32_REGS ptr [esp])._SS, eax\r
- shl ax, 4 ; shl eax, 4 actually\r
- add ax, sp ; add eax, esp actually\r
- add sp, sizeof (IA32_REGS) ; add esp, sizeof (IA32_REGS)\r
- DB 66h\r
- mov dword ptr (IA32_REGS ptr [esp - sizeof (IA32_REGS)])._ESP, esp\r
- DB 66h\r
- lss esp, fword ptr [esi] ; restore protected mode stack\r
- DB 66h\r
- retf ; go back to protected mode\r
-@BackToThunk:\r
- lidt fword ptr [rsp + 68h] ; restore protected mode IDTR\r
- shl rax, 32\r
- shr rax, 32 ; clear high order 32 bits of RAX\r
- pop gs\r
+ mov ecx, 0c0000080h\r
+ mov cr0, rax ; real mode starts at next instruction\r
+ rdmsr\r
+ and ah, NOT 1\r
+ wrmsr\r
+ mov cr4, rbp\r
+ mov ss, esi ; set up 16-bit stack segment\r
+ mov sp, bx ; set up 16-bit stack pointer\r
+ DB 66h ; make the following call 32-bit\r
+ call @Base ; push eip\r
+@Base:\r
+ pop bp ; ebp <- address of @Base\r
+ push [esp + sizeof (IA32_REGS) + 2]\r
+ lea eax, [rsi + (@RealMode - @Base)] ; rsi is "bp" in 16-bit code\r
+ push rax\r
+ retf ; execution begins at next instruction\r
+@RealMode:\r
+ DB 66h, 2eh ; CS and operand size override\r
+ lidt fword ptr [rsi + (_16Idtr - @Base)]\r
+ DB 66h, 61h ; popad\r
+ DB 1fh ; pop ds\r
+ DB 07h ; pop es\r
pop fs\r
+ pop gs\r
+ popf ; popfd\r
+ lea sp, [esp + 4] ; skip high order 32 bits of EFlags\r
+ DB 66h ; make the following retf 32-bit\r
+ retf ; transfer control to user code\r
+_ToUserCode ENDP\r
+\r
+CODE16 = _16Code - $\r
+DATA16 = _16Data - $\r
+DATA32 = _32Data - $\r
+\r
+_NullSeg DQ 0\r
+_16Code LABEL QWORD\r
+ DW -1\r
+ DW 0\r
+ DB 0\r
+ DB 9bh\r
+ DB 8fh ; 16-bit segment, 4GB limit\r
+ DB 0\r
+_16Data LABEL QWORD\r
+ DW -1\r
+ DW 0\r
+ DB 0\r
+ DB 93h\r
+ DB 8fh ; 16-bit segment, 4GB limit\r
+ DB 0\r
+_32Data LABEL QWORD\r
+ DW -1\r
+ DW 0\r
+ DB 0\r
+ DB 93h\r
+ DB 0cfh ; 16-bit segment, 4GB limit\r
+ DB 0\r
+\r
+GDT_SIZE = $ - _NullSeg\r
+\r
+;------------------------------------------------------------------------------\r
+; IA32_REGISTER_SET *\r
+; EFIAPI\r
+; InternalAsmThunk16 (\r
+; IN IA32_REGISTER_SET *RegisterSet,\r
+; IN OUT VOID *Transition\r
+; );\r
+;------------------------------------------------------------------------------\r
+InternalAsmThunk16 PROC USES rbp rbx rsi rdi\r
+ mov rbx, ds\r
+ push rbx ; Save ds segment register on the stack\r
+ mov rbx, es\r
+ push rbx ; Save es segment register on the stack\r
+ mov rbx, ss\r
+ push rbx ; Save ss segment register on the stack\r
+ \r
+ push fs\r
+ push gs\r
+ mov rsi, rcx\r
+ movzx r8d, (IA32_REGS ptr [rsi])._SS\r
+ mov edi, (IA32_REGS ptr [rsi])._ESP\r
+ lea rdi, [edi - (sizeof (IA32_REGS) + 4)]\r
+ imul eax, r8d, 16 ; eax <- r8d(stack segment) * 16\r
+ mov ebx, edi ; ebx <- stack for 16-bit code\r
+ push sizeof (IA32_REGS) / 4\r
+ add edi, eax ; edi <- linear address of 16-bit stack\r
pop rcx\r
- mov es, ecx\r
- pop rcx\r
- mov ds, ecx\r
+ rep movsd ; copy RegSet\r
+ lea ecx, [rdx + (SavedCr4 - m16Start)]\r
+ mov eax, edx ; eax <- transition code address\r
+ and edx, 0fh\r
+ shl eax, 12 ; segment address in high order 16 bits\r
+ lea ax, [rdx + (_BackFromUserCode - m16Start)] ; offset address\r
+ stosd ; [edi] <- return address of user code\r
+ \r
+ sgdt fword ptr [rsp + 60h] ; save GDT stack in argument space\r
+ movzx r10, word ptr [rsp + 60h] ; r10 <- GDT limit \r
+ lea r11, [rcx + (InternalAsmThunk16 - SavedCr4) + 0xf]\r
+ and r11, 0xfffffff0 ; r11 <- 16-byte aligned shadowed GDT table in real mode buffer\r
+ \r
+ mov word ptr [rcx + (SavedGdt - SavedCr4)], r10w ; save the limit of shadowed GDT table\r
+ mov qword ptr [rcx + (SavedGdt - SavedCr4) + 2], r11 ; save the base address of shadowed GDT table\r
+ \r
+ mov rsi, qword ptr [rsp + 62h] ; rsi <- the original GDT base address\r
+ xchg rcx, r10 ; save rcx to r10 and initialize rcx to be the limit of GDT table\r
+ inc rcx ; rcx <- the size of memory to copy\r
+ xchg rdi, r11 ; save rdi to r11 and initialize rdi to the base address of shadowed GDT table\r
+ rep movsb ; perform memory copy to shadow GDT table\r
+ mov rcx, r10 ; restore the orignal rcx before memory copy\r
+ mov rdi, r11 ; restore the original rdi before memory copy\r
+ \r
+ sidt fword ptr [rsp + 50h] ; save IDT stack in argument space\r
+ mov rax, cr0\r
+ mov [rcx + (SavedCr0 - SavedCr4)], eax\r
+ and eax, 7ffffffeh ; clear PE, PG bits\r
+ mov rbp, cr4\r
+ mov [rcx], ebp ; save CR4 in SavedCr4\r
+ and ebp, NOT 30h ; clear PAE, PSE bits\r
+ mov esi, r8d ; esi <- 16-bit stack segment\r
+ DB 6ah, DATA32 ; push DATA32\r
+ pop rdx ; rdx <- 32-bit data segment selector\r
+ lgdt fword ptr [rcx + (_16Gdtr - SavedCr4)]\r
+ mov ss, edx\r
+ pushfq\r
+ lea edx, [rdx + DATA16 - DATA32]\r
+ lea r8, @RetFromRealMode\r
+ push r8\r
+ mov r8d, cs\r
+ mov [rcx + (SavedCs - SavedCr4)], r8w\r
+ mov [rcx + (SavedSp - SavedCr4)], rsp\r
+ jmp fword ptr [rcx + (_EntryPoint - SavedCr4)]\r
+@RetFromRealMode:\r
+ popfq\r
+ lgdt fword ptr [rsp + 60h] ; restore protected mode GDTR\r
+ lidt fword ptr [rsp + 50h] ; restore protected mode IDTR\r
+ lea eax, [rbp - sizeof (IA32_REGS)]\r
+ pop gs\r
+ pop fs\r
+ pop rbx\r
+ mov ss, rbx\r
+ pop rbx\r
+ mov es, rbx\r
+ pop rbx\r
+ mov ds, rbx\r
ret\r
InternalAsmThunk16 ENDP\r
\r
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